[Galaxy Tab 10.1 Android Development] FCKöln:
I was playing around a bit with the hardware keyboard... I compiled a kernel from github and tested it on cm11 and cm12 with additional trace messages in some parts of the uart code. This is what i have figured out so far.

On CM11 i have the following function calls

serial8250_console_setup, index=0
serial8250_console_setup, index=0
serial8250_startup, port=0
serial8250_shutdown, port=0
serial8250_startup, port=0
serial8250_shutdown, port=0
serial8250_startup, port=0

On CM12 it looks like this

serial8250_console_setup, index=0
serial8250_console_setup, index=0
serial8250_startup, port=0
serial8250_shutdown, port=0
serial8250_startup, port=0
serial8250_shutdown, port=0
tegra_uart tegra_uart.0: Setting clk_src pll_p
tegra_uart tegra_uart.0: Setting clk_src pll_p
tegra_uart tegra_uart.0: Setting clk_src pll_p
tegra_uart tegra_uart.0: Setting clk_src pll_p

On CM12 it looks pretty much the same except that the last call to serial8250_startup is missing and some other tegra uart calls are done. That's why we get the "the uart is not ready!!!" output.

Then i added some calls to dump_stack() to see where these calls are coming from. On CM11 the last call to serial8250_startup looks like this.

<4>[ 5.614484] [<c0013250>] (unwind_backtrace+0x0/0xdc) from [<c0222618>] (serial8250_startup+0x30/0x6f8)
<4>[ 5.614830] [<c0222618>] (serial8250_startup+0x30/0x6f8) from [<c021d988>] (uart_startup+0x74/0x190)
<4>[ 5.615189] [<c021d988>] (uart_startup+0x74/0x190) from [<c021f160>] (uart_open+0x130/0x16c)
<3>[ 5.615201] android_usb: already disabled
<4>[ 5.615755] [<c021f160>] (uart_open+0x130/0x16c) from [<c0209700>] (tty_open+0x310/0x478)
<4>[ 5.616129] [<c0209700>] (tty_open+0x310/0x478) from [<c00b9538>] (chrdev_open+0x19c/0x1cc)
<4>[ 5.616490] [<c00b9538>] (chrdev_open+0x19c/0x1cc) from [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314)
<4>[ 5.616785] [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314) from [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8)
<4>[ 5.617126] [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8) from [<c00c2308>] (path_openat+0xb8/0x364)
<4>[ 5.617461] [<c00c2308>] (path_openat+0xb8/0x364) from [<c00c2690>] (do_filp_open+0x2c/0x78)
<4>[ 5.617802] [<c00c2690>] (do_filp_open+0x2c/0x78) from [<c00b502c>] (do_sys_open+0xd4/0x16c)
<4>[ 5.618226] [<c00b502c>] (do_sys_open+0xd4/0x16c) from [<c000d780>] (ret_fast_syscall+0x0/0x30)

On CM12 the call from "tegra_uart tegra_uart.0: Setting clk_src pll_p" (which should have been "serial8250_startup, port=0") looks like this

<6>[ 13.422860] tegra_uart tegra_uart.0: Setting clk_src pll_
<4>[ 13.423135] [<c0013250>] (unwind_backtrace+0x0/0xdc) from [<c0224944>] (tegra_set_baudrate.part.19+0x17c/0x304)
<4>[ 13.451534] [<c0224944>] (tegra_set_baudrate.part.19+0x17c/0x304) from [<c0225510>] (tegra_startup+0x248/0x3e4)
<4>[ 13.451888] [<c0225510>] (tegra_startup+0x248/0x3e4) from [<c021d988>] (uart_startup+0x74/0x190)
<4>[ 13.452221] [<c021d988>] (uart_startup+0x74/0x190) from [<c021f160>] (uart_open+0x130/0x16c)
<4>[ 13.452453] [<c021f160>] (uart_open+0x130/0x16c) from [<c0209700>] (tty_open+0x310/0x478)
<4>[ 13.452791] [<c0209700>] (tty_open+0x310/0x478) from [<c00b9538>] (chrdev_open+0x19c/0x1cc)
<4>[ 13.453163] [<c00b9538>] (chrdev_open+0x19c/0x1cc) from [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314)
<4>[ 13.453513] [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314) from [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8)
<4>[ 13.453910] [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8) from [<c00c2308>] (path_openat+0xb8/0x364)
<4>[ 13.454195] [<c00c2308>] (path_openat+0xb8/0x364) from [<c00c2690>] (do_filp_open+0x2c/0x78)
<4>[ 13.454543] [<c00c2690>] (do_filp_open+0x2c/0x78) from [<c00b502c>] (do_sys_open+0xd4/0x16c)
<4>[ 13.454878] [<c00b502c>] (do_sys_open+0xd4/0x16c) from [<c000d780>] (ret_fast_syscall+0x0/0x30)
<6>[ 13.462517] tegra_uart tegra_uart.0: Setting clk_src pll_p
<4>[ 13.462769] [<c0013250>] (unwind_backtrace+0x0/0xdc) from [<c0224944>] (tegra_set_baudrate.part.19+0x17c/0x304)
<4>[ 13.463098] [<c0224944>] (tegra_set_baudrate.part.19+0x17c/0x304) from [<c02259f0>] (tegra_set_termios+0x110/0x1e4)
<4>[ 13.463430] [<c02259f0>] (tegra_set_termios+0x110/0x1e4) from [<c021d9cc>] (uart_startup+0xb8/0x190)
<4>[ 13.464492] [<c021d9cc>] (uart_startup+0xb8/0x190) from [<c021f160>] (uart_open+0x130/0x16c)
<4>[ 13.464730] [<c021f160>] (uart_open+0x130/0x16c) from [<c0209700>] (tty_open+0x310/0x478)
<4>[ 13.465067] [<c0209700>] (tty_open+0x310/0x478) from [<c00b9538>] (chrdev_open+0x19c/0x1cc)
<4>[ 13.465814] [<c00b9538>] (chrdev_open+0x19c/0x1cc) from [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314)
<4>[ 13.466150] [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314) from [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8)
<4>[ 13.466477] [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8) from [<c00c2308>] (path_openat+0xb8/0x364)
<4>[ 13.466704] [<c00c2308>] (path_openat+0xb8/0x364) from [<c00c2690>] (do_filp_open+0x2c/0x78)
<4>[ 13.467027] [<c00c2690>] (do_filp_open+0x2c/0x78) from [<c00b502c>] (do_sys_open+0xd4/0x16c)
<4>[ 13.467353] [<c00b502c>] (do_sys_open+0xd4/0x16c) from [<c000d780>] (ret_fast_syscall+0x0/0x30)
<6>[ 13.475139] tegra_uart tegra_uart.0: Setting clk_src pll_p
<4>[ 13.475391] [<c0013250>] (unwind_backtrace+0x0/0xdc) from [<c0224944>] (tegra_set_baudrate.part.19+0x17c/0x304)
<4>[ 13.475732] [<c0224944>] (tegra_set_baudrate.part.19+0x17c/0x304) from [<c0225510>] (tegra_startup+0x248/0x3e4)
<4>[ 13.476060] [<c0225510>] (tegra_startup+0x248/0x3e4) from [<c021d988>] (uart_startup+0x74/0x190)
<4>[ 13.476387] [<c021d988>] (uart_startup+0x74/0x190) from [<c021f160>] (uart_open+0x130/0x16c)
<4>[ 13.476711] [<c021f160>] (uart_open+0x130/0x16c) from [<c0209700>] (tty_open+0x310/0x478)
<4>[ 13.476947] [<c0209700>] (tty_open+0x310/0x478) from [<c00b9538>] (chrdev_open+0x19c/0x1cc)
<4>[ 13.477273] [<c00b9538>] (chrdev_open+0x19c/0x1cc) from [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314)
<4>[ 13.477606] [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314) from [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8)
<4>[ 13.477970] [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8) from [<c00c2308>] (path_openat+0xb8/0x364)
<4>[ 13.478289] [<c00c2308>] (path_openat+0xb8/0x364) from [<c00c2690>] (do_filp_open+0x2c/0x78)
<4>[ 13.478516] [<c00c2690>] (do_filp_open+0x2c/0x78) from [<c00b502c>] (do_sys_open+0xd4/0x16c)
<4>[ 13.478845] [<c00b502c>] (do_sys_open+0xd4/0x16c) from [<c000d780>] (ret_fast_syscall+0x0/0x30)
<6>[ 13.479433] tegra_uart tegra_uart.0: Setting clk_src pll_p
<4>[ 13.479668] [<c0013250>] (unwind_backtrace+0x0/0xdc) from [<c0224944>] (tegra_set_baudrate.part.19+0x17c/0x304)
<4>[ 13.480000] [<c0224944>] (tegra_set_baudrate.part.19+0x17c/0x304) from [<c02259f0>] (tegra_set_termios+0x110/0x1e4)
<4>[ 13.480363] [<c02259f0>] (tegra_set_termios+0x110/0x1e4) from [<c021d9cc>] (uart_startup+0xb8/0x190)
<4>[ 13.484349] [<c021d9cc>] (uart_startup+0xb8/0x190) from [<c021f160>] (uart_open+0x130/0x16c)
<4>[ 13.484704] [<c021f160>] (uart_open+0x130/0x16c) from [<c0209700>] (tty_open+0x310/0x478)
<4>[ 13.485247] [<c0209700>] (tty_open+0x310/0x478) from [<c00b9538>] (chrdev_open+0x19c/0x1cc)
<4>[ 13.485580] [<c00b9538>] (chrdev_open+0x19c/0x1cc) from [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314)
<4>[ 13.485911] [<c00b4240>] (__dentry_open.isra.16+0x1f4/0x314) from [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8)
<4>[ 13.486233] [<c00c1ea0>] (do_last.isra.40+0x588/0x6e8) from [<c00c2308>] (path_openat+0xb8/0x364)
<4>[ 13.486557] [<c00c2308>] (path_openat+0xb8/0x364) from [<c00c2690>] (do_filp_open+0x2c/0x78)
<4>[ 13.486788] [<c00c2690>] (do_filp_open+0x2c/0x78) from [<c00b502c>] (do_sys_open+0xd4/0x16c)
<4>[ 13.487134] [<c00b502c>] (do_sys_open+0xd4/0x16c) from [<c000d780>] (ret_fast_syscall+0x0/0x30)

Long story short, on CM11 we have uart_startup->serial8250_startup and on CM12 we have uart_startup->tegra_startup. For whatever reason another path is used here...