[Nexus 5 Android Development] Cl3Kener:
Hey Everyone!

So once again I'm having to rebuild my kernel thanks to CM. I uploaded yesterdays kernels early this morning after good day of testing with Stock. I have now created a branch for Stock as a backup and I guess we'll see if somehow the new kernel with CM updates is still compatible later. I hope to knock out the whole things today which will be difficult because it looks like somewhere in the ballpark of 200-250 commits. Assuming I have an error 1 every 10 that should only take me about several hours to do. :(

Anyways, so someone asked about changelogs. It's not that I don't believe in super detailed changelogs but I find that unless it's a tangible features nobody really understands/cares which is why I just include major features on Post #2. I've include the link to my github source which I find it best because iif you don't understand the commit message you can just click on the commit and read about the changes. Or I guess if you really wish I can just grab a log and paste it here like this

eac11e6 workqueue: fix mismatch
364f2a7 lib: spinlock_debug: increase spin dump timeout to one second
8f8e924 lib: spinlock_debug: increase spin dump timeout
1b51e62 sched/debug: Make sysrq prints of sched debug data optional
e3aab22 msm: cpuidle: use format string in snprintf
aba2b89 msm: gdsc: Make enable/disable function clock controls symmetric
83ddecf ARM: dts: msm: Add additional GDSC devices
5c07136 msm: subsystem_restart: Correct state transition even in absence of PIL
36f3fa0 msm: Fix NULL pointer dereference in sensors ADSP driver.
76b41a8 msm: msm_bus: Don't touch ID array in case of invalid IDs
ca44047 msm: msm_bus: fix memory leak in msm_bus_fabric_probe
26a3de9 msm: Fix compiler error due to CONFIG_HIGHMEM being disabled
7c14347 msm: Update the kernel log messages
19dd8b4 msm: msm_bus: Fix the type error causing bandwidth overflow
76bb790 add extra free kbytes tunable
638a2f6 ARM: Flush the caches for non panicking CPUs in case of a kernel panic
1ca0aca ARM: smp: fix incorrect per-cpu definition of regs_before_stop
82cd77a ARM: smp: Save CPU registers before IPI_CPU_STOP processing
1344e17 ARM: 7816/1: CONFIG_KUSER_HELPERS: fix help text
70f5ee2 ARM: 7819/1: fiq: Cast the first argument of flush_icache_range()
522611e ARM: Fix FIQ code on VIVT CPUs
c50dd00 ARM: Fix the world famous typo with is_gate_vma()
a354187 ARM: fix nommu builds with 48be69a02 (ARM: move signal handlers into a vdso-like page)
7249d66 ARM: fix a cockup in 48be69a02 (ARM: move signal handlers into a vdso-like page)
85e9ad0 ARM: make vectors page inaccessible from userspace
f56fc17 ARM: move signal handlers into a vdso-like page
cdbe879 ARM: allow kuser helpers to be removed from the vector page
ec85740 ARM: update FIQ support for relocation of vectors
8e3a8a1 ARM: fiq: change FIQ_START to a variable
6dc1962 ARM: move vector stubs
065cf0f ARM: poison memory between kuser helpers
b3e9875 ARM: poison the vectors page
a2a12a7 ARM: 7735/2: Preserve the user r/w register TPIDRURW on context switch and fork
c18c81f ARM: 7693/1: mm: clean-up in order to reduce to call kmap_high_get()
2902c6e ARM: dts: msm: Remove dual configuration for CPU on msm8974
bf41f92 msm: msm_bus: Changes for QOS computation at BIMC
212375b msm: msm_bus: Change priority overrides based on master configuration
571edf5 ARM: dts: msm: remove ebi cache dump reservation for 8974
1b752b9 coresight: enable flush-on-flushin for periodic flush to usb
6655519 coresight: use dma_alloc_coherent for allocating tmc-etr memory
ae85721 coresight: Add support for byte counter interrupt feature
62c4004 coresight: add lpae support for coresight tmc driver
d2e3216 ARM: dts: msm: remove contiguous etr memory reservation support for 8610
fc30c37 ARM: dts: msm: remove contiguous etr memory reservation support for 8226
8e08231 ARM: dts: msm: remove contiguous etr memory reservation support for 9625
465f943 ARM: dts: msm: remove contiguous etr memory reservation support for 8974
84f8b02 ARM: dts: msm: modify memory reservation requirements for tmc-etr on 8610
ebbb2e9 ARM: dts: msm: modify memory reservation requirements for tmc-etr on 8226
63d10d8 ARM: dts: msm: modify memory reservation requirements for tmc-etr on 9625
04eb909 ARM: dts: msm: modify memory reservation requirements for tmc-etr on 8974
4cdbd69 ARM: dts: Enable additional GDSC collapse modes based on HW version
e67d6ee workqueue: Remove gcwq_has_idle_workers
70a7f5d workqueue: simplify CPU hotplug code
5627e14 workqueue: remove CPU offline trustee
0ba7786 workqueue: don't butcher idle workers on an offline CPU
7fdf3cb workqueue: reimplement CPU online rebinding to handle idle workers
afd342d workqueue: drop @bind from create_worker()
f601fe0 workqueue: use mutex for global_cwq manager exclusion
153b22f workqueue: ROGUE workers are UNBOUND workers
8beff10 workqueue: drop CPU_DYING notifier operation
0a5bb32 Defconfig: SMH
0384859 Revert " DRIVERS: SLIMBUS: Initial OC of Slimbus"

Those were my changes yesterday. :) (I having a feeling most of you just skipped over it)

As far as which do I think is better I personally like bleeding edge (and it seems like most of you do too) so I run Linaro 4.8.3. To me it feels a little snappier (on stock that is, I use stock for any of the battery life tests etc). Battery life seems to be about the same between the two though so again it's not like a big deal one way or another. I just like to give you all options instead of only making one kernel. Because I have build scripts and a fast computer it takes me about 5 minutes to build one kernel so I can make both in about 10 minutes. That's no big deal for me. The part that takes the time is the patching, coding, tweaking, and testing.

Speaking of testing, I still haven't really figured out my dream IO and CPU Gov combo yet. I've been playing around alot and hopefully some of you will too. I can tell you that I always default to CFQ or BFQ with Ondemand since I really like those combos but I am also starting to like several other combos. If you find a combo you think is awesome please post it and a screenshot if you want to convince us it is good for battery or whatnot.

Anyhow, enjoy the 1/27 kernel from yesterday! I'll be working on a CM compatible kernel today.

Cheers!

Cl3Kener