[Galaxy S III I9305 (4G LTE + 2GB RAM) Android Deve] psndna88:
ASV table for 4412 (stock unmodified sources: OC frequencies not implemented):

(SIII's)

/* ASV table for 12.5mV step */
static const unsigned int asv_voltage_step_12_5[CPUFREQ_LEVEL_END][12] = {
/* ASV0, ASV1, ASV2, ASV3,	ASV4,	ASV5,	ASV6, ASV7, ASV8, ASV9, ASV10, ASV11 */
{	0, 0,	0,	0,	0,	0,	0, 0, 0, 0,	0, 0 },	[B]/* L0 - Not used */[/B]
{	0, 0,	0,	0,	0,	0,	0, 0, 0, 0,	0, 0 },	[B]/* L1 - Not used */[/B]
{ 1325000, 1312500, 1300000, 1287500, 1300000, 1287500,	1275000, 1250000, 1250000, 1237500, 1225000, 1212500 },
{ 1300000, 1275000, 1237500, 1237500, 1250000, 1250000,	1237500, 1212500, 1200000, 1200000, 1187500, 1175000 },
{ 1225000, 1212500, 1200000, 1187500, 1200000, 1187500,	1175000, 1150000, 1137500, 1125000, 1125000, 1112500 },
{ 1175000, 1162500, 1150000, 1137500, 1150000, 1137500,	1125000, 1100000, 1100000, 1075000, 1075000, 1062500 },
{ 1125000, 1112500, 1100000, 1087500, 1100000, 1087500,	1075000, 1050000, 1037500, 1025000, 1025000, 1012500 },
{ 1075000, 1062500, 1050000, 1050000, 1050000, 1037500,	1025000, 1012500, 1000000, 987500, 987500, 975000 },
{ 1037500, 1025000, 1000000, 1000000, 1000000, 987500,	975000, 962500, 962500, 962500, 962500, 950000 },
{ 1012500, 1000000, 975000, 975000, 975000, 975000,	962500, 962500, 950000, 950000, 950000, 937500 },
{ 1000000, 987500, 962500, 962500, 962500, 962500,	950000, 950000, 937500, 937500, 937500, 925000 },
{ 987500, 975000, 950000, 937500, 950000, 937500,	937500, 937500, 912500, 912500, 912500, 900000 },
{ 975000, 962500, 950000, 925000, 950000, 925000,	925000, 925000, 900000, 900000, 900000, 887500 },
{ 950000, 937500, 925000, 900000, 925000, 900000,	900000, 900000, 900000, 887500, 875000, 862500 },
{ 925000, 912500, 900000, 900000, 900000, 900000,	900000, 900000, 887500, 875000, 875000, 862500 },
};

ASV table for 4412 pegasus prime (stock unmodified sources: OC frequencies not implemented):

(Note II's)

/* 20120927 DVFS table for pega prime */
static const unsigned int asv_voltage_step_12_5_rev2[CPUFREQ_LEVEL_END][13] = {
/* ASV0, ASV1, ASV2, ASV3,	ASV4,	ASV5,	ASV6, ASV7, ASV8, ASV9, ASV10, ASV11 ASV12 */
{ 1312500, 1312500, 1312500, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1212500, 1200000, 1187500 },	/* L0 */
{ 1312500, 1262500, 1262500, 1262500, 1250000, 1237500,	1225000, 1212500, 1200000, 1187500, 1162500, 1150000, 1137500 },	/* L1 */
{ 1275000, 1225000, 1225000, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1125000, 1112500, 1100000 },	/* L2 */
{ 1225000, 1175000, 1175000, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1075000, 1062500, 1050000 },	/* L3 */
{ 1187500, 1137500, 1137500, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1037500, 1025000, 1012500 },	/* L4 */
{ 1150000, 1100000, 1100000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1000000, 987500, 975000 },	/* L5 */
{ 1125000, 1075000, 1075000, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, 975000, 962500, 950000 },	/* L6 */
{ 1100000, 1050000, 1050000, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000, 950000, 937500, 925000 },	/* L7 */
{ 1062500, 1012500, 1012500, 1012500, 1000000, 987500, 975000, 962500, 950000, 937500, 912500, 900000, 887500 },	/* L8 */
{ 1037500, 987500, 987500, 987500, 975000, 962500, 950000, 937500, 925000, 912500, 887500, 887500, 887500 },	/* L9 */
{ 1012500, 962500, 962500, 962500, 950000, 937500, 925000, 912500, 900000, 887500, 875000, 875000, 875000 },	/* L10 */
{ 1000000, 950000, 950000, 950000, 937500, 925000, 912500, 900000, 887500, 887500, 875000, 875000, 875000 },	/* L11 */
{ 987500, 937500, 937500, 937500, 925000, 912500, 900000, 887500, 887500, 887500, 875000, 875000, 875000 },	/* L12 */
{ 975000, 925000, 925000, 925000, 912500, 900000, 887500, 887500, 887500, 887500, 875000, 875000, 875000 },	/* L13 */
{ 962500, 912500, 912500, 912500, 900000, 887500, 887500, 887500, 887500, 887500, 875000, 875000, 875000 },	/* L14 */
};

ASV table for 4412 (OC frequencies implemented):

(SIII's)

/* 20120210 DVFS table version */
static const unsigned int asv_voltage_step_12_5[CPUFREQ_LEVEL_END][12] = {
/* ASV0, ASV1, ASV2, ASV3,	ASV4,	ASV5,	ASV6, ASV7, ASV8, ASV9, ASV10, ASV11 */
{ 1450000, 1450000, 1450000, 1450000, 1450000, 1450000,	1450000, 1450000, 1450000, 1450000, 1450000, 1450000 }, /* L0 2000MHz */
{ 1425000, 1425000, 1425000, 1425000, 1425000, 1425000,	1425000, 1425000, 1425000, 1425000, 1425000, 1425000 }, /* L1 1900MHz */
{ 1400000, 1400000, 1400000, 1400000, 1400000, 1400000,	1400000, 1400000, 1400000, 1400000, 1400000, 1400000 }, /* L2 1800MHz */
{ 1400000, 1400000, 1400000, 1400000, 1400000, 1400000,	1400000, 1400000, 1400000, 1387500, 1375000, 1362500 }, /* L3 1700MHz */
{ 1400000, 1400000, 1400000, 1400000, 1387500, 1387500,	1375000, 1362500, 1350000, 1337500, 1325000, 1312500 }, /* L4 1600MHz */
{ 1387500, 1375000, 1362500, 1350000, 1337500, 1325000,	1312500, 1300000, 1287500, 1275000, 1262500, 1250000 }, /* L5 1500MHz */
{ 1325000, 1312500, 1300000, 1287500, 1300000, 1287500,	1275000, 1250000, 1250000, 1237500, 1225000, 1212500 }, /* L6 1400MHz */
{ 1300000, 1275000, 1237500, 1237500, 1250000, 1250000,	1237500, 1212500, 1200000, 1200000, 1187500, 1175000 }, /* L7 1300MHz */
{ 1225000, 1212500, 1200000, 1187500, 1200000, 1187500,	1175000, 1150000, 1137500, 1125000, 1125000, 1112500 }, /* L8 1200MHz */
{ 1175000, 1162500, 1150000, 1137500, 1150000, 1137500,	1125000, 1100000, 1100000, 1075000, 1075000, 1062500 }, /* L9 1100MHz */
{ 1125000, 1112500, 1100000, 1087500, 1100000, 1087500,	1075000, 1050000, 1037500, 1025000, 1025000, 1012500 }, /* L10 1000MHz */
{ 1075000, 1062500, 1050000, 1050000, 1050000, 1037500,	1025000, 1012500, 1000000, 987500, 987500, 975000 }, /* L11 900MHz */
{ 1037500, 1025000, 1000000, 1000000, 1000000, 987500,	975000, 962500, 962500, 962500, 962500, 950000 }, /* L12 800MHz */
{ 1012500, 1000000, 975000, 975000, 975000, 975000,	962500, 962500, 950000, 950000, 950000, 937500 }, /* L13 700MHz */
{ 1000000, 987500, 962500, 962500, 962500, 962500,	950000, 950000, 937500, 937500, 937500, 925000 }, /* L14 600MHz */
{ 987500, 975000, 950000, 937500, 950000, 937500,	937500, 937500, 912500, 912500, 912500, 900000 }, /* L15 500MHz */
{ 975000, 962500, 950000, 925000, 950000, 925000,	925000, 925000, 900000, 900000, 900000, 887500 }, /* L16 400MHz */
{ 950000, 937500, 925000, 900000, 925000, 900000,	900000, 900000, 900000, 887500, 875000, 862500 }, /* L17 300MHz */
{ 925000, 912500, 900000, 900000, 900000, 900000,	900000, 900000, 887500, 875000, 875000, 862500 }, /* L18 200MHz */
};

ASV table for 4412 pegasus prime (OC frequencies implemented):

(Note II's)

/* 20120927 DVFS table for pega prime */
static const unsigned int asv_voltage_step_12_5_rev2[CPUFREQ_LEVEL_END][13] = {
/* ASV0, ASV1, ASV2, ASV3,	ASV4,	ASV5,	ASV6, ASV7, ASV8, ASV9, ASV10, ASV11 ASV12 */
{ 1450000, 1450000, 1450000, 1450000, 1450000, 1450000,	1450000, 1450000, 1450000, 1450000, 1450000, 1450000, 1450000 }, /* L0 2000MHz */
{ 1425000, 1425000, 1425000, 1425000, 1425000, 1425000,	1425000, 1425000, 1425000, 1425000, 1425000, 1425000, 1425000 }, /* L1 1900MHz */
{ 1400000, 1400000, 1400000, 1400000, 1400000, 1400000,	1400000, 1400000, 1400000, 1400000, 1400000, 1400000, 1400000 }, /* L2 1800MHz */
{ 1400000, 1400000, 1400000, 1400000, 1400000, 1400000,	1400000, 1400000, 1400000, 1387500, 1375000, 1362500, 1350000 }, /* L3 1700MHz */
{ 1312500, 1312500, 1312500, 1312500, 1300000, 1287500, 1275000, 1262500, 1250000, 1237500, 1212500, 1200000, 1187500 }, /* L4 1600MHz */
{ 1275000, 1262500, 1262500, 1262500, 1250000, 1237500,	1225000, 1212500, 1200000, 1187500, 1162500, 1150000, 1137500 }, /* L5 1500MHz */
{ 1237500, 1225000, 1225000, 1225000, 1212500, 1200000, 1187500, 1175000, 1162500, 1150000, 1125000, 1112500, 1100000 }, /* L6 1400MHz */
{ 1187500, 1175000, 1175000, 1175000, 1162500, 1150000, 1137500, 1125000, 1112500, 1100000, 1075000, 1062500, 1050000 }, /* L7 1300MHz */
{ 1150000, 1137500, 1137500, 1137500, 1125000, 1112500, 1100000, 1087500, 1075000, 1062500, 1037500, 1025000, 1012500 }, /* L8 1200MHz */
{ 1112500, 1100000, 1100000, 1100000, 1087500, 1075000, 1062500, 1050000, 1037500, 1025000, 1000000, 987500, 975000 }, /* L9 1100MHz */
{ 1087500, 1075000, 1075000, 1075000, 1062500, 1050000, 1037500, 1025000, 1012500, 1000000, 975000, 962500, 950000 }, /* L10 1000MHz */
{ 1062500, 1050000, 1050000, 1050000, 1037500, 1025000, 1012500, 1000000, 987500, 975000, 950000, 937500, 925000 }, /* L11 900MHz */
{ 1025000, 1012500, 1012500, 1012500, 1000000, 987500, 975000, 962500, 950000, 937500, 912500, 900000, 887500 }, /* L12 800MHz */
{ 1000000, 987500, 987500, 987500, 975000, 962500, 950000, 937500, 925000, 912500, 887500, 887500, 887500 }, /* L13 700MHz */
{ 975000, 962500, 962500, 962500, 950000, 937500, 925000, 912500, 900000, 887500, 875000, 875000, 875000 }, /* L14 600MHz */
{ 962500, 950000, 950000, 950000, 937500, 925000, 912500, 900000, 887500, 887500, 875000, 875000, 875000 }, /* L15 500MHz */
{ 950000, 937500, 937500, 937500, 925000, 912500, 900000, 887500, 887500, 887500, 875000, 875000, 875000 }, /* L16 400MHz */
{ 937500, 925000, 925000, 925000, 912500, 900000, 887500, 887500, 887500, 887500, 875000, 875000, 875000 }, /* L17 300MHz */
{ 925000, 912500, 912500, 912500, 900000, 887500, 887500, 887500, 887500, 887500, 875000, 875000, 875000 }, /* L18 200MHz */
};

I'll modify cpu-uv v2.0 scripts for I930x in upcoming v4.4.2 which is now ready