[Nexus 4 Original Android Development] _motley:
Well, this is interesting and I am glad to better understand it. The phones with the default voltage values as posted above are initializing to use the "fast" frequency table, consider yourself lucky.

This explains why some can't UV as much as others since they are starting with lower mV's to start. And it also figures why some of the devices blew up so easily when overclocking in the first kernels that provided it. These are built in factory tolerances that depend upon the binning of your chip. I am familiar with similar things in the tegra3 world where I have had more experience.

What CPU do you have? Nominal, Fast:)...or Slow:(

If you boot up your phone and look at the dmesg output, you will find something like one of the two at the top during the kernel init where it selects it's frequency plan. Mine is "Nominal". If you are really unlucky, you will see "Slow".

acpuclk-8064 acpuclk-8064: ACPU PVS: Nominal

-or-

acpuclk-8064 acpuclk-8064: ACPU PVS: Fast

-or-

acpuclk-8064 acpuclk-8064: ACPU PVS: Slow

I have been tweaking both of nominal and fast (and slow to compensate for the lower freq) to keep them similarly scaled since I assumed some chips may use the "fast" tables. The first row tells whether the freq is used or not. It will be interesting to see who has the Slow chips.

This is not a first as after my study of the kernel code, I have found more info here where others are examining the same for the S4 Pro for the Droid DNA.

http://xdaforums.com/showthread.php?p=35286419

Here is how my voltages are scaled in the current build 48

Slow:

static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
{ 1, { 304000, PLL_8, 0, 0x00 }, L2(0), 850000 },
{ 0, { 384000, HFPLL, 2, 0x20 }, L2(6), 950000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 975000 },
{ 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 1000000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 1000000 },
{ 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 1025000 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 1025000 },
{ 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 1075000 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 1075000 },
{ 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1100000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1100000 },
{ 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1125000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1125000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1175000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1200000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1200000 },
{ 1, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1225000 },
{ 0, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1225000 },
{ 1, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1237500 },
{ 0, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1237500 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1250000 },
{ 0, { 0 } }
};

Nominal

static struct acpu_level acpu_freq_tbl_nom[] __initdata = {
{ 1, { 304000, PLL_8, 0, 0x00 }, L2(0), 750000 },
{ 0, { 384000, HFPLL, 2, 0x20 }, L2(6), 850000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 850000 },
{ 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 925000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 925000 },
{ 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 937500 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 950000 },
{ 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 950000 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 962500 },
{ 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 962500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 962500 },
{ 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 975000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 975000 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 987500 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 987500 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1000000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1000000 },
{ 1, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1050000 },
{ 0, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1075000 },
{ 1, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1075000 },
{ 0, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1100000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1100000 },
{ 0, { 0 } }

Fast:

static struct acpu_level acpu_freq_tbl_fast[] __initdata = {
{ 1, { 304000, PLL_8, 0, 0x00 }, L2(0), 725000 },
{ 0, { 384000, HFPLL, 2, 0x20 }, L2(6), 825000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 875000 },
{ 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 900000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 900000 },
{ 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 925000 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 925000 },
{ 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 937500 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 937500 },
{ 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 950000 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 950000 },
{ 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 962500 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 962500 },
{ 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 975000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 975000 },
{ 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 987500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 987500 },
{ 1, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1025000 },
{ 0, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1037500 },
{ 1, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1037500 },
{ 0, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1050000 },
{ 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1050000 },
{ 0, { 0 } }
};