[Galaxy 3 Android Development] marcellusbe:
I don't think it will work.

Processor is set at 667Mhz at start... Then, only the dividers in the frequencies table are used :

/* ARMCLK, D0CLK, P0CLK, D1CLK, P1CLK, APLL_RATIO, D0CLK_RATIO, P0CLK_RATIO, D1CLK_RATIO, P1CLK_RATIO */
static const u32 s5p_cpu_clk_tab_666_166MHz[][10] = {
{667*MHZ, 166*MHZ, (166*MHZ)/2, 166*MHZ, (166*MHZ)/2, 0, 0, 1, 0, 1},
{(667*MHZ)/2, 166*MHZ, (166*MHZ)/2, 166*MHZ, (166*MHZ)/2, 1, 0, 1, 0, 1},
{(667*MHZ)/3, 166*MHZ, (166*MHZ)/2, 166*MHZ, (166*MHZ)/2, 2, 0, 1, 0, 1},
{(667*MHZ)/4, 166*MHZ, (166*MHZ)/2, 166*MHZ, (166*MHZ)/2, 3, 0, 1, 0, 1},
#ifdef SYSCLK_CHANGE
#ifdef USE_DVFS_AL1_LEVEL
{(667*MHZ)/4, (166*MHZ)/2, (166*MHZ)/2, 166*MHZ/2, (166*MHZ)/2, 3, 1, 0, 1, 0},
#endif /* USE_DVFS_AL1_LEVEL */
{(667*MHZ)/8, (166*MHZ)/2, (166*MHZ)/2, 166*MHZ/2, (166*MHZ)/2, 7, 1, 0, 1, 0},
#endif /* SYSCLK_CHANGE */
};

so, the APLL ratio is at index 5 (from 0) :

667 / ( 0 + 1) = 667 Mhz

667 / ( 1 + 1) = 333 Mhz

667 / ( 2 + 1) = 222 Mhz

667 / ( 3 + 1) = 166 Mhz

667 / ( 7 + 1) = 83 Mhz

So unless you change the initial frequency of the processor, you won't overclock. That's why in fugumod and g3mod, we have a new table with the right APLL value to overclock the processor (https://github.com/dharamg3/G3MOD/blob/master/Kernel/arch/arm/plat-s5p64xx/clock-ext.c#L59) :

u32 s5p_cpu_pll_tab[][4] = {
// A P L L M P L L E P L L V P L L
{((1 << 31) | (700 << 16) | (3 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (650 << 16) | (3 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (600 << 16) | (3 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (550 << 16) | (3 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (500 << 16) | (3 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (450 << 16) | (3 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (400 << 16) | (3 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (350 << 16) | (3 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (600 << 16) | (6 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (500 << 16) | (6 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (400 << 16) | (6 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (300 << 16) | (6 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (200 << 16) | (6 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
{((1 << 31) | (83 << 16) | (6 << 8) | 1), ((1 << 31) | (333 << 16) | (3 << 8) | 3), ((1 << 31) | (0x82d << 16) | (1 << 8) | 3), ((1 << 31) | (108 << 16) | (3 << 8) | 3)},
};

only the first value is really usefull (for APLL -> overclock arm processor) :

this one as example :

(1 << 31) | (700 << 16) | (3 << 8) | 1) = 1400 Mhz

(1 << 31) | (600 << 16) | (6 << 8) | 1) = 600 Mhz

....

Then the value is written in the S5P_APLL_CON register

__raw_writel(0xe10, S5P_APLL_LOCK); // lock time
__raw_writel(s5p_cpu_pll_tab[index][0],S5P_APLL_CON); // new value