[Desire HD Android Development] AtomosVE:
few hours ago, My mate said have a look at it and found it:

https://github.com/Flemmard/htc7x30-3.0/blob/master/arch/arm/mach-msm/acpuclock-7x30.c

it was there.. I was so dumb. :eek:

static struct clkctl_acpu_speed acpu_freq_tbl[] = {
{ 0, 24576, LPXO, 0, 0, 30720000, 900, VDD_RAW(900) },
{ 0, 61440, PLL_3, 5, 11, 61440000, 900, VDD_RAW(900) },
{ 0, 122880, PLL_3, 5, 5, 61440000, 900, VDD_RAW(900) },
{ 0, 184320, PLL_3, 5, 4, 61440000, 900, VDD_RAW(900) },
{ 0, MAX_AXI_KHZ, AXI, 1, 0, 61440000, 900, VDD_RAW(900) },
{ 1, 245760, PLL_3, 5, 2, 61440000, 900, VDD_RAW(900) },
{ 1, 368640, PLL_3, 5, 1, 122800000, 900, VDD_RAW(900) },
/* AXI has MSMC1 implications. See above. */
{ 1, 768000, PLL_1, 2, 0, 153600000, 1050, VDD_RAW(1050) },
/*
* AXI has MSMC1 implications. See above.
*/
{ 1, 806400, PLL_2, 3, 0, 192000000, 1100, VDD_RAW(1100), &pll2_tbl[0]},
{ 1, 1024000, PLL_2, 3, 0, 192000000, 1200, VDD_RAW(1200), &pll2_tbl[1]},
{ 1, 1200000, PLL_2, 3, 0, 192000000, 1200, VDD_RAW(1200), &pll2_tbl[2]},
{ 1, 1305600, PLL_2, 3, 0, 192000000, 1200, VDD_RAW(1200), &pll2_tbl[3]},
{ 1, 1401600, PLL_2, 3, 0, 192000000, 1250, VDD_RAW(1250), &pll2_tbl[4]},
{ 1, 1516800, PLL_2, 3, 0, 192000000, 1300, VDD_RAW(1300), &pll2_tbl[5]},
#ifdef CONFIG_JESUS_PHONE
{ 1, 1536000, PLL_2, 3, 0, 192000000, 1300, VDD_RAW(1300), &pll2_tbl[6]},
{ 1, 1612800, PLL_2, 3, 0, 192000000, 1400, VDD_RAW(1400), &pll2_tbl[7]},
{ 1, 1708800, PLL_2, 3, 0, 192000000, 1400, VDD_RAW(1400) ,&pll2_tbl[8]},
{ 1, 1804800, PLL_2, 3, 0, 192000000, 1450, VDD_RAW(1450) ,&pll2_tbl[9]},
{ 0 }
#else
{ 0 }
#endif

};

Thank you chrisch1974 for helping my mate and me:)

here's another table from Blackout Kernel, it's likely undervolted

static struct clkctl_acpu_speed acpu_freq_tbl[] = {
{ 24576, SRC_LPXO, 0, 0, 30720, 900, VDD_RAW(925) },
{ 61440, PLL_3, 5, 11, 61440, 900, VDD_RAW(925) },
{ 122880, PLL_3, 5, 5, 61440, 900, VDD_RAW(925) },
{ 184320, PLL_3, 5, 4, 61440, 900, VDD_RAW(925) },
{ MAX_AXI_KHZ, SRC_AXI, 1, 0, 61440, 900, VDD_RAW(925) },
{ 19200, PLL_3, 5, 2, 61440, 875, VDD_RAW(925) },
{ 96000, PLL_3, 5, 2, 61440, 875, VDD_RAW(925) },
{ 122000, PLL_3, 5, 2, 61440, 875, VDD_RAW(925) },
{ 245000, PLL_3, 5, 1, 192000, 875, VDD_RAW(925) },
{ 307200, PLL_3, 5, 1, 192000, 900, VDD_RAW(950) },
{ 384000, PLL_1, 2, 0, 192000, 900, VDD_RAW(950) },
{ 460800, PLL_3, 5, 1, 192000, 925, VDD_RAW(975) },
{ 537600, PLL_2, 3, 0, 192000, 950, VDD_RAW(975) },
{ 614400, PLL_2, 3, 0, 192000, 950, VDD_RAW(975) },
{ 691200, PLL_2, 3, 0, 192000, 975, VDD_RAW(1025) },
{ 768000, PLL_2, 3, 0, 192000, 1000, VDD_RAW(1025) },
{ 844800, PLL_2, 3, 0, 192000, 1000, VDD_RAW(1050) },
{ 921600, PLL_2, 3, 0, 192000, 1025, VDD_RAW(1075) },
{ 998400, PLL_2, 3, 0, 192000, 1025, VDD_RAW(1075) },
{ 1075200, PLL_2, 3, 0, 192000, 1050, VDD_RAW(1125) },
{ 1152000, PLL_2, 3, 0, 192000, 1075, VDD_RAW(1125) },
{ 1228800, PLL_2, 3, 0, 192000, 1100, VDD_RAW(1150) },
{ 1305600, PLL_2, 3, 0, 192000, 1125, VDD_RAW(1175) },
{ 1382400, PLL_2, 3, 0, 192000, 1150, VDD_RAW(1200) },
{ 1459200, PLL_2, 3, 0, 192000, 1200, VDD_RAW(1250) },
{ 1536000, PLL_2, 3, 0, 192000, 1275, VDD_RAW(1300) },
{ 1612800, PLL_2, 3, 0, 199680, 1325, VDD_RAW(1350) },
{ 1689600, PLL_2, 3, 0, 199680, 1375, VDD_RAW(1400) },
{ 1766400, PLL_2, 3, 0, 199680, 1425, VDD_RAW(1425) },
{ 1843200, PLL_2, 3, 0, 199680, 1450, VDD_RAW(1450) },
{ 1920000, PLL_2, 3, 0, 199680, 1475, VDD_RAW(1475) },
{ 1996800, PLL_2, 3, 0, 199680, 1500, VDD_RAW(1500) },
{ 2016000, PLL_2, 3, 0, 201600, 1500, VDD_RAW(1500) },
#ifdef CONFIG_NUTTER
#endif
{ 0 }
};