[Hardware Hacking General] Rick_1995:
i have a small update (rather big physically)

I've tried a few tricks like unwinding the loop (also reducing register pressure), writing in bursts and re-arrange a few instructions to prevent pipeline stalls and this is what I have as of today, you're ofcourse free to use it/modify it but i wrote it for a specific purpose (print 8x16 char on unaligned address), and it does that wonderfully.

.arm
.text
.align 5
.global fbS
.type fbS, %function
fbS:
stmdb sp!, {r4, r5, r6, r7}
ldr r4, [r0], #4
@Prevent pipeline stall waiting for load/store unit
eor r5, r5, r5
eor r6, r6, r6
eor r7, r7, r7
@First Line
@HakfWord write to first pixel, unaligned
tst r4, #0x80000000
strneh r2, [r1], #2
streqh r3, [r1], #2
@Word write to aligned pixels
tst r4, #0x40000000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x20000000
orrne r5, r5, r2
orreq r5, r5, r3
tst r4, #0x10000000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x08000000
orrne r6, r6, r2
orreq r6, r6, r3
tst r4, #0x04000000
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
@Halfword write to last pixel, unaligned
tst r4, #0x02000000
orrne r7, r7, r2
orreq r7, r7, r3
@Write in burst, this leads to apparent zero latency of mem controller
stmia r1!, {r5, r6, r7}
tst r4, #0x01000000
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Second Line
tst r4, #0x00800000
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00400000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00200000
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00100000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00080000
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00040000
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00020000
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00010000
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Third line
tst r4, #0x00008000
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00004000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00002000
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00001000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00000800
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00000400
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00000200
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00000100
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Fourth line
tst r4, #0x00000080
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00000040
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00000020
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00000010
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00000008
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00000004
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00000002
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00000001
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
ldr r4, [r0], #4
@Prevent pipeline stall waiting for load/store unit
eor r5, r5, r5
eor r6, r6, r6
eor r7, r7, r7
@Fifth Line
tst r4, #0x80000000
strneh r2, [r1], #2
streqh r3, [r1], #2
tst r4, #0x40000000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x20000000
orrne r5, r5, r2
orreq r5, r5, r3
tst r4, #0x10000000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x08000000
orrne r6, r6, r2
orreq r6, r6, r3
tst r4, #0x04000000
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x02000000
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x01000000
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Sixth Line
tst r4, #0x00800000
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00400000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00200000
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00100000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00080000
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00040000
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00020000
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00010000
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Seventh line
tst r4, #0x00008000
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00004000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00002000
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00001000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00000800
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00000400
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00000200
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00000100
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Eighth line
tst r4, #0x00000080
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00000040
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00000020
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00000010
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00000008
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00000004
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00000002
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00000001
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
ldr r4, [r0], #4
@Prevent pipeline stall waiting for load/store unit
eor r5, r5, r5
eor r6, r6, r6
eor r7, r7, r7
@Nineth Line
tst r4, #0x80000000
strneh r2, [r1], #2
streqh r3, [r1], #2
tst r4, #0x40000000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x20000000
orrne r5, r5, r2
orreq r5, r5, r3
tst r4, #0x10000000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x08000000
orrne r6, r6, r2
orreq r6, r6, r3
tst r4, #0x04000000
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x02000000
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x01000000
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Tenth Line
tst r4, #0x00800000
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00400000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00200000
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00100000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00080000
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00040000
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00020000
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00010000
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Eleventh line
tst r4, #0x00008000
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00004000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00002000
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00001000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00000800
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00000400
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00000200
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00000100
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Twelveth line
tst r4, #0x00000080
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00000040
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00000020
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00000010
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00000008
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00000004
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00000002
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00000001
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
ldr r4, [r0], #4
@Prevent pipeline stall waiting for load/store unit
eor r5, r5, r5
eor r6, r6, r6
eor r7, r7, r7
@Thirteenth Line
tst r4, #0x80000000
strneh r2, [r1], #2
streqh r3, [r1], #2
tst r4, #0x40000000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x20000000
orrne r5, r5, r2
orreq r5, r5, r3
tst r4, #0x10000000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x08000000
orrne r6, r6, r2
orreq r6, r6, r3
tst r4, #0x04000000
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x02000000
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x01000000
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Fourteenth Line
tst r4, #0x00800000
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00400000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00200000
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00100000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00080000
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00040000
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00020000
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00010000
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Fifteenth line
tst r4, #0x00008000
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00004000
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00002000
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00001000
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00000800
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00000400
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00000200
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00000100
strneh r2, [r1], #2
streqh r3, [r1], #2
add r1, r1, #944
@Sixteenth line
tst r4, #0x00000080
strneh r2, [r1], #2
streqh r3, [r1], #2
eor r5, r5, r5
tst r4, #0x00000040
orrne r5, r5, r2, lsl #16
orreq r5, r5, r3, lsl #16
tst r4, #0x00000020
orrne r5, r5, r2
orreq r5, r5, r3
eor r6, r6, r6
tst r4, #0x00000010
orrne r6, r6, r2, lsl #16
orreq r6, r6, r3, lsl #16
tst r4, #0x00000008
orrne r6, r6, r2
orreq r6, r6, r3
eor r7, r7, r7
tst r4, #0x00000004
orrne r7, r7, r2, lsl #16
orreq r7, r7, r3, lsl #16
tst r4, #0x00000002
orrne r7, r7, r2
orreq r7, r7, r3
stmia r1!, {r5, r6, r7}
tst r4, #0x00000001
strneh r2, [r1]
streqh r3, [r1]

ldmdb sp!, {r4, r5, r6, r7}
mov pc, lr