[Galaxy Note GT-N7000 General] jetmarc:
Paul,

The official (!) firmware patch addresses suggest an SRAM size of at least 512KB, which translates into 25M transistors (6T). This is a given, unless you insist that Samsung will not align memory to natural boundaries.

Adding an extra half million (?) more for an ARM7 isnt that much. The IP issues weight in more than the silicon area. Also, ARM7 isn't a given - it's just my guess. Samsung has a 16bit CPU core of their own, and of course there are the usual suspects too.

I think you are not deeply familiar with the (disturbing) details of NAND flash, which contradict the harddisk-like guarantees that EMMC must give. EMMC is *not* just a memory controller or IO interface.

A simple NAND chip would be more or less equivalent to what you seem to think about. NAND client controllers accept commands like "fetch page, die=0 core=0 block=7 page=23" and then you (or your peripherial) polls a status register. Once the page is fetched, you access it through a memory-mapped 512 or 4K window (or you peripherial DMAs it into main memory). This kind of controller is indeed very simple, and will implemented in logic (Verilog if you want).

On the surface, EMMC looks similar. The spec lists quite some commands, and a few waveforms diagrams. But the difference is the *guarantees* it gives. EMMC offers a harddisk emulation, where 512-byte sectors can be written and retrieved without caring about the limitations of flash!

The three most important NAND limitations are:

1. Pages can be written only once per erase-cycle (meaning that "harddisk sectors" can't be changed individually, without affecting their neighbors).

2. Erasing flash blocks wears them out. Using FAT32 on a NAND without "wear leveling" stresses it beyond spec, simply because each block is allowed to fail once it has been erased/written more than X times. Filesystems like YAFFS try to address this issue natively (=they work with pure NAND). EMMC on the other hand wants to support traditional filesystems such as FAT32, which write the same sectors over and over (FAT=file allocation table, those sectors are updated during *every* write). This is why EMMC exists after all! It offers harddisk compatibility on NAND flash memory, without extra software.

3. Appending additional pages into a block can damage previously written pages. Usually there is a spec of how many times pages can be appended before you have to abandon the block.

To put your 10s of transistors into the real world:

Samsung has invented and promoted the most popular flash wear leveling system and flash translation layer. It is called XSR. I would be surprised to find anything different used in a Samsung EMMC.

It took me more than 16kb of ARM thumb code to do an (incomplete) blackbox implementation of XSR. Incomplete, as in: full read support but only limited write support). It was tedious to do in software, but doing it in hardware would have been a nightmare. It's really not hardware friendly. Many of the structures are clearly invented by a software engineer, rather than by an "RTL guy" like you.

You wouldn't be able to do all that in RTL with a straight face. And even if, then they would just hand you a new spec and ask you to "update". XSR is currently widely deployed in version 1.7. I wouldn't try to keep pace with software peoples cancerous "improvements" while being handicapped by wrong implementation decisions.

Of course you and me aren't in this situation, but the Samsung EMMC designers are. The fact that they keep selling product suggest that they made the right decisions (within reason, see superbrick bug).

I also want to take advantage of the attention and repeat my offer: If somebody prepares one of the EMMC chips (damaged or not), soldered to a breakout board with 2.54mm spacing for the relevant pins, I promise to spend time on it. Any takers?