[Android] wildstang83:
I am most certainly not the right instructor for such a project, I can share what I have done to my kernel so far though.

Edited arch/arm/arch-msm/acpuclock-8x60.c

Added a definition to set the default KHZ on boot. Did this by finding the 'PLL calibration limits'. Once that was found I added the definition as so:

#define BOOT_KHZ	1512000 /* KHz *

Next I wanted to add my oc freqs and voltages so I found the tables. Edited like so:

Stock setup before change:

/* L2 frequencies = 2 * 27 MHz * L_VAL */
static struct clkctl_l2_speed l2_freq_tbl_v2[] = {
[0] = { MAX_AXI, 0, 0, 1000000, 1100000, 0},
[1] = { 432000, 1, 0x08, 1000000, 1100000, 0},
[2] = { 486000, 1, 0x09, 1000000, 1100000, 0},
[3] = { 540000, 1, 0x0A, 1000000, 1100000, 0},
[4] = { 594000, 1, 0x0B, 1000000, 1100000, 0},
[5] = { 648000, 1, 0x0C, 1000000, 1100000, 1},
[6] = { 702000, 1, 0x0D, 1100000, 1100000, 1},
[7] = { 756000, 1, 0x0E, 1100000, 1100000, 1},
[8] = { 810000, 1, 0x0F, 1100000, 1100000, 1},
[9] = { 864000, 1, 0x10, 1100000, 1100000, 1},
[10] = { 918000, 1, 0x11, 1100000, 1100000, 2},
[11] = { 972000, 1, 0x12, 1100000, 1100000, 2},
[12] = {1026000, 1, 0x13, 1100000, 1100000, 2},
[13] = {1080000, 1, 0x14, 1100000, 1200000, 2},
[14] = {1134000, 1, 0x15, 1100000, 1200000, 2},
[15] = {1188000, 1, 0x16, 1200000, 1200000, 3},
[16] = {1404000, 1, 0x1A, 1200000, 1250000, 3},
};

And after my added freqs:

/* L2 frequencies = 2 * 27 MHz * L_VAL */
static struct clkctl_l2_speed l2_freq_tbl_v2[] = {
[0] = { MAX_AXI, 0, 0, 1000000, 1100000, 0},
[1] = { 432000, 1, 0x08, 1000000, 1100000, 0},
[2] = { 486000, 1, 0x09, 1000000, 1100000, 0},
[3] = { 540000, 1, 0x0A, 1000000, 1100000, 0},
[4] = { 594000, 1, 0x0B, 1000000, 1100000, 0},
[5] = { 648000, 1, 0x0C, 1000000, 1100000, 1},
[6] = { 702000, 1, 0x0D, 1100000, 1100000, 1},
[7] = { 756000, 1, 0x0E, 1100000, 1100000, 1},
[8] = { 810000, 1, 0x0F, 1100000, 1100000, 1},
[9] = { 864000, 1, 0x10, 1100000, 1100000, 1},
[10] = { 918000, 1, 0x11, 1100000, 1100000, 2},
[11] = { 972000, 1, 0x12, 1100000, 1100000, 2},
[12] = {1026000, 1, 0x13, 1100000, 1100000, 2},
[13] = {1080000, 1, 0x14, 1100000, 1200000, 2},
[14] = {1134000, 1, 0x15, 1100000, 1200000, 2},
[15] = {1188000, 1, 0x16, 1200000, 1200000, 3},
[16] = {1242000, 1, 0x17, 1200000, 1212500, 3},
[17] = {1296000, 1, 0x18, 1200000, 1225000, 3},
[18] = {1350000, 1, 0x19, 1200000, 1225000, 3},
[19] = {1404000, 1, 0x1A, 1200000, 1250000, 3},
};

And then onto the actual freq settings:

Stock before my changes:

#define L2(x) (&l2_freq_tbl_v2[(x)])
/* SCPLL frequencies = 2 * 27 MHz * L_VAL */
static struct clkctl_acpu_speed acpu_freq_tbl_v2[] = {
{ {1, 1}, 192000, ACPU_PLL_8, 3, 1, 0, 0, L2(1), 812500, 0x03006000},
/* MAX_AXI row is used to source CPU cores and L2 from the AFAB clock. */
{ {0, 0}, MAX_AXI, ACPU_AFAB, 1, 0, 0, 0, L2(0), 875000, 0x03006000},
{ {1, 1}, 384000, ACPU_PLL_8, 3, 0, 0, 0, L2(1), 875000, 0x03006000},
{ {1, 1}, 432000, ACPU_SCPLL, 0, 0, 1, 0x08, L2(1), 887500, 0x03006000},
{ {1, 1}, 486000, ACPU_SCPLL, 0, 0, 1, 0x09, L2(2), 912500, 0x03006000},
{ {1, 1}, 540000, ACPU_SCPLL, 0, 0, 1, 0x0A, L2(3), 925000, 0x03006000},
{ {1, 1}, 594000, ACPU_SCPLL, 0, 0, 1, 0x0B, L2(4), 937500, 0x03006000},
{ {1, 1}, 648000, ACPU_SCPLL, 0, 0, 1, 0x0C, L2(5), 950000, 0x03006000},
{ {1, 1}, 702000, ACPU_SCPLL, 0, 0, 1, 0x0D, L2(6), 975000, 0x03006000},
{ {1, 1}, 756000, ACPU_SCPLL, 0, 0, 1, 0x0E, L2(7), 1000000, 0x03006000},
{ {1, 1}, 810000, ACPU_SCPLL, 0, 0, 1, 0x0F, L2(8), 1012500, 0x03006000},
{ {1, 1}, 864000, ACPU_SCPLL, 0, 0, 1, 0x10, L2(9), 1037500, 0x03006000},
{ {1, 1}, 918000, ACPU_SCPLL, 0, 0, 1, 0x11, L2(10), 1062500, 0x03006000},
{ {1, 1}, 972000, ACPU_SCPLL, 0, 0, 1, 0x12, L2(11), 1087500, 0x03006000},
{ {1, 1}, 1026000, ACPU_SCPLL, 0, 0, 1, 0x13, L2(12), 1125000, 0x03006000},
{ {1, 1}, 1080000, ACPU_SCPLL, 0, 0, 1, 0x14, L2(13), 1137500, 0x03006000},
{ {1, 1}, 1134000, ACPU_SCPLL, 0, 0, 1, 0x15, L2(14), 1162500, 0x03006000},
{ {1, 1}, 1188000, ACPU_SCPLL, 0, 0, 1, 0x16, L2(15), 1187500, 0x03006000},
{ {1, 1}, 1512000, ACPU_SCPLL, 0, 0, 1, 0x1C, L2(16), 1250000, 0x03006000},
{ {0, 0}, 0 },
};

And then after adding my desired freqs:

#define L2(x) (&l2_freq_tbl_v2[(x)])
/* SCPLL frequencies = 2 * 27 MHz * L_VAL */
static struct clkctl_acpu_speed acpu_freq_tbl_v2[] = {
{ {1, 1}, 192000, ACPU_PLL_8, 3, 1, 0, 0, L2(1), 800000, 0x03006000},
/* MAX_AXI row is used to source CPU cores and L2 from the AFAB clock. */
{ {0, 0}, MAX_AXI, ACPU_AFAB, 1, 0, 0, 0, L2(0), 825000, 0x03006000},
{ {1, 1}, 384000, ACPU_PLL_8, 3, 0, 0, 0, L2(1), 825000, 0x03006000},
{ {1, 1}, 702000, ACPU_SCPLL, 0, 0, 1, 0x0D, L2(6), 900000, 0x03006000},
{ {1, 1}, 918000, ACPU_SCPLL, 0, 0, 1, 0x11, L2(10), 1000000, 0x03006000},
{ {1, 1}, 1134000, ACPU_SCPLL, 0, 0, 1, 0x15, L2(14), 1075000, 0x03006000},
{ {1, 1}, 1350000, ACPU_SCPLL, 0, 0, 1, 0x19, L2(18), 1150000, 0x03006000},
{ {1, 1}, 1512000, ACPU_SCPLL, 0, 0, 1, 0x1C, L2(19), 1250000, 0x03006000},
{ {1, 1}, 1728000, ACPU_SCPLL, 0, 0, 1, 0x20, L2(19), 1300000, 0x03006000},
{ {1, 1}, 1782000, ACPU_SCPLL, 0, 0, 1, 0x21, L2(19), 1325000, 0x03006000},
{ {1, 1}, 1836000, ACPU_SCPLL, 0, 0, 1, 0x22, L2(19), 1350000, 0x03006000},
{ {0, 0}, 0 },
};

I then I added the proper max_khz since I don't want it to be the stock value anymore.

Changed from:

if (speed_bin == 0x1)
max_khz = 1512000;
else
max_khz = 1188000;

to:

if (speed_bin == 0x1)
max_khz = 1836000;
//	max_khz = 1512000;
else
max_khz = 1188000;

And finally this is where the boot up freq comes into play that we set at the start:

The stock value:

/* Improve boot time by ramping up CPUs immediately. */
for_each_online_cpu(cpu)
acpuclk_set_rate(cpu, max_cpu_khz, SETRATE_INIT);

My custom value:

/* Improve boot time by ramping up CPUs immediately. */
for_each_online_cpu(cpu)
acpuclk_set_rate(cpu, BOOT_KHZ, SETRATE_INIT);

Keep in mind with these changes my kernel is still not perfect. The freqs are there now but scaling isn't working properly at this time. I am still working out what code is in charge of that.

Really there isn't a way to write a proper guide. It just goes case by case for your device. The best thing to do is look at the source of an already customized kernel for your device to see what you want to do. This is exactly what I did for my device. We have a pretty kick ass kernel dev who really knows his stuff. He's been doing this for ever so his examples are well worth looking at. So thats what I would suggest. Just look at your fav kernel devs source and see what they did and ask them questions if things don't make sense to you.

Enjoy guys :)