[Android Software/Hacking General [Developers Only]] jerrystake:
I spent hours trying to get how the controller is clocked the GSP is for gating the vertical sync or blanking, not sure. I'm hoping I can probe it and see what the boot loader set up. Not that far yet as still working out memory mapping... I'm here now:

Starting kernel ...Uncompressing Linux... done, booting the kernel.

<5>Linux version 3.0.8-g32e29b7-dirty (jerry@sjp) (gcc version 4.6.2 20111004 (prerelease) (Linaro GCC 4.6-2011.10) ) #7 PREEMPT Tue Oct 16 15:34:31 EDT 2012

CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d

CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache

Machine: griffin

<4>Ignoring unrecognised tag 0x414fff01

<4>Ignoring unrecognised tag 0x54410008

<6>init ram start

<6>reserve init ram done

<6>memblock done

<6>omap_reserve

<6>Reserving 4194304 bytes SDRAM for VRAM

<6>omap_reserve done

Memory policy: ECC disabled, Data cache writeback

<6>************* omap_map io

<6>OMAP3630 ES1.2 (l2cache iva sgx neon isp 192mhz_clk )

<6>SRAM: Mapped pa 0x40200000 to va 0xfe400000 size: 0x10000

<6>************* omap_map io done

<7>On node 0 totalpages: 120064

<7>free_area_init_node: node 0, pgdat c07367e4, node_mem_map c08a7000

<7> Normal zone: 1024 pages used for memmap

<7> Normal zone: 0 pages reserved

<7> Normal zone: 119040 pages, LIFO batch:31

<6>omap_griffin_init_early

<6>Clocking rate (Crystal/Core/MPU): 26.0/400/600 MHz

<6>Reprogramming SDRC clock to 400000000 Hz

<6>omap_griffin_init_early done...

<7>pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768

<7>pcpu-alloc: [0] 0

Built 1 zonelists in Zone order, mobility grouping on. Total pages: 119040

<5>Kernel command line: console=ttyO2,115200n8 androidboot.console=ttyO2 androidboot.mode=normal omap_vout_mod.video1_numbuffers=6 omap_vout_mod.vid1_static_vrfb_alloc=y androidboot.reason=download androidboot.bootloader=201108181716-4431 androidboot.serialno=0163B0FD0101201345AA0002

<6>PID hash table entries: 2048 (order: 1, 8192 bytes)

<6>Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)

<6>Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)

<6>Memory: 468MB 1MB = 469MB total

<5>Memory: 465420k/465420k available, 58868k reserved, 0K highmem

<5>Virtual kernel memory layout:

vector : 0xffff0000 - 0xffff1000 ( 4 kB)

fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)

DMA : 0xffc00000 - 0xffe00000 ( 2 MB)

vmalloc : 0xe0800000 - 0xf8000000 ( 376 MB)

lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)

pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)

modules : 0xbf000000 - 0xbfe00000 ( 14 MB)

.init : 0xc0008000 - 0xc003f000 ( 220 kB)

.text : 0xc003f000 - 0xc06dce80 (6776 kB)

.data : 0xc06de000 - 0xc0737140 ( 357 kB)

.bss : 0xc0737164 - 0xc08a6808 (1470 kB)

<6>Preemptible hierarchical RCU implementation.

<6>NR_IRQS:410

<6>IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts

<6>Total of 96 interrupts on 1 active controller

<6>OMAP clockevent source: GPTIMER1 at 32768 Hz

<6>sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 131071999ms

<6>Console: colour dummy device 80x30

<6>Calibrating delay loop... <c>597.64 BogoMIPS (lpj=2334720)

<6>pid_max: default: 32768 minimum: 301

<6>Mount-cache hash table entries: 512

<6>Initializing cgroup subsys debug

<6>Initializing cgroup subsys freezer

<6>CPU: Testing write buffer coherency: ok

<4>omap_hwmod: _populate_mpu_rt_base found no _mpu_rt_va for l4_core

<4>omap_hwmod: _populate_mpu_rt_base found no _mpu_rt_va for l4_per

<4>omap_hwmod: _populate_mpu_rt_base found no _mpu_rt_va for l4_wkup

<4>omap_hwmod: _populate_mpu_rt_base found no _mpu_rt_va for usbhs_ohci

<4>omap_hwmod: _populate_mpu_rt_base found no _mpu_rt_va for usbhs_ehci