[Eee Pad Transformer Android Development] Blades:
http://dlcdnet.asus.com/pub/ASUS/EeePAD/TF101/Eee_PAD_TF101_Kernel_Code_8_4_4_11.rar

Its a link to newly release source code. I was just about to comment on the differences.. Slightly cleaner memory chip recognition (and therefore memory timings), discarded the mysterious JN101 project name and seems to now only have TF101 and SL101.. two different version for each. SINTEK and WINTEK.. eh? Different SKUs and all that.. Now technically the difference in project names are not development, as they are changes in comments.

but they correspond to development..

//The ventana_hw is hexadecimal representation as follows.

//

// HW[7:0] = 7 6 5 4 3 2 1 0

// +-----------+-----------+

// |PCB_ID[3:0]|GMI_AD[7:4]|

// +-----------+-----------+

// where PCB_ID[3:0] is KB_ROW[3:0]

//

// PCB_ID[3:0] = 3 2 1 0

// +-----------------+

// |PRJ[0]| SKU[2:0] |

// +-----------------+

// PRJ[0] SKU[2:0]

// 0b -> TF101(SINTEK) 000b -> W/O 3G, Murata BT/WLAN

// 0b -> TF101(SINTEK) 001b -> 3G, Murata BT/WLAN

// 0b -> TF101(SINTEK) 010b -> W/O 3G, AZW BT/WLAN

// 0b -> TF101(SINTEK) 011b -> 3G, AZW BT/WLAN

// 0b -> TF101(WINTEK) 100b -> W/O 3G, Murata BT/WLAN

// 0b -> TF101(WINTEK) 101b -> 3G, Murata BT/WLAN

// 0b -> TF101(WINTEK) 110b -> W/O 3G, AZW BT/WLAN

// 0b -> TF101(WINTEK) 111b -> 3G, AZW BT/WLAN

//

// 1b -> SL101(SINTEK) 000b -> W/O 3G, Murata BT/WLAN

// 1b -> SL101(SINTEK) 001b -> 3G, Murata BT/WLAN

// 1b -> SL101(SINTEK) 010b -> W/O 3G, AZW BT/WLAN

// 1b -> SL101(SINTEK) 011b -> 3G, AZW BT/WLAN

// 1b -> SL101(WINTEK) 100b -> W/O 3G, Murata BT/WLAN

// 1b -> SL101(WINTEK) 101b -> 3G, Murata BT/WLAN

// 1b -> SL101(WINTEK) 110b -> W/O 3G, AZW BT/WLAN

// 1b -> SL101(WINTEK) 111b -> 3G, AZW BT/WLAN

//

//Memory Type

#define TEGRA_DEVKIT_MISC_HW_0_MEMTYPE_RANGE 1:0

#define TEGRA_DEVKIT_MISC_HW_0_MEMTYPE_DEFAULT 0x0UL //EPD 8Gb

#define TEGRA_DEVKIT_MISC_HW_0_MEMTYPE_1 0x1UL //EPD 4Gb

#define TEGRA_DEVKIT_MISC_HW_0_MEMTYPE_2 0x2UL //HYN 8Gb

#define TEGRA_DEVKIT_MISC_HW_0_MEMTYPE_3 0x3UL //HYN 4Gb

//MMC Type

#define TEGRA_DEVKIT_MISC_HW_0_MMCTYPE_RANGE 3:2

#define TEGRA_DEVKIT_MISC_HW_0_MMCTYPE_DEFAULT 0x0UL //TOS/KIN 16G

#define TEGRA_DEVKIT_MISC_HW_0_MMCTYPE_1 0x1UL //TBD

#define TEGRA_DEVKIT_MISC_HW_0_MMCTYPE_2 0x2UL //TOS/KIN 32G

#define TEGRA_DEVKIT_MISC_HW_0_MMCTYPE_3 0x3UL //HYN 64G

//SKU Identification

#define TEGRA_DEVKIT_MISC_HW_0_SKU_RANGE 4:4

#define TEGRA_DEVKIT_MISC_HW_0_SKU_DEFAULT 0x0UL //W/O 3G

#define TEGRA_DEVKIT_MISC_HW_0_SKU_1 0x1UL //3G

//BT/WLAN Module Vendor

#define TEGRA_DEVKIT_MISC_HW_0_VENDOR_RANGE 5:5

#define TEGRA_DEVKIT_MISC_HW_0_VENDOR_DEFAULT 0x0UL //Murata BT/WLAN

#define TEGRA_DEVKIT_MISC_HW_0_VENDOR_1 0x1UL //AZW BT/WLAN

//Touch Panel Vendor

#define TEGRA_DEVKIT_MISC_HW_0_TOUCH_RANGE 6:6

#define TEGRA_DEVKIT_MISC_HW_0_TOUCH_DEFAULT 0x0UL //SINTEK

#define TEGRA_DEVKIT_MISC_HW_0_TOUCH_1 0x1UL //WINTEK

//Project Identification

#define TEGRA_DEVKIT_MISC_HW_0_PROJECT_RANGE 7:7

#define TEGRA_DEVKIT_MISC_HW_0_PROJECT_DEFAULT 0x0UL //TF101(EP101)

#define TEGRA_DEVKIT_MISC_HW_0_PROJECT_1 0x1UL //SL101(EP102)

This tells us that we can now get different touch panels.. wifi (although it still uses a broadcom chip).. and 64GB models in the pipeline.

Are there bots that automatically ask if a thread belongs in development when a thread gets created in development? Thats rhetorical..