[BetterBatteryStats] Karpfenhai:
Okay, here is the real Problem:

wake lock l2_hsic, expired
<6>[ 9457.581905] suspend: enter suspend
<6>[ 9457.582012] suspend: enter suspend, (2012-12-04 23:04:46.130750733 UTC)
<6>[ 9457.582434] PM: Syncing filesystems ... done.
<6>[ 9457.598304] exynos4_pm_hotplug_notifier_event: saving pm_hotplug lock 0
<6>[ 9457.598344] mif: link_pm_notifier_event: PDA active High to LPA suspend spot
<4>[ 9457.598383] Freezing user space processes ... (elapsed 0.02 seconds) done.
<4>[ 9457.622370] Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
<4>[ 9457.637288] Suspending console(s) (use no_console_suspend to debug)
<3>[ 9457.639088] [MODEM_IF]Active States =0, s5p-ehci
<7>[ 9457.640544] pmu_debug: 0x00000901
<7>[ 9457.650562] xusbxti_control: 0
<6>[ 9457.672450] max8997-rtc max8997-rtc: max8997_rtc_set_alarm: 2012-12-04 23:05:06
<6>[ 9457.678212] max17042 9-0036: max17042_irq_thread : low batt released!! config_reg(2314)
<6>[ 9457.678859] max17042 9-0036: max17042_irq_thread : MAX17042_REG_VCELL(bd86)
<6>[ 9457.679501] max17042 9-0036: max17042_irq_thread : MAX17042_REG_TEMPERATURE(1f00)
<6>[ 9457.680144] max17042 9-0036: max17042_irq_thread : MAX17042_REG_CONFIG(2314)
<6>[ 9457.680785] max17042 9-0036: max17042_irq_thread : MAX17042_REG_VFOCV(c045)
<6>[ 9457.681425] max17042 9-0036: max17042_irq_thread : MAX17042_REG_SOC_VF(3998)
<3>[ 9457.681465] max17042 9-0036: max17042_irq_thread : PMIC IRQ (1), FUEL GAUGE IRQ (0)
<6>[ 9457.682145] max17042 9-0036: max17042_get_soc : soc(3998)
<6>[ 9457.682175] max17042_need_soc_recal: HW(0xe)
<6>[ 9457.682201] max17042 9-0036: max17042_get_soc : use raw (57), soc (58)
<6>[ 9457.682841] max17042 9-0036: max17042_check_status : status_reg(0000)
<6>[ 9457.748416] wake enabled for irq 359
<6>[ 9457.748586] sec_jack_suspend: enable_irq_wake(0)
<7>[ 9457.748680] usb: android_disconnect con(0), sw(0)
<7>[ 9457.748707] usb: android_disconnect schedule_work con(0) sw(0)
<6>[ 9457.748780] s5p_int_src_ext_hpd()
<6>[ 9457.748872] audss_reg_save: SRC[0x1], DIV[0xf11], GATE[0x42]
<6>[ 9457.748906] audss_clk_enable(0): SRC[0x1], DIV[0xf11], GATE[0x42]
<6>[ 9457.748955] wake enabled for irq 375
<6>[ 9457.748978] wake enabled for irq 381
<6>[ 9457.749011] sdhci_suspend_host : Enter WIFI suspend
<7>[ 9457.749101] usb: android_work config= (null),connected=0,sw_connected=0
<7>[ 9457.749145] usb: android_work did not send uevent (0 0 (null))
<6>[ 9457.749753] exynos4_setup_mshci_set_power : internal MMC Card OFF samsung-mshc.
<6>[ 9457.757120] u1_enable_regulator_for_usb_mipi: disable LDOs
<6>[ 9457.800398] PM: suspend of devices complete after 161.916 msecs
<4>[ 9457.805157] suspend_set_state: LED_A_2.8V: No configuration
<6>[ 9457.888218] max17042 9-0036: max17042_irq_thread : low batt released!! config_reg(2314)
<6>[ 9457.888865] max17042 9-0036: max17042_irq_thread : MAX17042_REG_VCELL(bbd0)
<6>[ 9457.889507] max17042 9-0036: max17042_irq_thread : MAX17042_REG_TEMPERATURE(1f00)
<6>[ 9457.890150] max17042 9-0036: max17042_irq_thread : MAX17042_REG_CONFIG(2314)
<6>[ 9457.890791] max17042 9-0036: max17042_irq_thread : MAX17042_REG_VFOCV(c045)
<6>[ 9457.891432] max17042 9-0036: max17042_irq_thread : MAX17042_REG_SOC_VF(3998)
<3>[ 9457.891471] max17042 9-0036: max17042_irq_thread : PMIC IRQ (1), FUEL GAUGE IRQ (0)
<7>[ 9457.892139] platform_pm_suspend_noirq: s3c2440-i2c.7+
<7>[ 9457.892168] platform_pm_suspend_noirq: s3c2440-i2c.7-
<7>[ 9457.892197] platform_pm_suspend_noirq: s3c2440-i2c.6+
<7>[ 9457.892224] platform_pm_suspend_noirq: s3c2440-i2c.6-
<7>[ 9457.892252] platform_pm_suspend_noirq: s3c2440-i2c.5+
<7>[ 9457.892279] platform_pm_suspend_noirq: s3c2440-i2c.5-
<7>[ 9457.892307] platform_pm_suspend_noirq: s3c2440-i2c.3+
<7>[ 9457.892334] platform_pm_suspend_noirq: s3c2440-i2c.3-
<7>[ 9457.892362] platform_pm_suspend_noirq: s3c2440-i2c.1+
<7>[ 9457.892389] platform_pm_suspend_noirq: s3c2440-i2c.1-
<7>[ 9457.892417] platform_pm_suspend_noirq: s3c2440-i2c.0+
<7>[ 9457.892444] platform_pm_suspend_noirq: s3c2440-i2c.0-
<7>[ 9457.892526] platform_pm_suspend_noirq: power.0+
<6>[ 9457.892552] power_suspend_late return 0
<7>[ 9457.892574] platform_pm_suspend_noirq: power.0-
<6>[ 9457.892603] PM: late suspend of devices complete after 84.523 msecs
<4>[ 9457.892636] Disabling non-boot CPUs ...
<4>[ 9457.892781] [B][COLOR="Red"]s3c_pm_enter: Aborting sleep, EINT PENDING(0x00080000)[/COLOR][/B]
<6>[ 9457.892849] exynos4_pm_resume: early_wakeup
<6>[ 9457.892874] Resume caused by wakeup_stat=0x00000000
<6>[ 9457.893381] PM: early resume of devices complete after 0.609 msecs

s3c_pm_enter: Aborting sleep, EINT PENDING(0x00080000

Thats AFAIK your CPU which does not enter deepsleep!!

This could be serious, a bad block in RAM or out of memory...

0x00080000 does point to this..

Now we need the real experts ....

Could he rum an extended memory test on his device?

Could his internal flash have a bad block?

First time seem such a behavior, i afraid its an HW Issue..

Any advice from our coders?

Here is, what the Script does:

/* linux/arch/arm/plat-s3c/pm.c

*

* Copyright 2008 Openmoko, Inc.

* Copyright 2004-2008 Simtec Electronics

* Ben Dooks <ben@simtec.co.uk>

* http://armlinux.simtec.co.uk/

*

* S3C common power management (suspend to ram) support.

*

* This program is free software; you can redistribute it and/or modify

* it under the terms of the GNU General Public License version 2 as

* published by the Free Software Foundation.

*/

#include <linux/init.h>

#include <linux/suspend.h>

#include <linux/errno.h>

#include <linux/delay.h>

#include <linux/serial_core.h>

#include <linux/io.h>

#include <asm/cacheflush.h>

#include <mach/hardware.h>

#include <mach/map.h>

#include <plat/regs-serial.h>

#include <mach/regs-clock.h>

#include <mach/regs-irq.h>

#include <asm/fiq_glue.h>

#include <asm/irq.h>

#include <mach/gpio.h>

#include <plat/gpio-cfg.h>

#include <mach/gpio-aries.h>

#include <plat/pm.h>

#include <plat/irq-eint-group.h>

#include <mach/pm-core.h>

/* for external use */

/* For checking pending interrupt */

#define S5PV210_GPIOREG(x) (S5P_VA_GPIO + (x))

#define S5PV210_EINT1PEND S5PV210_GPIOREG(0xF44) /* EINT31[0] ~ EINT31[7] */

#define S5PV210_EINT2PEND S5PV210_GPIOREG(0xF48) /* EINT32[0] ~ EINT32[7] */

#define EINTPEND1_BIT_ONEDRAM (1 << 3)

#define EINTPEND2_BIT_MICROUSB (1 << 7)

unsigned long s3c_pm_flags;

/* ---------------------------------------------- */

extern unsigned int pm_debug_scratchpad;

#include <linux/slab.h>

#include <linux/debugfs.h>

#include <linux/uaccess.h>

#include <linux/module.h>

#define PMSTATS_MAGIC "*PM*DEBUG*STATS*"

struct pmstats {

char magic[16];

unsigned sleep_count;

unsigned wake_count;

unsigned sleep_freq;

unsigned wake_freq;

};

static struct pmstats *pmstats;

static struct pmstats *pmstats_last;

static ssize_t pmstats_read(struct file *file, char __user *buf,

size_t len, loff_t *offset)

{

if (*offset != 0)

return 0;

if (len > 4096)

len = 4096;

if (copy_to_user(buf, file->private_data, len))

return -EFAULT;

*offset += len;

return len;

}

static int pmstats_open(struct inode *inode, struct file *file)

{

file->private_data = inode->i_private;

return 0;

}

static const struct file_operations pmstats_ops = {

.owner = THIS_MODULE,

.read = pmstats_read,

.open = pmstats_open,

};

void __init pmstats_init(void)

{

pr_info("pmstats at %08x\n", pm_debug_scratchpad);

if (pm_debug_scratchpad)

pmstats = ioremap(pm_debug_scratchpad, 4096);

else

pmstats = kzalloc(4096, GFP_ATOMIC);

if (!memcmp(pmstats->magic, PMSTATS_MAGIC, 16)) {

pmstats_last = kzalloc(4096, GFP_ATOMIC);

if (pmstats_last)

memcpy(pmstats_last, pmstats, 4096);

}

memset(pmstats, 0, 4096);

memcpy(pmstats->magic, PMSTATS_MAGIC, 16);

debugfs_create_file("pmstats", 0444, NULL, pmstats, &pmstats_ops);

if (pmstats_last)

debugfs_create_file("pmstats_last", 0444, NULL, pmstats_last, &pmstats_ops);

}

/* ---------------------------------------------- */

/* Debug code:

*

* This code supports debug output to the low level UARTs for use on

* resume before the console layer is available.

*/

#ifdef CONFIG_SAMSUNG_PM_DEBUG

extern void printascii(const char *);

void s3c_pm_dbg(const char *fmt, ...)

{

va_list va;

char buff[256];

va_start(va, fmt);

vsprintf(buff, fmt, va);

va_end(va);

printascii(buff);

}

static inline void s3c_pm_debug_init(void)

{

/* restart uart clocks so we can use them to output */

s3c_pm_debug_init_uart();

}

#else

#define s3c_pm_debug_init() do { } while(0)

#endif /* CONFIG_SAMSUNG_PM_DEBUG */

/* Save the UART configurations if we are configured for debug. */

unsigned char pm_uart_udivslot;

#ifdef CONFIG_SAMSUNG_PM_DEBUG

struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];

static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)

{

void __iomem *regs = S3C_VA_UARTx(uart);

save->ulcon = __raw_readl(regs + S3C2410_ULCON);

save->ucon = __raw_readl(regs + S3C2410_UCON);

save->ufcon = __raw_readl(regs + S3C2410_UFCON);

save->umcon = __raw_readl(regs + S3C2410_UMCON);

save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);

if (pm_uart_udivslot)

save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);

S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",

uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);

}

static void s3c_pm_save_uarts(void)

{

struct pm_uart_save *save = uart_save;

unsigned int uart;

for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)

s3c_pm_save_uart(uart, save);

}

static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)

{

void __iomem *regs = S3C_VA_UARTx(uart);

s3c_pm_arch_update_uart(regs, save);

__raw_writel(save->ulcon, regs + S3C2410_ULCON);

__raw_writel(save->ucon, regs + S3C2410_UCON);

__raw_writel(save->ufcon, regs + S3C2410_UFCON);

__raw_writel(save->umcon, regs + S3C2410_UMCON);

__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);

if (pm_uart_udivslot)

__raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);

}

static void s3c_pm_restore_uarts(void)

{

struct pm_uart_save *save = uart_save;

unsigned int uart;

for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)

s3c_pm_restore_uart(uart, save);

}

#else

static void s3c_pm_save_uarts(void) { }

static void s3c_pm_restore_uarts(void) { }

#endif

/* The IRQ ext-int code goes here, it is too small to currently bother

* with its own file. */

unsigned long s3c_irqwake_intmask = 0xffffffffL;

unsigned long s3c_irqwake_eintmask = 0xffffffffL;

int s3c_irqext_wake(unsigned int irqno, unsigned int state)

{

unsigned long bit = 1L << IRQ_EINT_BIT(irqno);

if (!(s3c_irqwake_eintallow & bit))

return -ENOENT;

printk(KERN_INFO "wake %s for irq %d\n",

state ? "enabled" : "disabled", irqno);

if (!state)

s3c_irqwake_eintmask |= bit;

else

s3c_irqwake_eintmask &= ~bit;

return 0;

}

/* helper functions to save and restore register state */

/**

* s3c_pm_do_save() - save a set of registers for restoration on resume.

* @ptr: Pointer to an array of registers.

* @count: Size of the ptr array.

*

* Run through the list of registers given, saving their contents in the

* array for later restoration when we wakeup.

*/

void s3c_pm_do_save(struct sleep_save *ptr, int count)

{

for (; count > 0; count--, ptr++) {

ptr->val = __raw_readl(ptr->reg);

S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);

}

}

/**

* s3c_pm_do_restore() - restore register values from the save list.

* @ptr: Pointer to an array of registers.

* @count: Size of the ptr array.

*

* Restore the register values saved from s3c_pm_do_save().

*

* Note, we do not use S3C_PMDBG() in here, as the system may not have

* restore the UARTs state yet

*/

void s3c_pm_do_restore(struct sleep_save *ptr, int count)

{

for (; count > 0; count--, ptr++)

__raw_writel(ptr->val, ptr->reg);

}

/**

* s3c_pm_do_restore_core() - early restore register values from save list.

*

* This is similar to s3c_pm_do_restore() except we try and minimise the

* side effects of the function in case registers that hardware might need

* to work has been restored.

*

* WARNING: Do not put any debug in here that may effect memory or use

* peripherals, as things may be changing!

*/

void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)

{

for (; count > 0; count--, ptr++)

__raw_writel(ptr->val, ptr->reg);

}

/* s3c2410_pm_show_resume_irqs

*

* print any IRQs asserted at resume time (ie, we woke from)

*/

static void s3c_pm_show_resume_irqs(int start, unsigned long which,

unsigned long mask)

{

int i;

which &= ~mask;

for (i = 0; i <= 31; i++) {

if (which & (1L<<i)) {

S3C_PMDBG("IRQ %d asserted at resume\n", start+i);

}

}

}

bool s3c_pm_check_pending_interrupt(void)

{

bool ret=true;

unsigned int s5pc11x_pm_wakeup_eint1_pend = 0;

unsigned int s5pc11x_pm_wakeup_eint2_pend = 0;

s5pc11x_pm_wakeup_eint1_pend =__raw_readl(S5PV210_EINT1PEND);

s5pc11x_pm_wakeup_eint2_pend =__raw_readl(S5PV210_EINT2PEND);

if(s5pc11x_pm_wakeup_eint1_pend) {

if(s5pc11x_pm_wakeup_eint1_pend & EINTPEND1_BIT_ONEDRAM) {

printk(KERN_DEBUG "%s: cp interrupt pending.\n", __func__);

ret=false;

}

}

if(s5pc11x_pm_wakeup_eint2_pend) {

if(s5pc11x_pm_wakeup_eint2_pend & EINTPEND2_BIT_MICROUSB) {

printk(KERN_DEBUG "%s: micro usb interrupt pending.\n", __func__);

ret=false;

}

}

return ret;

}

void (*pm_cpu_prep)(void);

void (*pm_cpu_sleep)(void);

void (*pm_cpu_restore)(void);

#define any_allowed(mask, allow) (((mask) & (allow)) != (allow))

/* s3c_pm_enter

*

* central control for sleep/resume process

*/

static int s3c_pm_enter(suspend_state_t state)

{

static unsigned long regs_save[16];

/* ensure the debug is initialised (if enabled) */

/* 20110210 - check pending interrupt to wakeup device */

if(!s3c_pm_check_pending_interrupt())

{

printk(KERN_ERR "interrupt pending. wakeup!!(1)\n", __func__);

return -EINVAL;

}

/* 20110125 - control power of moviNAND at PM and add 400ms delay for stabilization of moviNAND. */

gpio_set_value(GPIO_MASSMEMORY_EN, 0);

mdelay(400);

/* 20110210 - check pending interrupt to wakeup device */

if(!s3c_pm_check_pending_interrupt())

{

printk(KERN_ERR "interrupt pending. wakeup!!(2)\n", __func__);

return -EINVAL;

}

s3c_pm_debug_init();

S3C_PMDBG("%s(%d)\n", __func__, state);

if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {

printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);

return -EINVAL;

}

/* check if we have anything to wake-up with... bad things seem

* to happen if you suspend with no wakeup (system will often

* require a full power-cycle)

*/

if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&

!any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {

printk(KERN_ERR "%s: No wake-up sources!\n", __func__);

printk(KERN_ERR "%s: Aborting sleep\n", __func__);

return -EINVAL;

}

/* store the physical address of the register recovery block */

s3c_sleep_save_phys = virt_to_phys(regs_save);

S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

/* save all necessary core registers not covered by the drivers */

s3c_pm_save_gpios();

s3c_pm_save_uarts();

s3c_pm_save_core();

config_sleep_gpio();

/* set the irq configuration for wake */

s3c_pm_configure_extint();

S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",

s3c_irqwake_intmask, s3c_irqwake_eintmask);

s3c_pm_arch_prepare_irqs();

/* call cpu specific preparation */

pm_cpu_prep();

/* flush cache back to ram */

flush_cache_all();

s3c_pm_check_store();

/* clear wakeup_stat register for next wakeup reason */

__raw_writel(__raw_readl(S5P_WAKEUP_STAT), S5P_WAKEUP_STAT);

/* send the cpu to sleep... */

s3c_pm_arch_stop_clocks();

/* s3c_cpu_save will also act as our return point from when

* we resume as it saves its own register state and restores it

* during the resume. */

pmstats->sleep_count++;

pmstats->sleep_freq = __raw_readl(S5P_CLK_DIV0);

s3c_cpu_save(regs_save);

pmstats->wake_count++;

pmstats->wake_freq = __raw_readl(S5P_CLK_DIV0);

/* restore the cpu state using the kernel's cpu init code. */

cpu_init();

fiq_glue_resume();

local_fiq_enable();

s3c_pm_restore_core();

s3c_pm_restore_uarts();

s3c_pm_restore_gpios();

s5pv210_restore_eint_group();

s3c_pm_debug_init();

/* restore the system state */

if (pm_cpu_restore)

pm_cpu_restore();

/* check what irq (if any) restored the system */

s3c_pm_arch_show_resume_irqs();

S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

/* LEDs should now be 1110 */

s3c_pm_debug_smdkled(1 << 1, 0);

s3c_pm_check_restore();

/* ok, let's return from sleep */

S3C_PMDBG("S3C PM Resume (post-restore)\n");

return 0;

}

/* callback from assembly code */

void s3c_pm_cb_flushcache(void)

{

flush_cache_all();

}

static int s3c_pm_prepare(void)

{

/* prepare check area if configured */

s3c_pm_check_prepare();

return 0;

}

static void s3c_pm_finish(void)

{

s3c_pm_check_cleanup();

}

static struct platform_suspend_ops s3c_pm_ops = {

.enter = s3c_pm_enter,

.prepare = s3c_pm_prepare,

.finish = s3c_pm_finish,

.valid = suspend_valid_only_mem,

};

/* s3c_pm_init

*

* Attach the power management functions. This should be called

* from the board specific initialisation if the board supports

* it.

*/

int __init s3c_pm_init(void)

{

printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");

pmstats_init();

suspend_set_ops(&s3c_pm_ops);

return 0;

}

I think the flush cache back to ram function could be the culprit.

Im so sorry.