 When deterministic memory pages are accessed, the attribute is propagated through all the levels of the memory hierarchy. Clearly, the hardware needs to be designed to ensure real-time handling of deterministic memory requests. To illustrate the potentialities of the new abstraction, we also propose a novel design for a shared cache controller that takes advantage of deterministic memory. Minimum cache space is guaranteed for deterministic memory, while unused cache space is left available to non-real-time applications. We implemented OS support for deterministic memory in the Linux kernel; and we evaluated the proposed hardware modifications in a cycle-accurate full-system simulator. We study the effectiveness of our approach on a set of synthetic and real benchmarks.
<coherence>  When deterministic memory pages are accessed, the attribute is propagated through all the levels of the memory hierarchy. Clearly, the hardware needs to be designed to ensure real-time handling of deterministic memory requests. To illustrate the potentialities of the new abstraction, we also propose a novel design for a shared cache controller that takes advantage of deterministic memory. Minimum cache space is guaranteed for deterministic memory, while unused cache space is left available to non-real-time applications. We implemented OS support for deterministic memory in the Linux kernel; and we evaluated the proposed hardware modifications in a cycle-accurate full-system simulator. We study the effectiveness of our approach on a set of synthetic and real benchmarks.
 When deterministic memory pages are accessed, the effectiveness of our approach on a set of synthetic and real benchmarks.