 We choose the lattice-Boltzmann method (LBM)  as a prototype for this scenario in order to show if and how single-chip performance and power characteristics can be generalized to the highly parallel case.
<clarity>  We choose the lattice-Boltzmann method (LBM)  as a prototype for this scenario in order to show if and how single-chip performance and power characteristics can be generalized to the highly parallel case.
 We choose the lattice-Boltzmann method (LBM) as a prototype scenario to investigate if and how single-chip performance and power characteristics can be generalized to the highly parallel case.