Multiple patterning lithography (MPL) has been widely adopted in advanced technology nodes of VLSI manufacturing. As a key step in the design flow, layout decomposition for MPL is critical to design closure. Various algorithms have been proposed to speedup layout decomposition and meanwhile maintain the performance . However, due to the complicated design flow , heavy engineering effort for integration and tuning is required to reproduce them, raising the bar for further advancing the field. This paper presents OpenMPL [1], an open-source multiple patterning layout decomposition framework, with  efficient implementations of various state-of-the-art algorithms . Experiments are conducted on widely-recognized benchmarks and promising results are demonstrated .
Multiple patterning lithography has been widely adopted in advanced technology nodes of VLSI manufacturing. As a key step in the design flow, multiple patterning layout decomposition (MPLD) is critical to design closure. Due to the NP-hardness of the general decomposition problem, various efficient algorithms have been proposed with high quality solutions . However, with increasingly complicated design flow and peripheral processing steps, developing a high-quality layout decomposer becomes more and more difficult, slowing down the further advancement in this field. This paper presents OpenMPL [1], an open-source layout decomposition framework, with well-separated peripheral processing and the core solving steps. We demonstrate the flexibility of the framework with efficient implementations of various state-of-the-art algorithms , which enable us to reproduce most of the recent results on widely-recognized benchmarks . We believe OpenMPL can pave the road for developing layout decomposition engines and stimulate further researches on this problem .
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(MPL)
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layout decomposition for MPL
multiple patterning layout decomposition (MPLD)
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Various
Due to the NP-hardness of the general decomposition problem, various efficient
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to speedup layout decomposition and meanwhile maintain the performance
with high quality solutions
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due to the
with increasingly
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, heavy engineering effort for integration and tuning is required to reproduce them, raising the bar for further advancing the
and peripheral processing steps, developing a high-quality layout decomposer becomes more and more difficult, slowing down the further advancement in this
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multiple patterning
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well-separated peripheral processing and the core solving steps. We demonstrate the flexibility of the framework with
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. Experiments are conducted
, which enable us to reproduce most of the recent results
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and promising results are demonstrated
. We believe OpenMPL can pave the road for developing layout decomposition engines and stimulate further researches on this problem