waashk/dblp huggingface dataset:
picsel: measuring user-perceived performance to control dynamic frequency scaling. the ultimate goal of a computer system is to satisfy its users. the success of architectural or system-level optimizations depends largely on having accurate metrics for user satisfaction. we propose to derive such metrics from information that is "close to flesh" and apparent to the user rather than from information that is "close to metal" and hidden from the user. we describe and evaluate picsel, a dynamic voltage and frequency scaling (dvfs) technique that uses measurements of variations in the rate of change of a computer's video output to estimate user-perceived performance. our adaptive algorithms, one conservative and one aggressive, use these estimates to dramatically reduce operating frequencies and voltages for graphically-intensive applications while maintaining performance at a satisfactory level for the user. we evaluate picsel through user studies conducted on a pentium m laptop running windows xp. experiments performed with 20 users executing three applications indicate that the measured laptop power can be reduced by up to 12.1%, averaged across all of our users and applications, compared to the default windows xp dvfs policy. user studies revealed that the difference in overall user satisfaction between the more aggressive version of picsel and windows dvfs were statistically insignificant, whereas the conservative version of picsel actually improved user satisfaction when compared to windows dvfs.
how low can you go?: recommendations for hardware-supported minimal tcb code execution. we explore the extent to which newly available cpu-based security technology can reduce the trusted computing base (tcb) for security-sensitive applications. we find that although this new technology represents a step in the right direction, significant performance issues remain. we offer several suggestions that leverage existing processor technology, retain security, and improve performance. implementing these recommendations will finally allow application developers to focus exclusively on the security of their own code, enabling it to execute in isolation from the numerous vulnerabilities in the underlying layers of legacy code.
parallelizing security checks on commodity hardware. speck (speculative parallel check) is a system thataccelerates powerful security checks on commodity hardware by executing them in parallel on multiple cores. speck provides an infrastructure that allows sequential invocations of a particular security check to run in parallel without sacrificing the safety of the system. speck creates parallelism in two ways. first, speck decouples a security check from an application by continuing the application, using speculative execution, while the security check executes in parallel on another core. second, speck creates parallelism between sequential invocations of a security check by running later checks in parallel with earlier ones. speck provides a process-level replay system to deterministically and efficiently synchronize state between a security check and the original process.we use speck to parallelize three security checks: sensitive data analysis, on-access virus scanning, and taint propagation. running on a 4-core and an 8-core computer, speck improves performance 4x and 7.5x for the sensitive data analysis check, 3.3x and 2.8x for theon-access virus scanning check, and 1.6x and 2x for the taint propagation check.
the design and implementation of microdrivers. device drivers commonly execute in the kernel to achieve high performance and easy access to kernel services. however, this comes at the price of decreased reliability and increased programming difficulty. driver programmers are unable to use user-mode development tools and must instead use cumbersome kernel tools. faults in kernel drivers can cause the entire operating system to crash. user-mode drivers have long been seen as a solution to this problem, but suffer from either poor performance or new interfaces that require a rewrite of existing drivers. this paper introduces the microdrivers architecture that achieves high performance and compatibility by leaving critical path code in the kernel and moving the rest of the driver code to a user-mode process. this allows data-handling operations critical to i/o performance to run at full speed, while management operations such as initialization and configuration run at reduced speed in user-level. to achieve compatibility, we present driverslicer, a tool that splits existing kernel drivers into a kernel-level component and a user-level component using a small number of programmer annotations. experiments show that as much as 65% of driver code can be removed from the kernel without affecting common-case performance, and that only 1-6 percent of the code requires annotations.
feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on cmps. extracting high-performance from the emerging chip multiprocessors (cmps) requires that the application be divided into multiple threads. each thread executes on a separate core thereby increasing concurrency and improving performance. as the number of cores on a cmp continues to increase, the performance of some multi-threaded applications will benefit from the increased number of threads, whereas, the performance of other multi-threaded applications will become limited by data-synchronization and off-chip bandwidth. for applications that get limited by data-synchronization, increasing the number of threads significantly degrades performance and increases on-chip power. similarly, for applications that get limited by off-chip bandwidth, increasing the number of threads increases on-chip power without providing any performance improvement. furthermore, whether an application gets limited by data-synchronization, or bandwidth, or neither depends not only on the application but also on the input set and the machine configuration. therefore, controlling the number of threads based on the run-time behavior of the application can significantly improve performance and reduce power. this paper proposes feedback-driven threading (fdt), a framework to dynamically control the number of threads using run-time information. fdt can be used to implement synchronization-aware threading (sat), which predicts the optimal number of threads depending on the amount of data-synchronization. our evaluation shows that sat can reduce both execution time and power by up to 66% and 78% respectively. similarly, fdt can be used to implement bandwidth-aware threading (bat), which predicts the minimum number of threads required to saturate the off-chip bus. our evaluation shows that bat reduces on-chip power by up to 78%. when sat and bat are combined, the average execution time reduces by 17% and power reduces by 59%. the proposed techniques leverage existing performance counters and require minimal support from the threading library.
exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors. integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. most of the current research thrusts using chip multiprocessors (cmps) as the baseline to analyze problems in various domains. one of the main design issues facing cmp systems is the growing number of snoops required to maintain cache coherency and to support self/cross-modifying code that leads to power and performance limitations. in this paper, we analyze the internal and external snoop behavior in a cmp system and relax the snoopy cache coherence protocol based on the program semantics and properties of the shared variables for saving power. based on the observations and analyses, we propose two novel techniques: selective snoop probe (ssp) and essential snoop probe (esp) to reduce power without compromising performance. our simulation results show that using the ssptechnique, 5% to 65% data cache energy savings per core for different processor configurations can be achieved with 1% to 2% performance improvement. we also show that 5% to 82% of data cache energy per core is spent on the non-essential snoop probes that can be saved using the esp technique.
picoserver: using 3d stacking technology to enable a compact energy efficient chip multiprocessor. in this paper, we show how 3d stacking technology can be used to implement a simple, low-power, high-performance chip multiprocessor suitable for throughput processing. our proposed architecture, picoserver, employs 3d technology to bond one die containing several simple slow processing cores to multiple dram dies sufficient for a primary memory. the 3d technology also enables wide low-latency buses between processors and memory. these remove the need for an l2 cache allowing its area to be re-allocated to additional simple cores. the additional cores allow the clock frequency to be lowered without impairing throughput. lower clock frequency in turn reduces power and means that thermal constraints, a concern with 3d stacking, are easily satisfied.the picoserver architecture specifically targets tier 1 server applications, which exhibit a high degree of thread level parallelism. an architecture targeted to efficient throughput is ideal for this application domain. we find for a similar logic die area, a 12 cpu system with 3d stacking and no l2 cache outperforms an 8 cpu system with a large on-chip l2 cache by about 14% while consuming 55% less power. in addition, we show that a picoserver performs comparably to a pentium 4-like class machine while consuming only about 1/10 of the power, even when conservative assumptions are made about the power consumption of the picoserver.
accurate branch prediction for short threads. multi-core processors, with low communication costs and high availability of execution cores, will increase the use of execution and compilation models that use short threads to expose parallelism. current branch predictors seek to incorporate large amounts of control flow history to maximize accuracy. however, when that history is absent the predictor fails to work as intended. thus, modern predictors are almost useless for threads below a certain length. using a speculative multithreaded (spmt) architecture as an example of a system which generates shorter threads, this work examines techniques to improve branch prediction accuracy when a new thread begins to execute on a different core. this paper proposes a minor change to the branch predictor that gives virtually the same performance on short threads as an idealized predictor that incorporates unknowable pre-history of a spawned speculative thread. at the same time, strong performance on long threads is preserved. the proposed technique sets the global history register of the spawned thread to the initial value of the program counter. this novel and simple design reduces branch mispredicts by 29% and provides as much as a 13% ipc improvement on selected spec2000 benchmarks.
tapping into the fountain of cpus: on operating system support for programmable devices. the constant race for faster and more powerful cpus is drawing to a close. no longer is it feasible to significantly increase the speed of the cpu without paying a crushing penalty in power consumption and production costs. instead of increasing single thread performance, the industry is turning to multiple cpu threads or cores (such as smt and cmp) and heterogeneous cpu architectures (such as the cell broadband engine). while this is a step in the right direction, in every modern pc there is a wealth of untapped compute resources. the nic has a cpu; the disk controller is programmable; some high-end graphics adaptersare already more powerful than host cpus. some of these cpus can perform some functions more efficiently than the host cpus. our operating systems and programming abstractions should be expanded to let applications tap into these computational resources and make the best use of them. therefore, we propose the hydra framework, which lets application developers use the combined power of every compute resource in a coherent way. hydra is a programming model and a runtime support layer which enables utilization of host processors as well as various programmable peripheral devices' processors. we present the frameworkand its application for a demonstrative use-case, as well as provide a thorough evaluation of its capabilities. using hydra we were able to cut down the development cost of a system that uses multiple heterogenous compute resources significantly.
toward molecular programming with dna. biological organisms are beautiful examples of programming. the program and data are stored in biological molecules such as dna, rna, and proteins; the algorithms are carried out by molecular and biochemical processes; and the end result is the creation and function of an organism. if we understood how to program molecular systems, what could we create? lifelike technologies whose basic operations are chemical reactions? the fields of chemistry, physics, biology, and computer science are converging as we begin to synthesize molecules, molecular machines, and molecular systems of ever increasing complexity, leading to subdisciplines such as dna nanotechnology, dna computing, and synthetic biology. having demonstrated simple devices and systems -- self-assembled structures, molecular motors, chemical logic gates -- researchers are now turning to the question of how to create large-scale integrated systems. to do so, we must learn how to manage complexity: how to efficiently specify the structure and behavior of intricate molecular systems, how to compile such specifications down to the design of molecules to be synthesized in the lab, and how to ensure that such systems function robustly. these issues will be illustrated for chemical logic circuits based on cascades of dna hybridization reactions. bio erik winfree is an associate professor in computer science, computation & neural systems, and bioengineering at caltech. winfree is the recipient of the feynman prize for nanotechnology (2006), the nsf pecase/career award (2001), the onr young investigators award (2001), a macarthur fellowship (2000), and mit technology review's first tr100 list of "top young innovators" (1999). prior to joining the faculty at caltech in 2000, winfree was a lewis thomas postdoctoral fellow in molecular biology at princeton, and a visiting scientist at the mit ai lab. winfree received a b.s. in mathematics w/ computer science from the university of chicago in 1991, and a ph.d. in computation & neural systems from caltech in 1998. his website is http://dna.caltech.edu/~winfree/.
combining head tracking and mouse input for a gui on multiple monitors. the use of multiple lcd monitors is becoming popular as prices are reduced, but this creates problems for window management and switching between applications. for a single monitor, eye tracking can be combined with the mouse to reduce the amount of mouse movement, but with several monitors the head is moved through a large range of positions and angles which makes eye tracking difficult. we thus use head tracking to switch the mouse pointer between monitors and use the mouse to move within each monitor. in our experiment users required significantly less mouse movement with the tracking system, and preferred using it, although task time actually increased. a graphical prompt (flashing star) prevented the user losing the pointer when switching monitors. we present discussions on our results and ideas for further developments.
an approach to evaluation of software visualization. this paper briefly describes the work presented by the authors in the 1997 chi development consortium. this work focuses on several aspects of software visualization (sv), including the evaluation of sv systems and the application of sv in the domain of parallel computation.
the affective connection: how and when users communicate emotion. affective computer systems which recognize human emotions or use emotion in their displays have potential to enhance human-computer interaction (hci). wizard-of-oz (woz) methods and experimental design have enabled recording, analysis and comparison of emotional interaction of participants with an apparently 'emotional' machine and a standard 'non-emotional' version. early results suggest participants use subtle emotional displays during hci, for example through posture, body movement, sounds and facial expression. further analysis will confirm if they show more emotion when they believe the system recognises their emotions, or when the system varies its behaviour in response to their emotional expression. this will contribute to hci knowledge of affective computing by emphasizing the user's perspective, demonstrating the usefulness of woz techniques, and raising questions about future directions of affective computing.
e-motional advantage: performance and satisfaction gains with affective computing. emotions are now recognized as complex human control systems, crucial to decision making, creativity, playing and learning. affective technologies may offer improved interaction and commercial promise. in the past, research has focused on technical development work, leaving many questions about user preferences unanswered. for this user-centered study, 60 participants played a simple 'word ladder' game under different controlled conditions. using 2 x 2 factorial design, and a wizard of oz scenario, half the participants interacted with a system that adapted on the basis of the user's emotional expression and half were told the system could react to their emotional expressions. we established that when using an apparently affective system, users perform significantly better and report themselves as feeling significantly happier. we also discuss behavioral responses to the different conditions. these results are relevant to the design of future affective systems.
shownpass: an easy access control with a displayed password. access control is one of the most important issue with ubiquitous networking environment. traditional access control methods are mainly considering authentication of registered user or device. therefore, it is troublesome to allow a visitor to use a networked resource in an office, without accessiblity to other resources. we propose a new access control method using frequently changing passwords displayed beside a resource. this method can be implemented without any special hardware like a sensor.
fitster: social fitness information visualizer. we present fitster, a social visualization interface that supports fitness motivation among busy people struggling to exercise. among our pilot group of busy graduate students, we found that a popular time-saving strategy is to recast exercise in terms of everyday, informal activities. fitster employs pedometer data to support activity tracking, goal setting, and motivation through virtual competitions and teamwork. it contributes to the human-computer interaction (hci) and health domains by identifying a new facet of exercise behavior and by offering a lightweight social interface to promote fitness motivation and enjoyment.
auraorb: social notification appliance. one of the problems with notification appliances is that they can be distracting when providing information not of immediate interest to the user. in this paper, we present auraorb, an ambient notification appliance that deploys progressive turn taking techniques to minimize notification disruptions. auraorb uses eye contact sensing to detect user interest in an initially ambient light notification. once detected, it displays a text message with a notification heading visible from 360 degrees. touching the orb causes the associated message to be displayed on the user's computer screen.we performed an initial evaluation of auraorb's functionality using a set of heuristics tailored to ambient displays. results of our evaluation suggest that progressive turn taking techniques allowed auraorb users to access notification headings with minimal impact on their focus task.
introducing human-centered research to game design: designing game concepts for and with senior citizens. this paper introduces a human-centered methodology for innovating gameplay, based on ethnographic principles and participatory design. this methodology was applied in a project for designing game concepts for and with senior citizens. the research started off by observing and probing senior citizens in their 'natural habitat', researching what positive experiences occur in their daily life. these observed passions then became the input for brainstorm sessions. seniors and researchers generated game-ideas and, consequently, co-designed the selected ideas into game concepts.the results of this methodology are inspiring game concepts, directly grafted on the passions and desires of the senior. but more important than the actual game concepts, we conceived a model of passions in elderly life. this model provides game designers with an understanding of the ingredients that are fundamental to 'meaningful play' in elderly life.
using music as a communication medium. music is a rich communication medium, and there are some similarities between the job of a music composer and that of an hci designer (although their objectives may be different). whilst sound has been used in interfaces, its use has mainly been at a primitive level, often involving real-world sound. since music offers a highly structured set of mechanisms for communicating, it is surprising that there have been so few attempts at exploring its possibilities. our current activity involves investigations into the use of music in algorithmic audiolisation and program debugging.
cellular phone manuals: users' benefit from spatial maps. manuals of technical devices are often not very helpful to the user. this study investigates the influence of spatial instructions versus conventional linear step-by-step manuals on inexperienced users' performance handling cellular phones. results show a significant interaction between user age and manual. middle aged users profit more from the spatial information given in the manual that contains the phone's menu tree than from the step-by-step instruction, whereas subjects older than 50 show no improvement. it is concluded that manufacturers should consider the inclusion of spatial information on the cellular phones' menu structure in their manuals, as the majority of users would benefit.
a new approach of a context-adaptive search agent for automotive environments. the progress in electronic devices and therefore the growing amount of information in cars implicates the development of new strategies to cope with this amount of information for drivers. an intelligent search agent can help with navigation in deep hierarchies and in huge databases, and consequently has a high potential to increase the concentration on the primary driving task. the evaluation shows that a search agent concept reached a high user acceptance and the objective data proved observably acceleration in handling compared to deep hierarchical menu navigation.
ivo: interactive voting for the olympics. this paper describes the creation of an interactive audience voting system, ivo. the device is intended for diving and gymnastics events during the 2004 summer olympics in athens, greece. ivo is adaptable and can be incorporated into a wider range of sports and events. industrial design and interaction design methodologies were combined allowing us to create an iterative process which guided us through the project. this unique mixture of techniques allowed us to explore both the interface and usability, as well as form and ergonomics of this device. through the application of this methodology, we created an interactive voting system that is innovative and realistic for implementation during the 2004 olympics.