memory consistency and process coordination for sparc v8 multiprocessors (brief announcement)  weakening the memory consistency model of a multiprocess system improves its performance and scalability. however, these models sacrifice programmability because they create complex behaviors of shared memory. without the use of expensive, built-in synchronization, these models exhibit poor capabilities to support solutions for fundamental process coordination problems [2]. this leads programmers to aggressively use these forms of synchronization, incurring additional performance burdens on the system. a multiprocessor system constructed from sparc v8 [6] processors is one example of a system with weak memory consistency.  since use of synchronization primitives deteriorates performance, we are motivated to study the limitations and capabilities of weak memory consistency models without the use of these primitives. specifically, we want to know which weak memory consistency models have the ability to support solutions to fundamental process coordination problems without the use of explicit synchronization. if the use of explicit synchronization is avoidable, then efficient libraries for certain classes of applications can be built. this would ease the job of distributed application programmers and make their applications more efficient.  in the full paper [3], we study the capabilities of the two sparc memory consistency models total store ordering (tso) and partial store ordering (pso) to support solutions to fundamental process coordination problems without resorting to expensive synchronization primitives. to do so, a mathematical description of the behavior of these systems in terms of partial order constraints on possible computations is first derived. our definitions for tso and pso are proven to capture the machine description of the manufacturer.  also, they are expressed as a natural variant of sequential consistency [5], which facilitates the comparison of the sparc models to several proposed consistency models including processor consistency, causal consistency, and java consistency.  the process coordination problems studied in this paper are critical section coordination and producer/consumer coordination. these are fundamental patterns because they exist in a wide range of parallel and distributed applications. we distinguish two variants of producer/consumer coordination whose solution requirements differ: the set and queue variants. our results show that both tso and pso models are incapable of supporting a read/write solution to the critical section problem, but both can support such solutions to some variants of the producer/consumer problem.  one earlier attempt to define tso [4] resulted in a definition that is much stronger than what the sparc provides and lead to erroneous conclusions about the coordination capabilities of tso. in fact, we show that any program (with only read/write operations) that is correct for sequential consistency can be compiled into an equivalent program (with only read/write operations) that is correct for this erroneous definition of tso [3]. to the contrary, this paper proves that read/write operations are insufficient to solve certain coordination problems for tso and pso. another previous definition of the sparc models [1] was too complicated to be useful to programmers, whereas the definitions here are simple to understand and use. the original axiomatic specifications of tso and pso [6] are also complex and are not particularly useful for studying the questions addressed in this paper.  jalal kawash lisa higham