waashk/acm huggingface dataset:
delayed internet routing convergence  this paper examines the latency in internet path failure, failover, and repair due to the convergence properties of interdomain routing. unlike circuit- switched paths which exhibit failover on the order of milliseconds, our experimental measurements show that interdomain routers in the packet-switched internet may take tens of minutes to reach a consistent view of the network topology after a fault. these delays stem temporary routing table fluctuations formed during the operation of the border gateway protocol (bgp) path selection process on internet backbone routers. during these periods delayed convergence, we show that end-to-end internet paths will experience intermittent loss of connectivity, as well as increased packet loss and latency. we present a two-year study of internet routing convergence through the experimental instrumentation of key portions of the internet infrastructure, including both passive data collection and fault-injection machines at internet exchange points. based on data from the injection and measurement of several hundred thousand interdomain routing faults, we describe several unexpected properties of convergence and show that the measured upperbound on internet interdomain routing convergence delay is an order of magnitude slower than previously thought. our analysis also shows that the upper theoretic computational bound on the number of router states and control messages exchanged during the process of bgp convergence is factorial with respect to the number of autonomous systems in the internet. finally, we demonstrate that much of the observed convergence delay stems form specific router vendor implementation decisions and ambiguity in the bgp specification.  craig labovitz abha ahuja abhijit bose farnam jahanian
optimal multiphase complete exchange on circuit-switched hypercube architectures  the complete-exchange communication primitive on a distributed memory multiprocessor calls for every processor to send a message to every other processor, each such message being unique. for circuit-switched hypercube networks there are two well-known schemes for implementing this primitive. direct exchange minimizes communication volume but maximizes startup costs, while standard exchange minimizes startup costs at the price of higher communication volume. this paper analyzes a hybrid, which can be thought of as a sequence of direct echange phases, applied to variable-sized subcubes. this paper examines the problem of determining the optimal subcube dimension sizes di for every phase. we show that optimal performance is achieved using some equi-partition, where |di dj|≤1 for all phases i and j. we study the behavior of the optimal partition as a function of machine communication parameters, hypercube dimension, and message size, and show that the optimal partition can be determined with no more than 2< ;rcd>d+1& lt;rp post="par"> comparisons. finally we validate the model empirically, and for certain problem instances observe as much as a factor of two improvement over the other methods.  david m. nicol shahid h. bokhari
mtr: a modified token ring protocol and its performance  devising efficient and high performance communication protocols for computer networks is a challenging issue. this paper presents a new modified token ring protocol (mtr) for token ring lans. the idea behind proposing this protocol is to improve the performance of the standard (traditional) token ring protocol (str). the advantage of the mtr protocol over the str protocol is its capability of bypassing idle stations in the ring. this is achieved by utilizing two of the reserved bits in the frame status (fs) field. the utilized bits are called transmission reservation bits (tr-bits). the tr-bits operate as an implicit token while they are circulating around the ring with their associated packet. our simulation experiments show that the mtr protocol has higher ring throughput and lower packet delay than that of the str protocol. for high traffic conditions the mtr protocol has shortened the packet delay down to 45% as compared to the str protocol. throughput improvement provided by the mtr can reach about 6% as compared to the str protocol. the mtr protocol is characterized by its fairness, simplicity and cost-effectiveness.  m. s. obaidat m. a. al-rousan
critical path analysis of tcp transactions  improving the performance of data transfers in the internet (such as web transfers) requires a detailed understanding of when and how delays are introduced. unfortunately, the complexity of data transfers like those using http is great enough that identifying the precise causes of delays is difficult. in this paper we describe a method for pinpointing where delays are introduced into applications like http by using critical path analysis. by constructing and profiling the critical path, it is possible to determine what fraction of total transfer latency is due to packet propagation, network variation (e.g., queuing at routers or route fluctuation). packet losses, and delays at the server and at the client. we have implemented our techique in a tool called tcpeval that automates critical path analysis for web transactions. we show that our analysis method is robust enough to analyze traces taken for two different tcp implementations (linux and freebsd). to demonstrate the utility of our approach, we present the results of critical path analysis for a set of web transactions taken over 14 days under a variety of server and network conditions. the results show that critical path analysis can shed considerable light on the causes of delays in web transfers, and can expose subtleties in the behavior of the entire end-to-end system.
scaling video conferencing through spatial tiling  we describe an approach to scaling video conferencing, with the use of active agents. such agents tilenvideo frames into one, by modification of their respective meta-data and adjustment of their video frame rate if necessary. the spatial tiling agents are located within a network, and participants in the session unicast video to the "closest" agent. the agent then multicast the tiled video to the group of all participants. results show that spatial tiling increases the ability of the end-user to receive large numbers of video streams and reduces network load both in terms of bandwidth and in packets per second. the result is a significant scaling boost to video conferencing systems.  ladan gharai colin perkins allison mankin
leave-in-time: a new service discipline for real-time communications in a packet-switching network leave-in-time is a new rate-based service discipline for packet-switching nodes in a connection-oriented data network. leave-in- time provides sessions with upper bounds on end-to-end delay, delay jitter, buffer space requirements, and an upper bound on the probability distribution of end-to-end delays. a leave-in-time session's guarantees are completely determined by the dynamic traffic behavior of that session, without influence from other sessions. this results in the desirable property that these guarantees are expressed as functions derivable simply from a single fixed- rate server (with rate equal to the session's reserved rate) serving only that session. leave-in-time has a non-work-conserving mode of operation for sessions desiring low end-to-end delay jitter. finally, leave-in-time supports the notion of _delay shifting_, whereby the delay bounds of some sessions may be decreased at the expense of increasing those of other sessions. we present a set of admission control algorithms which support the ability to do delay shifting in a systematic way. norival r. figueira joseph pasquale
on the equivalent bandwidth of self-similar sources  this article presents a method for the computation of the equivalent bandwidth of an aggregate of heterogeneous self-similar sources, as well as the time scales of interest for queueing systems fed by a fractal brownian motion (fbm) process. moreover, the fractal leaky bucket, a novel policing mechanism capable of accurately monitoring self-similar sources, is introduced.  nelson l. s. fonseca gilberto s. mayor cesar a. v. neto
run-time generation of hps microinstructions from a vax instruction stream  the vax architecture is a popular isp architecture that has been implemented in several different technologies targeted to a wide range of performance specifications. however, it has been argued that the vax has specific characteristics which preclude a very high performance implementation. we have developed a microarchitecture (hps) which is specifically intended for implementing very high performance computing engines. our model of execution is a restriction on fine granularity data flow. in this paper, we concentrate on one particular aspect of an hps implementation of the vax architecture: the generation of hps microinstructions (i.e. data flow nodes) from a vax instruction stream.  y. n. patt s. w. melvin w. m. hwu m. c. shebanow c. chen
an analysis of correlation and predictability: what makes two-level branch predictors work pipeline flushes due to branch mispredictions is one of the most serious problems facing the designer of a deeply pipelined, superscalar processor. many branch predictors have been proposed to help alleviate this problem, including two-level adaptive branch predictors and hybrid branch predictors.numerous studies have shown which predictors and configurations best predict the branches in a given set of benchmarks. some studies have also investigated effects, such as pattern history table interference, that can be detrimental to the performance of these predictors. however, little research has been done on which characteristics of branch behavior make predictors perform well.in this paper, we investigate and quantify reasons why branches are predictable. we show that some of this predictability is not captured by the two-level adaptive branch predictors. an understanding of the predictability of branches may lead to insights ultimately resulting in better or less complex predictors. we also investigate and quantify what fraction of the branches in each benchmark is predictable using each of the methods described in this paper. marius evers sanjay j. patel robert s. chappell yale n. patt
why a ring?  in a world increasingly populated with ethernets and ethernet-like nets a few sites continue to experiment with rings of active repeaters for local data communication. this paper explores some of the engineering problems involved in designing a ring that has no central control, and then compared the m.i.t.-designed ring with ethernet on a variety of operational and subtle technical grounds, on each of which the ring may possess important or interesting advantages.  jerome h. saltzer david d. clark kenneth t. pogran
an evaluation of audio-centric cmu wearable computers  carnegie mellon's wearable computers project is defining the future for not only computing technologies but also for the use of computers in daily activities. fifteen generations of cmu's wearable computers are evolutionary steps in the quest for new ways to improve and augment the integration of information in the mobile environment. the complexity of their architectures has increased by a factor of over 200, and the complexity of the applications has also increased significantly. in this paper, we provide a taxonomy of their capabilities and evaluate the performance of audio-centric cmu wearable computers.  asim smailagic
optimal processor interconnection topologies  this paper proposes the optimal processor interconnection topologies for parallel processing. the topologies are optimal with respect to the performance/cost ratio under the controlled message transfer delay and can be systematically constructed for an arbitrary number of processors. the addition and the deletion of processors are simple and done with the minimum number of bus reconnections. the message transfer delay, as well as the reliability, can be controlled by changing the degree of the topology. owing to these properties, the optimal interconnection topologies are suitable for many kinds of parallel processing systems and algorithms.  mamoru maekawa
hierarchical registers for scientific computers  simulations of scientific programs running on traditional scientific computer architectures show that execution with hundreds of registers can be more than twice as fast as execution with only eight registers. in addition, execution with a small number of fast registers and hundreds of slower registers can be as fast as execution with hundreds of fast registers. a hierarchical organization of fast and slow registers is presented, register-allocation strategies are discussed, and a novel, indirect, register-addressing mechanism is described.  j. a. swensen y. n. patt
net/one: a commercial local area network  net/one is a general purpose, local area communications network which interconnects data and word processing equipment within facilities such as office buildings, factories, laboratories, and computing centers. it is a system designed to maximize modularity, growth, and flexibility. from an initial installation of a few nodes, a network can be incrementally expanded to a communication system for thousands of digital devices.  using a high-speed, bit serial bus architecture, net/one supports point-to- point communications for computer systems, terminals, word processors, printers, and other digital devices. it also provides packet switched broadcast communications for intelligent devices and host computers. in addition, net/one allows protocol translation between incompatible devices. no host software changes are required to utilize net/one's virtual circuit capabilities. devices can be connected to net/one in several different ways allowing easy reconfiguration and a free choice of equipment vendors.  net/one includes a number of modular components. a network administrative station measures, monitors, and controls network activity. a user programmable network interface unit allows unique management of specific interface functions. a network development system supports custom program development and testing.  charlie bass
mobicast: a multicast scheme for wireless networks  in this paper, we propose a multicast scheme known as mobicast that is suitable for mobile hosts in an internetwork environment with small wireless cells. our scheme adopts a hierarchical mobility management approach to isolate the mobility of the mobile hosts from the main multicast delivery tree. each foreign domain has a domain foreign agent. we have simulated our scheme using the network simulator and the measurements show that our multicast scheme is effective in minimizing disruptions to a multicast session due to the handoffs of the mobile group member, as well as reducing packet loss when a mobile host crosses cell boundaries during a multicast session.
reconfigurable transputer systems  this paper introduces the t800 transputer from inmos, for use as a component in reconfigurable multiple- processor systems. the architecture of such systems will be considered together with the limitations; being static and of fixed valence. solutions to these limitations can be found in virtualising the networks, but this introduces inefficiencies and the potential for deadlock. the latter can be eliminated by careful design, but the former requires further chip development. finally the paper will consider programming methodologies and systems for this and other multiple-processor architectures.  c. jesshope
a characterization of processor performance in the vax-11/780  this paper reports the results of a study of vax-11/780 processor performance using a novel hardware monitoring technique. a micro-pc histogram monitor was built for these measurements. it keeps a count of the number of microcode cycles executed at each microcode location. measurement experiments were performed on live timesharing workloads as well as on synthetic workloads of several types. the histogram counts allow the calculation of the frequency of various architectural events, such as the frequency of different types of opcodes and operand specifiers, as well as the frequency of some implementation-specific events, such as translation buffer misses. the measurement technique also yields the amount of processing time spent in various activities, such as ordinary microcode computation, memory management, and processor stalls of different kinds. this, paper reports in detail the amount of time the "average" vax instruction spends in these activities.  joel s. emer douglas w. clark
airmail: a link-layer protocol for wireless networks  this paper describes the design and performance of a link-layer protocol for indoor and outdoor wireless networks. the protocol is asymmetric to reduce the processing load at the mobile, reliability is established by a combination of automatic repeat request and forward error correction, and link-layer packets are transferred appropriately during handoffs. the protocol is named airmail (asymmetric reliable mobile access in link-layer). the asymmetry is needed in the design because the mobile terminals have limited power and smaller processing capability than the base stations. the key ideas in the asymmetric protocol design consist of placing bulk of the intelligence in the base station as opposed to placing it symmetrically, in requiring the mobile terminal to combine several acknowledgments into a single acknowledgment to conserve power, and in designing the base stations to send periodic status messages, while making the acknowledgment from the mobile terminal event- driven. the asymmetry in the protocol design results in a one-third reduction of compiled code. the forward error correction technique incorporates three levels of channel coding which interact adaptively. the motivation for using a combination of forward error correction and link-layer retransmissions is to obtain better performance in terms of end-to-end throughput and latency by correcting errors in an unreliable wireless channel in addition to end-to-end correction rather than by correcting errors only by end-to-end retransmissions. the coding overhead is changed adaptively so that bandwidth expansion due to forward error correction is minimized. integrity of the link during handoffs (in the face of mobility) is handled by window management and state transfer. the protocol has been implemented. experimental performance results based on the implementation are presented.  ender ayanoglu sanjoy paul thomas f. laporta krishan k. sabnani richard d. gitlin
using a wearable computer for continuous learning and support  a wearable computer with an electronic performance support system can provide continuous learning and support to mobile workers. this system allows mobile users to ask for advice, receive instruction, access productivity tools, communicate with others, and assess their knowledge on a continuous basis. workers can get this support when they need it, where they need it. compared to traditional training and support, this new technique may provide substantial performance improvements. we are developing an architecture for this type of support system and are currently investigating the use of this system to help mobile factory workers perform their tasks.  lawrence j. najjar chris thompson jennifer j. ockerman
measured capacity of an ethernet: myths and reality  ethernet, a 10 mbit/sec csma/cd network, is one of the most successful lan technologies. considerable confusion exists as to the actual capacity of an ethernet, especially since some theoretical studies have examined operating regimes that are not characteristic of actual networks. based on measurements of an actual implementation, we show that for a wide class of applications, ethernet is capable of carrying its nominal bandwidth of useful traffic, and allocates the bandwidth fairly. we discuss how implementations can achieve this performance, describe some problems that have arisen in existing implementations, and suggest ways to avoid future problems.  d. r. boggs j. c. mogul c. a. kent
micros vs. mainframes (panel)  with the advent of powerful, inexpensive microcomputers, the possibility of performing simulations on equipment other than mainframes has become a reality. is this reality at this point more than just a matter of demonstration of small models or an educational tool? have the mainframe and supermini monoliths lost their place in the simulation community to micros just as so many business applications have been downloaded to small systems?  or have we seen equipment and software so far which is not yet capable of taking on the simulation tasks have traditionally been done by large-scale systems?  val silbey
toward a framework for power control in cellular systems  efficiently sharing the spectrum resource is of paramount importance in wireless communication systems, in particular in personal communications where large numbers of wireless subscribers are to be served. spectrum resource sharing involves protecting other users from excessive interference as well as making receivers more tolerant to this interference. transmitter power control techniques fall into the first category. in this paper we describe the power control problem, discuss its major factors, objective criteria, measurable information and algorithm requirements. we attempt to put the problem in a general framework and propose an evolving knowledge-bank to share, study and compare between algorithms.  zvi rosberg jens zander
the end-to-end effects of internet path selection the path taken by a packet traveling across the internet depends on a large number of factors, including routing protocols and per-network routing policies. the impact of these factors on the end-to-end performance experienced by users is poorly understood. in this paper, we conduct a measurement-based study comparing the performance seen using the "default" path taken in the internet with the potential performance available using some alternate path. our study uses five distinct datasets containing measurements of "path quality", such as round- trip time, loss rate, and bandwidth, taken between pairs of geographically diverse internet hosts. we construct the set of potential alternate paths by composing these measurements to form new synthetic paths. we find that in 30-80% of the cases, there is an alternate path with significantly superior quality. we argue that the overall result is robust and we explore two hypotheses for explaining it. stefan savage andy collins eric hoffman john snell thomas anderson
improving 3d geometry transformations on a simultaneous multithreaded simd processor  in this paper we evaluate the performance of an smt processor used as the geometry processor for a 3d polygonal rendering engine. to evaluate this approach, we consider pmesa (a parallel version of mesa) which parallelizes the geometry stage of the 3d pipeline. we show that smt is suitable for 3d geometry and we characterize the execution of the geometry stage in term of memory hierarchy, which is the main bottleneck. the results show that latency is not fully recovered by smt; the use of l2 data prefetching does not succeed in increasing the performance. we show that this problem comes from a pollution of the instruction window by the threads experiencing l2 cache misses, thus reducing the window available for the other threads. we thus propose dcpred, a hardware mechanism to predict l2 misses and control this pollution. coupled with l2 data prefetching, dcpred achieves gains up to 21% over the baseline smt.  claude limousin julien sebot alexis vartanian nathalie drach-temam