waashk/acm huggingface dataset:
switch directed dynamic causal networks - a paradigm for electronic system diagnosis  electronic systems diagnosis, be it at the device, board, or system level, is a complex and time consuming task. various techniques have been developed to provide design aids to the maintenance technician, each with its own successes and limitations, typically in terms of performance versus complexity issues. this paper demonstrates a novel integration of such techniques to provide for an effective and efficient approach to expert diagnosis of complex systems.  the integration of behavior graph concepts and causal network analysis allows for the diagnosis of systems at a fairly high level of abstraction, allows for on-line diagnosis with or without explicit control of input stimuli, and provides for such diagnosis with minimal design detail or apriori fault assumptions.  r. m. mcdermott d. stern
realization of a multi-valued inner product step processor using ccd's (abstract only)  systolic arrays are special-purpose computers with high-performance and parallel structures. they provide a general methodology for mapping high-level computations into hardware structures. in a systolic system, data flows from the host-computer memory in a rhythmic fashion, passing through many simple processing elements before it returns to memory, much as blood circulates to and from the heart [1]. since systolic arrays are special-purpose computers, arithmetic operations need not be performed using binary systems. therefore, operands may be coded in a multiple-valued, non- binary, form. in fact, benefits of higher radix computation have been confirmed both theoretically and in practice [2]. however, the hardware realization has remained strictly binary. with the availability of multiple- valued logic gates and rom it becomes feasible to perform non-binary arithmetic directly. this paper presents realization of a ternary (3-valued) inner product step processor, basic processing element in systolic arrays, using ccd gates (inhibit, fixed overflow, addition, and constant) [3]. the ccd technology has the inherent advantages of low power consumption, high packing density, and mos compatibility, which make it suitable for vlsi implementation. it must be pointed out that the low speed problem of ccd's remains to be solved [3].  the inner product step processor [4] performs a multiplication operation followed by an addition operation: s = (u)(v)+s two single-digit processing devices, half-multiply-add (hma) and full-multiply-add (fma) elements, are designed as building blocks such that: hma: (x)(y)+z = f+3(c) fma: (x)(y)+z+w = f+3(c) where the inputs x, y, z and as well as the outputs f and c are all ternary digits. figure 1 shows an array, composed from hma's, fma's and an adder, capable of performing the inner product step computation. for n-digit operands, the array requires (2n-1) hma's, (n-1)2 fma's and one n-digit adder. the delay in a ccd circuit is measured by its depth which is equal to the maximum number of gates connect in any path from input to output [3]. for the proposed inner product step processor, the depth is found to be 13n.  mahmoud a. manzoul jia-yuan han
scalable techniques for discovering multicast tree topology  the ip multicast infrastructure has transitioned to a topology that now supports hierarchical routing. multicast network monitoring and management have become key requirements necessary for providing robust multicast operation. monitoring services help to identify potential problems such as protocol shortcomings, implementation bugs or configuration errors. this type of monnitoring often requires knowing the multicast tree topology. in this paper, we present a new approach, called tracetree, to discover tree topology in the source-to-receiver(s) direction using network forwarding state. we start with an overview of the problem. then, we describe tracetree functionality including its request forwarding and response collection mechanisms. next, we discuss a number of functional issues related to tracetree. finally, we evaluate our technique by comparing it to a number of alternative approaches. we believe that our technique provides a scalable way of discovering a multicast tree's topology in realtime while requiring only marginal additional router functionality.  kamil sara kevin c. almeroth
querying the trajectories of on-line mobile objects  position data is expected to play a central role in a wide range of mobile computing applications, including advertising, leisure, safety, security, tourist, and traffic applications. applications such as these are characterized by large quantities of wirelessly internet-worked, position- aware mobile objects that receive services where the objects' position is essential. the movement of an object is captured via sampling, resulting in a trajectory consisting of a sequence of connected line segments for each moving object. this paper presents a technique for querying these trajectories. the technique uses indices for the processing of spatiotemporal range queries on trajectories. if object movement is constrained by the presence of infrastructure, e.g., lakes, park areas, etc., the technique is capable of exploiting this to reduce the range query, the purpose being to obtain better query performance. specifically, an algorithm is proposed that segments the original range query based on the infrastructure contained in its range. the applicability and limitations of the proposal are assessed via empirical performance studies with varying datasets and parameter settings.  dieter pfoser christian s. jensen
measurement and analysis of the error characteristics of an in-building wireless network there is general belief that networks based on wireless technologies have much higher error rates than those based on more traditional technologies such as optical fiber, coaxial cable, or twisted pair wiring. this difference has motivated research on new protocol suites specifically for wireless networks. while the error characteristics of wired networks have been well documented, less experimental data is available for wireless lans.in this paper we report the results of a study characterizing the error environment provided by at&amp;t; wavelan, a commercial product designed for constructing 2 mb/s in-building wireless networks. we evaluated the effects of interfering radiation sources, and of attenuation due to distance and obstacles, on the packet loss rate and bit error rate. we found that under many conditions the error rate of this physical layer is comparable to that of wired links. we analyze the implications of our results on today's csma/ca based wireless lans and on future pico-cellular shared-medium reservation-based wireless networks. david eckhardt peter steenkiste
experiences implementing a high performance tcp in user-space the advantages of user-space protocols are well-known, but implementations often exhibit poor performance. this paper describes a user-space tcp implementation that outperforms a 'normal' kernel tcp and that achieves 80% of the performance of a 'single-copy' tcp. throughput of 160 mbit/s has been measured. we describe some of the techniques we used and some of the problems we encountered. aled edwards steve muir
a study of protocol analysis for packet switched network  communication failures may occur because of residual hardware or software implementation flaws, operator errors, transmission noises and transient or permanent machine failures. for packet switched network operation, some means are necessary to detect the errors and to analyze the phenomena to identify the causes of the errors, since, generally, it is almost impossible to predict errors or to implement systems without errors or failures.  this paper describes general aspects of communication protocol analysis, protocol analysis technologies for ccitt x.25 and the protocol analyzer to be used in ddx packet switched network operation.  k. tsukamoto t. itoh m. nomura y. tanaka
the cl-pvm package _parallel virtual machine_ (pvm) is a software package that integrates a heterogeneous network of computers to form a single parallel/concurrent computing facility [2]. pvm consists of two parts: a run- time server and a set of library functions. a user sets up a _hostfile_ that lists the names of the hosts constituting the _parallel virtual machine (pvm)._ a pvm server runs on each host to help manage the _pvm._ hosts can be added and deleted from the _pvm_ dynamically. the _pvm_ can be controlled from any constituent host either interactively from a _console_ program or automatically from any _pvm tasks._a pvm task is an application program that runs on a _pvm_ and can use the pvm library functions to interact with other tasks: sending and receiving messages, initiating subtasks, detecting errors, etc. the pvm version 3.0 library is written in c allowing direct calls from c programs. there is also a fortran 77 interface to give f77 programs access to the pvm library.cl-pvm provides a common lisp interface enabling lisp-based programs to partake in pvm applications. a wide variety of useful lisp programs exists including symbolic computation systems, expert systems, artificial intelligence systems, knowledge-based systems, and many more. with cl-pvm, the pvm library routines can be invoked interactively from the lisp toplevel or from lisp programs.the cl-pvm package contains a set of common lisp functions that interfaces common lisp (kcl, akcl, or gcl) to the c-based library of pvm [2]. generally, there is one cl interface function to each pvm c library function. the cl function calls its c-based counterpart and relays data to and from the c function. this interface is complete and allows lisp- based programs to run on a _pvm_ and thus facilitates the combination of symbolic, numeric, graphics, and other useful systems in a distributed fashion (fig. 1). cl-pvm also offers a set of tools to aid effective use of the package with lisp and maxima tasks. documentation, on- line manual pages, and examples are also included.cl-pvm is available by public ftp (ftp.mcs.kent.edu) in the directory (/pub/wang/). the package is described here. please refer to [4] for more information on the design and implementation of the lisp interface to pvm. liwei li paul s. wang
communication in the ksr1 mpp: performance evaluation using synthetic workload experiments  we have developed an automatic technique for evaluating the communication performance of massively parallel processors (mpps). both communication latency and the amount of communication are investigated as a function of a few basic parameters that characterize an application workload. parameter values are captured in an automatically generated sparse matrix that multiplies a dense vector in the synthetic workload. our approach is capable of explaining the degradation of processor performance caused by communication.  using the kendall square research ksr1 mpp as a case study, we demonstrate the effectiveness of the technique through a series of experiments used to characterize the communication performance. we show that read and write communciation latencies vary from 150 to 180 and from 80 to 100 processor cycles, respectively. we show that the read communication latency approximates a linear function of the total system communciation (in subpages), write communication approximates a linear function of the number of distinct shared subpages, and that ksr's automatic update feature is effective in reducing the number of read communications given careful binding of threads to processors.  eric l. boyd edward s. davidson
risc i: a reduced instruction set vlsi computer  the reduced instruction set computer (risc) project investigates an alternative to the general trend toward computers with increasingly complex instruction sets: with a proper set of instructions and a corresponding architectural design, a machine with a high effective throughput can be achieved. the simplicity of the instruction set and addressing modes allows most instructions to execute in a single machine cycle, and the simplicity of each instruction guarantees a short cycle time. in addition, such a machine should have a much shorter design time.  this paper presents the architecture of risc i and its novel hardware support scheme for procedure call/return. overlapping sets of register banks that can pass parameters directly to subroutines are largely responsible for the excellent performance of risc i. static and dynamic comparisons between this new architecture and more traditional machines are given. although instructions are simpler, the average length of programs was found not to exceed programs for dec vax 11 by more than a factor of 2. preliminary benchmarks demonstrate the performance advantages of risc. it appears possible to build a single chip computer faster than vax 11/780.  david a. patterson carlo h. sequin
reliable multicast in multi-access wireless lans multicast is an efficient paradigm for transmitting data from a sender to a group of receivers. in this paper, we focus on multicast in single channel multi-access wireless local area networks (lans) comprising several small cells. in such a system, a receiver cannot correctly receive a packet if two or more packets are sent to it at the same time, because the ackets "collide". therefore, one has to ensure that only one node sends at a time. we look at two important issues.first, we consider the problem of the sender acquiring the multi-access channel for multicast transmission. second, for reliable multicast in each cell of the wireless lan, we examine arq-based approaches. the second issue is important because the wireless link error rates can be very high. we present a new approach to overcome the problem of feedback collision in single channel multi-access wireless lans, both for the purpose of acquiring the channel and for reliability. our approach involves the election of one of the multicast group members (receivers) as a "leader" or representative for the purpose of sending feedback to the sender. for reliable multicast, on erroneous reception of a packet, the leader does not send an acknowledgment, prompting a retransmission. on erroneous reception of the packet at receivers other than the leader, our protocol allows negative acknowledgments from these receivers to collide with the acknowledgment from the leader,thus destroying the acknowledgment and prompting the sender to retransmit the packet. using analytical models, we demonstrate that the leader-based protocol exhibits higher throughput in comparison to two other protocols which use traditional delayed feedback-based probabilistic methods. last, we present a simple scheme for leader election. joy kuri sneha kumar kasera
computer and network security  the field of computer security has matured to the extent that lots of people have heard about it, lots of people have become practitioners, lots of organizations have sprung up, lots of new books are available, certifications are available, laws are being written, people are being prosecuted and the federal government is interested. unfortunately, it is still a black hole to most people and the main source of information is the media industry where each guy is trying to get more attention than the other guy is getting. in the real world, computer and network security is just one more thing that has to be managed. it needs to be understood. it requires resources like time, money and expertise.  robert bruen
dddp-a distributed data driven processor  this paper describes an architecture of a data flow computer named the distributed data driven processor (dddp), and presents an experimental system and the results of experiments using several benchmarks. the experimental system has four processing elements connected by a ring bus, and a structured data memory. the main features of our system are that each processing element is provided with a hardware hashing mechanism to implement token coloring, and a ring bus is used to pass tokens concurrently among processing elements. a hardware monitor was used to measure the performance of the experimental system.  the experimental system adopts a low key technology and yet is capable of executing about 0.7 million instructions per second through the benchmarks. this implies that data flow computers can be alternative to the conventional von-neumann computers if state-of-the-art technologies are adequately introduced.  masasuke kishi hiroshi yasuhara yasusuke kawamura
multicast routing in internetworks and extended lans multicasting is used within local-area networks to make distributed applications more robust and more efficient. the growing need to distribute applications across multiple, interconnected networks, and the increasing availability of high-performance, high-capacity switching nodes and networks, lead us to consider providing lan- style multicasting across an internetwork. in this paper, we propose extensions to two common internetwork routing algorithms---distance-vector routing and link-state routing---to support low-delay datagram multicasting. we also suggest modifications to the single-spanning-tree routing algorithm, commonly used by link-layer bridges, to reduce the costs of multicasting in large extended lans. finally, we show how different link-layer and network- layer multicast routing algorithms can be combined hierarchically to support multicasting across large, heterogeneous internetworks. stephen e. deering
the content and access dynamics of a busy web site: findings and implications  in this paper, we study the dynamics of the msnbc news site, one of the busiest web sites in the internet today. unlike many other efforts that have analyzed client accesses as seen by proxies, we focus on the server end. we analyze the dynamics of both the server content and client accesses made to the server. the former considers the content creation and modification process while the latter considers page popularity and locality in client accesses. some of our key results are: (a) files tend to change little when they are modified, (b) a small set of files tends to get modified repeatedly, (c) file popularity follows a zipf-like distribution with a parameter &amp;agr; that is much larger than reported in previous, proxy-based studies, and (d) there is significant temporal stability in file popularity but not much stability in the domains from which clients access the popular content. we discuss the implications of these findings for techniques such as web caching (including cache consistency algorithms), and prefetching or server-based ``push'' of web content.  venkata n. padmanabhan lili qiu
a message priority assignment algorithm for can based networks  controller area network (can) defines a very efficient medium access control protocol. this protocol solve conflict message transmission conflicts through message priorities, and results in a high channel utilization and short message delay for higher priority messages. an analytical model of the maximum message delay is presented. the maximum delay of different types of messages are formulated in terms of the message priority and the offered load of the system. based on the maximum delay analysis, a message priority assignment algorithm is proposed. this algorithm is capable of generating an optimum priority assignment. a proof of correctness of the algorithm is also included in this paper.  zhengou wang huizhu lu marvin stone
a nested transaction mechanism for locus  atomic transactions are useful in distributed systems as a means of providing reliable operation in the face of hardware failures. nested transactions are a generalization of traditional transactions in which transactions may be composed of other transactions. the programmer may initiate several transactions from within a transaction, and serializability of the transactions is guaranteed even if they are executed concurrently. in addition, transactions invoked from within a given transaction fail independently of their invoking transaction and of one another, allowing use of alternate transactions to accomplish the desired task in the event that the original should fail. thus nested transactions are the basis for a general- purpose reliable programming environment in which transactions are modules which may be composed freely.  a working implementation of nested transactions has been produced for locus, an integrated distributed operating system which provides a high degree of network transparency. several aspects of our mechanism are novel. first, the mechanism allows a transaction to access objects directly without regard to the location of the object. second, processes running on behalf of a single transaction may be located at many sites. thus there is no need to invoke a new transaction to perform processing or access objects at a remote site. third, unlike other environments, locus allows replication of data objects at more than one site in the network, and this capability is incorporated into the transaction mechanism. if the copy of an object that is currently being accessed becomes unavailable, it is possible to continue work by using another one of the replicated copies. finally, an efficient orphan removal algorithm is presented, and the problem of providing continued operation during network partitions is addressed in detail.  erik t. mueller johanna d. moore gerald j. popek
lx: a technology platform for customizable vliw embedded processing  lx is a scalable and customizable vliw processor technology platform designed by hewlett-packard and stmicroelectronics that allows variations in instruction issue width, the number and capabilities of structures and the processor instruction set. for lx we developed the architecture and software from the beginning to support both scalability (variable numbers of identical processing resources) and customizability (special purpose resources).  in this paper we consider the following issues. when is customization or scaling beneficial? how can one determine the right degree of customization or scaling for a particular application domain? what architectural compromises were made in the lx project to contain the complexity inherent in a customizable and scalable processor family?  the experiments described in the paper show that specialization for an application domain is effective, yielding large gains in price/performance ratio. we also show how scaling machine resources scales performance, although not uniformly across all applications. finally we show that customization on an application-by-application basis is today still very dangerous and much remains to be done for it to become a viable solution.  paolo faraboschi geoffrey brown joseph a. fisher giuseppe desoli fred homewood
providing guaranteed services without per flow management existing approaches for providing guaranteed services require routers to manage per flow states and perform per flow operations [9, 21]. such a _stateful_ network architecture is less scalable and robust than _stateless_ network architectures like the original ip and the recently proposed diffserv [3]. however, services provided with current _stateless_ solutions, diffserv included, have lower flexibility, utilization, and/or assurance level as compared to the services that can be provided with per flow mechanisms.in this paper, we propose techniques that do not require per flow management (either control or data planes) at core routers, but can implement guaranteed services with levels of flexibility, utilization, and assurance similar to those that can be provided with per flow mechanisms. in this way we can simultaneously achieve high quality of service, high scalability and robustness. the key technique we use is called dynamic packet state (dps), which provides a lightweight and robust mechanism for routers to coordinate actions and implement distributed algorithms. we present an implementation of the proposed algorithms that has minimum incompatibility with ipv4. ion stoica hui zhang