{"title": "Senior Analog Layout Engineer", "summary": "Join Apple's Silicon Engineering Group (SEG) and be at the forefront of crafting the next generation of Apple's systems-on-chip (SOCs). Our SOCs, featuring multi-billion transistors, are the heart of iconic devices like iPhones, iPads, and Macs.", "description": "Senior Layout Engineers/Leads are pivotal in delivering Analog Mixed-Signal IP in a SOC flow. You will collaborate with teams of highly skilled individuals to develop the next generation of world-leading SOCs. Your responsibilities include crafting sophisticated layouts for mixed-signal and analog circuits, reviewing floorplans, and analyzing intricate circuits with circuit designers. You'll run complete sets of design verification tools, plan/schedule work, and coordinate vital layout tradeoffs. Interpretation of LVS, DRC, and ERC reports is key to finding the fastest way to complete the layout, exceeding engineering specifications and expectations.", "key_qualifications": "", "preferred_qualifications": "10+ years of experience in analog/mixed-signal layout design, with a focus on deep submicron CMOS circuits and at least 3+ years in FinFET technologies. Programming/scripting knowledge in SKILL, Perl, TCL, Shell, and/or Python. Familiar with Machine Learning and AI concepts. Proven expertise in implementing analog layout designs, achieving tight matching, low noise, and low power consumption. Must recognize failure-prone circuit and layout structures, have experience with analog and DFM best practices, and be able to identify the best approach to solving problems. High proficiency in custom and standard cell-based floor-planning and hierarchical layout assembly. Technical understanding of IR drop, RC delay, electromigration, self-heating, and coupling capacitance. High proficiency in interpreting physical verification reports (DRC, ERC, LVS, etc.). Experience using Cadence Virtuoso's advanced features (XL, EAD, APR, and Constraint Manager). Excellent communication skills and ability to work with cross-functional teams. Additional skill (plus): Cadence Innovus, CAD Automation experience, PCell creation experience.", "education_experience": "Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.", "additional_requirements": "", "pay_benefits": "At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $157,000 and $278,900, and your base pay will depend on your skills, qualifications, experience, and location.\n\nApple employees also have the opportunity to become an Apple shareholder through participation in Apple\u2019s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple\u2019s Employee Stock Purchase Plan. You\u2019ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses \u2014 including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.\n\nNote: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.", "company": "apple"}