{"title": "PHY Design Verification Engineer", "summary": "Would you like to join Apple\u2019s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. In this highly visible role, you will be at the center of a silicon design group with a critical impact on getting functional wireless products to hundreds of millions of customers quickly.", "description": "- Verification experience of wireless/wired communication block/subsystem preferred.\n- Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion.\n- Knowledge and experience of ASIC verification flows including test bench development, constrained random testing, and code/functional coverage.\n- Experience of using Matlab/C reference model and bit-accurate verification a plus.\n- Knowledge of wireless protocols such as Bluetooth, WLAN, or Zigbee is a plus.\n- Proficient in shell and Perl scripting, Python skills a plus.\n- Should be a team player with excellent communication skills, self-motivated, and well organized.", "key_qualifications": "- Work closely with system/design team to review and understand PHY subsystem microarchitecture, create verification plans from specifications.\n- Build block/subsystem level test benches with reference model, using best in class DV methodology. Architect test benches with maximum reusability in mind.\n- Develop and execute both directed and constrained random tests, debug failures, manage bug tracking, and work with designers to drive closure of issues found.\n- Create and analyze block/subsystem level coverage model, and add test cases to increase coverage.\n- Support PHY subsystem validation using Palladium and/or FPGA.", "preferred_qualifications": "", "education_experience": "BS degree required", "additional_requirements": "Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.", "pay_benefits": "At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $58.61 and $88.29/hr, and your base pay will depend on your skills, qualifications, experience, and location.\n\nApple employees also have the opportunity to become an Apple shareholder through participation in Apple\u2019s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple\u2019s Employee Stock Purchase Plan. You\u2019ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses \u2014 including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.\n\nNote: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.", "company": "apple"}