{"title": "GPU Physical Design Engineer", "summary": "Do you love creating sophisticated solutions to highly complex challenges? As part of our Silicon Technologies group, you\u2019ll help design and manufacture our next-generation, high-performance, power-efficient GPU! You\u2019ll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions! Joining this group means crafting and building the technology that fuels Apple\u2019s devices. Together, we enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to tapeout.", "description": "\u2022    Work closely with the FE team to understand chip architecture and drive physical aspects early in design cycle.\n\u2022    Drive best in class PD construction and optimization recipes for performance, power and area (PPA).\n\u2022    Collaborate to drive methodologies and \u201cbest known methods\u201d to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress.\n\u2022    Work on pioneering designs in the latest technology nodes.\n\u2022    Be a focal point for place and route drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, STA, block place and route.\n\u2022    Lead and resolve design and flow issues related to physical design, identify potential solutions and drive execution.\n\u2022    Work multi-functionally to ensure delivery of best-in-class physical implementations geared towards world class products.", "key_qualifications": "We value proven ability in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place and Route and all aspects of timing, electrical and physical signoff.\nWork with FE teams to understand the design architecture to drive optimal floorplanning and physical implementation through early RTL feedback.\nUse design knowledge and innovative physical construction and optimization flows to push performance, power, and Area (PPA) of GPU designs.\nExperience with multi-voltage, power gated, and power retention will be an advantage.\nPractical knowledge with hierarchical design approach, top-down design, budgeting, timing, and physical convergence will be an asset.\nShowcase your experience on integrating IP from both internal and external vendors and be able to specify and drive IP requirements in the physical domain.\nTrack record of applying creative thinking to strategically solve problems that have impact for a project, group, or organization.\nDepth of expertise with large GPU designs (>20M gates) with frequencies in excess of 1GHz applying brand-new technologies.\nFrom a CAD tool perspective, experience creating and analyzing floorplanning tools, P&R flows, static timing, and Physical Design Verification Flows is required.\nExperience with various process related design issues including Design for Yield and manufacturability, multi Vt strategies and thermal management.\nConsistent record in solving complex PD and multi-functional problems, achieving results directly and/or leading a team of engineers to innovate and achieve extraordinary GPU designs.", "preferred_qualifications": "", "education_experience": "We are looking for candidates with a minimum of BS + 10 years of relevant experience.", "additional_requirements": "", "pay_benefits": "", "company": "apple"}