{"title": "Emulation Verification Engineer", "summary": "Imagine what you could do at Apple! New ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, inquisitive people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. We have a critical impact on getting high quality functional products to millions of customers quickly.", "description": "As a member of the Emulation Verification team, you will play a key role using Emulation for verification of mixed signal SoCs, which have large digital and analog sections. You will be responsible for porting the design to the Emulation platform with the help of the Emulation team and then driving the verification plan.\n\nCore responsibilities will include:\n-  Bringing up the emulation platform for mixed signal SoCs\n\n-  Developing monitors and checkers for Emulation platform and come up with the latest techniques to achieve better performance\n\n-  Preparing and driving the test plan and performing reviews with multi-functional teams\n\n-  Collaborating cross-functionally with Design, Architecture, Power, Silicon Validation, Performance and SW Teams\n\n-  Developing code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM", "key_qualifications": "Proven experience with bring up, debugging and verification in Emulation\nUnderstanding of the tool flow from RTL to Emulation is a big plus\nGood understanding of any Standard Emulator (Palladium, Veloce, Zebu) or FPGA (Xilinx, Altera) flow\nProven design verification skills\nExperience in writing Synthesizable SystemVerilog/Verilog code and SystemVerilog assertions\nExperience with System Verilog verification environments including C/C++ DPI, UVM\nExperience on any Scripting (Perl/Python/TCL)\nExcellent analytical and debug skills\nExcellent oral and written English skills\nExperience in UVM Acceleration is plus", "preferred_qualifications": "", "education_experience": "Bachelor's Degree required.", "additional_requirements": "", "pay_benefits": "At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $58.61 and $88.29/hr, and your base pay will depend on your skills, qualifications, experience, and location.\n\nApple employees also have the opportunity to become an Apple shareholder through participation in Apple\u2019s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple\u2019s Employee Stock Purchase Plan. You\u2019ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses \u2014 including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.\n\nNote: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.", "company": "apple"}