{"title": "Wireless MAC Design Engineer", "summary": "Come join Apple\u2019s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.\n\nIf you enjoy a fast-paced and challenging environment and collaborating with people across different functional areas as well as thriving during crisis times, we encourage you to apply.", "description": "- Prepare microarchitecture and RTL for digital logic of the wireless MAC based on a set of functional requirements\n- Participate in HW/SW partitioning discussions with the SW and FW engineering teams\n- Work with physical design, DFT, Power and CAD teams to complete and deliver completed MAC IP for SoC integration.\n- Support verification / prototyping / emulation teams during pre-silicon verification, prototyping, and SW / FW development.\n- Support post-silicon validation, system integration and debug efforts and attend to any required silicon design revisions.", "key_qualifications": "Very strong digital logic design fundamentals\nExpertise in translating functional requirements into synthesizable Verilog or SystemVerilog RTL\nKnowledge of digital design flows such as RTL simulation and debug, synthesis, lint, STA and LEC\nAbility to design multi-clock-domain logic and resolve CDC problems\n4+ years of experience in ASIC microarchitecture and RTL design\nUnderstanding of wireless standards, such as IEEE 802.11, 802.15, Bluetooth or 3GPP is a plus\nUnderstanding of ASIC low power design techniques, e.g. multiple supply domains configuration and management, dynamic power/clock scaling and power analysis is a plus\nFamiliarity with power estimation (vector-less and vector-based), modeling, profiling, and post silicon power correlation\nUnderstanding of ASIC test methodologies, including DFT, scan insertion, memory BIST, and others is a plus\nExcellent organizational skills\nExcellent communications skills \u2013 both written and oral.\nBS and 10+ years of relevant industry experience.", "preferred_qualifications": "", "education_experience": "BS and 10+ years of relevant industry experience", "additional_requirements": "", "pay_benefits": "At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 and $312,200, and your base pay will depend on your skills, qualifications, experience, and location.\n\nApple employees also have the opportunity to become an Apple shareholder through participation in Apple\u2019s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple\u2019s Employee Stock Purchase Plan. You\u2019ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses \u2014 including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.\n\nNote: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.", "company": "apple"}