{"title": "Heterogeneous Integration Engineer, Hardware, Quantum AI", "level": "Mid", "location": "Goleta, CA, USA", "description": "As a Heterogeneous Integration Engineer, you will play a role in the development and manufacturing of our quantum devices. You will lead the design and implementation of advanced hybridization processes, ensuring integration of complex device structures such as multi-die bonding, shielding, and novel packaging methods. You will be responsible for the full process flow, from die preparation and inspection to final assembly and testing. Your expertise will be crucial in developing robust, scalable processes that meet the quality standards. You will collaborate closely with cross-functional teams, including design, test, and process engineers, to optimize device performance, yield, and reliability. Additionally, you will play a key role in the qualification of equipment and processes to establish and maintain a hybridization technique. The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.", "salary": "$142,000-$211,000 + bonus + equity + benefits", "key_qualifications": "Bachelor's degree in Physics, Chemistry, Mechanical, Materials Science, Electrical Engineering, a related field, or equivalent practical experience. 3 years of experience developing and sustaining hybridization processes in a cleanroom environment. Experience with one or more of the following: device characterization, SPC or process monitoring/specifications, electrical test, failure analysis. Experience in conventional hybridization techniques, including flip chip hybridization, die processing, and post hybridization measurement.", "preferred_qualifications": "Master's degree or PhD in Physics, Chemistry, Mechanical, Materials Science, Electrical Engineering, or a related field. 5 years of experience working in semiconductor research and development or production environments. Experience with developing novel bump materials, scaling up die sizes, flip-chip bonding, or designing robust structural bonding solutions. Experience with statistical process control, failure analysis activities, data analysis, and visualization tools such as JMP, Python, or SQL. Experience with characterization techniques including SEM, AFM, confocal microscopy, and interferometry. Excellent communication, documentation, and organization skills, with the ability to present facts clearly and concisely to all staff members.", "responsibilities": "Lead the development and sustainment of device hybridization processes, including, flip chip hybridization, die preparation, post bonding characterization. Design, build, and maintain backend process infrastructure to enhance efficiency, organization, and scalability. Implement standardized work practices and optimize workflows for streamlined operations. Operate and maintain associated equipment to ensure optimal process outcomes and provide rapid, expert troubleshooting of process and equipment issues to minimize downtime and maintain production goals. Analyze process data to identify trends, improve stability, and drive continuous yield improvement. Partner closely with other teams (e.g., design, test, packaging) to integrate bumped modules into devices, develop and refine device probing, packaging, and measurement methodologies, and ensure successful product delivery and customer satisfaction.", "company": "google"}