Hardware Accelerator for Adversarial Attacks on Deep Learning Neural Networks Recent studies identify that Deep learning Neural Networks (DNNs) are vulnerable to subtle perturbations, which are not perceptible to human visual system but can fool the DNN models and lead to wrong outputs. A class of adversarial attack network algorithms has been proposed to generate robust physical perturbations under different circumstance. These algorithms are the first efforts to move forward secure deep learning by providing an avenue to train future defense networks, however, the intrinsic complexity of them prevents their broader usage.In this paper, we propose the first hardware accelerator for adversarial attacks based on memristor crossbar arrays. Our design significantly improves the throughput of a visual adversarial perturbation system, which can further improve the robustness and security of future deep learning systems. Based on the algorithm uniqueness, we propose four implementations for the adversarial attack accelerator (A3) to improve the throughput, energy efficiency, and computational efficiency.

A LowPower HighThroughput InMemory CMOSReRAM Accelerator for LargeScale Deep Residual Neural Networks We present an inmemory accelerator circuit design for ResNet50, a largescale residual neural network with 49 convolutional layers, 2.6 xc3x97 107 parameters and 4.1 xc3x97 109 f1oatingpoint operations (FLOPS). A 4bit quantized ResNet50 is first chosen among various bitwidths for the best tradeoff. It is then trained and fully mapped onto a 4608 xc3x97 512 ReRAM crossbar, yielding a storage reduction from 195.2Mb to 24.3Mb and an 88.1% top5 accuracy on ImageNet, only 2.5% lower than the fullprecision original. Two versatile CMOS 4bit DAC and ADC are designed for input and readout, allowing the proposed CMOSReRAM accelerator to achieve up to 15.2xc3x97 runtime speedup and 498xc3x97 higher energy efficiency versus the stateoftheart CMOSASIC implementation.