Performance Comparison of a StrongArm Latch in Different UltraScaled Technologies This paper compares the performance achievable in different scaled technologies by analog circuits, using a strongarm latch as an example. The performance analysis has been carried out in a 7nm and a 16nm FinFET technologies, and in a 28nm FDSOI technology, considering different input signal amplitudes, input commonmode voltage levels, process corners, and temperatures. The circuit used for the comparison has been optimized for the 7nm technology with a supply voltage of 0.9 V and a clock frequency of 1 GHz and scaled, maintaining the same transistor aspect ratio in the other technologies. In typical cases, the 7nm technology is slower than the 16nm technology, but it has better performance in terms of powerdelay product (PDP). The 16nm technology features lower delay when the input commonmode voltage is higher than 750 mV, but with larger PDP. The 28nm technology in all the cases is the slowest in speed and achieves the worst PDP.

FinFET Variability and Nearthreshold operation: Impact on Full Adders design using XOR Blocks Near threshold operation reaches good results to energy critical applications. However, it introduces a considerable degradation on delay. Moreover, considering nanoeffects, circuits operating at nearthreshold are more sensitive to process variability. This paper analysis 9 full adders built with internal blocks that contain different combinations of 3 XOR logic circuits operating with nominal and nearthreshold voltages under process variability effects. The experiments adopt the 7nm FinFET ASAP technology. The nearthreshold operation can reduce on 97% the maximum power consumption and 65% the total energy, with an impact of about 10 times on delay. Considering process variability impact on energy and delay, the nearthreshold operation turns the circuits about 1.6 and 4 times more sensitive in the critical cases, respectively. Compared with traditional full adders, the proposed circuits can improve around 15% of the delay with similar power results. The results provide valuable data and show how the impact of variability and nearthreshold operation are important factors that must be analyzed to design more robust and low power circuits.