ZyNet: Automating Deep Neural Network Implementation on LowCost Reconfigurable Edge Computing Platforms Prevalence of internet of things (IoT) enabled applications provide a new opportunity to lowcost FPGA devices to act as edge computing neural network nodes. Although FPGA vendors provide neural network development environments, they often target highend devices. At the same time these development platforms are not as user friendly as their software counterparts. In this work we introduce ZyNet, a Python package, which enables faster implementation of deep neural networks (DNNs) targeting lowcost hybrid FPGA platforms such as the Xilinx Zynq. Based on hardwaresoftware codesign approach, this platform supports pretrained or onboard trained networks with development environment very similar to the popular TensorFlow. Implementation results show that the DNNs generated by the platform achieve accuracy very close to software implementations at the same time gives throughput by an order of magnitude compared to other edge computing devices at lower energy footprint. The platform is integrated with Xilinx development tools and is distributed as open source.

Lightweight Programmable DSP Block Overlay for Streaming Neural Network Acceleration Implementations of hardware accelerators for neural networks are increasingly popular on FPGAs, due to flexibility, achievable performance and efficiency gains resulting from network optimisations. The long compilation time required by the backend toolflow, however, makes rapid deployment and prototyping of such accelerators on FPGAs more difficult. Moreover, achieving high frequency of operation requires significant lowlevel design effort. We present a neural network overlay for FPGAs that exploits DSP blocks, operating at near their theoretical maximum frequency, while minimizing resource utilization. The proposed architecture is flexible, enabling rapid runtime configuration of network parameters according to the desired network topology. It is tailored for lightweight edge implementations requiring acceleration, rather than the highest throughput achieved by more complex architectures in the datacenter.