Approximate Subtractor Operator for LowPower Video Coding Hardware Accelerators Video coding requires a massive computational effort leading to large power dissipation and energy consumption. Thus, energy efficiency becomes a significant concern especially under limited energy resources such as in mobile devices. Approximate computing is a promising technique to improve energy efficiency. Therefore, this work presents a new approximate subtractor operator to be used in video coding hardware accelerators. The proposed subtractor reduces power of a Sum of Absolute Differences (SAD) hardware accelerator on approximately 10.39% (on average of different videos) when compared to the use of the subtractor from the synthesis tool. It also presents a power reduction of 18.13% when compared to stateoftheart approximate adder.

Approximate Sum of Absolute Transformed Differences Hardware Accelerator Motion Estimation and mode decision are the most computeintensive tasks in recent video encoders. Sum of Absolute Transformed Differences (SATD) is a distortion metric used inside ME and mode decision to decide the best block to be used as prediction for each block to be encoded. To reduce the complexity of SATD calculation, this work proposes an approximate SATD hardware accelerator based on 1D  4times 4  Hadamard Transform, in contrast with the precise SATD hardware accelerator that contains a 2D  4times 4  Hadamard Transform. The proposed approximate SATD accelerator reduces power dissipation in 66.86% compared to the precise SATD accelerator while increasing BDBR only by less than 0.748%, which is a better result than SAD accelerator that increases BDBR in up to 0.830% compared to precise SATD.