An SoCFPGABased Micro UGV with Localization and Motion Planning This paper presents a micro UGVs (Unmanned Ground Vehicles) using an SoC FPGA with selflocalization and motion planning developed for the FPGA Design Competition. The purpose of this competition is to achieve external state recognition and vehicle control required for automatic driving with low power consumption and high performance using an FPGA. We adopt Xilinx Zynq UltraScale MPSoC and Xilinx Artix7 for autonomous vehicles. The Zynq and Artix7 are used for processing that requires high computational costs and processing that controls peripherals such as DC motors, respectively. An autonomous driving system is constructed with a layer structure from abstracted route planning to physical controlling. In the selflocalization layer, highprecision estimation is performed by sensor fusion of landmark observations, wheel odometry, and inertial odometry using particle filter. In the path planning layer, a path is planned by InformedRRT*, and in the path tracking layer, the vehicle is controlled to track the path by Pure Pursuit. A platform for implementing the autonomous driving system can be built with small amount of resources in the FPGAs. Our FPGA implementation of selflocalization and motion planning are currently under development.

ZytleBot: FPGA Integrated Development Platform for ROS Based Autonomous Mobile Robot The FPT2019 FPGA Design Competition is a competition aimed at recommending innovations in utilizing FPGAs to realize level 5 autonomous driving vehicles. We have developed ZytleBot, an ROS based robot utilizing FPGA for the contest. ZytleBot calculates all processing necessary for autonomous driving in realtime within a programmable SoC. Therefore, it is possible to go around the course imitating an actual road, detect signals and obstacles and take appropriate behavior without any external operation. Robot development requires a wide range of knowledge and technology, but we have proceeded robot development efficiently by using ROS, a robot development middleware, and TurtleBot3, a robot development platform. As an application of FPGA, road surface image preprocessing and traffic signal detector using machine learning is implemented in the FPGA. The traffic signal detector uses HOG features and SVM classifiers, which runs over 270 times faster than running on the processor. We also provide ZytleBot as a platform for efficient development of FPGA integrated ROS robots.