Ray Tracing Acceleration Through Heterogeneous Integrated Commodity Hardware The ray tracing algorithm is a computationally intensive workload that has active efforts to improve its performance in the CPU and GPU architectures. In this research, we designed a specific implementation of the ray tracing algorithm for the APU architecture that has an integrated GPU and CPU in the same die. The APUs are regarded as commodity hardware. Our design uses the full internal resources of the APU to improve performance. We tested the classic and the BVH accelerated ray tracing algorithms and found that our implementation for the APU architecture bests the CPU and GPU solutions from the same price range in both cases.

Acceleration of ART Algorithm on an FPGA Board with Xilinx SDAccel Radiation transfer (RT) is an important physical processes of energy transfer in the form of electromagnetic wave, and ART method is a raytracing for computing RT of reconnected photons in the simulation of protogalaxies formation. It requires a heavy computational power and complicated memory accesses which are not suitable to acceleration with GPUs. Here, for the future use of FPGAinCloud, the acceleration of ART method with SDAccel on Xilinxu0027s cost efficient FPGA board KCU1500 was tried. Although the execution time was not reduced compared with the host CPU with various combination of derivatives, the energy consumption was reduced to 13.35.