Towards the Improvement of Training Efficiency and Image Recognition Accuracy for an FPGA Controlled MiniCar by Offloading Neural Network Training This paper describes the design of our fieldprogrammable gate array (FPGA)controlled MiniCar and the development strategy for the FPT2019 FPGA Design Competition. We have improved our development strategy for the FPGAcontrolled MiniCar by extending our previous design for the HEART2019 FPGA Design Contest. In our new development plan, we employ multiple image sensors to capture both road conditions and traffic lights at the same time. To manage these diverse image information, we utilize multiple simple functioned neural networks for more accurate image recognition. Embedded FPGA platforms are not powerful enough for training these neural networks efficiently; therefore, we are also trying to develop a practical framework to offload the neural network training computation to highperformance servers. This framework will allow us to utilize the trained network information on our FPGAcontrolled MiniCar efficiently.

FPGAbased Power Efficient Face Detection for Mobile Robots Autonomous mobile robots need perception module to understand nearby environments, avoid obstacles and, most importantly, interact with the humans in the dynamic environments. In order to perform human robot interaction for mobile robots, face detection is an inevitable and important function. In recent years, deep learning has emerged to be the most accurate approach for face detection problems. However, deep learning models have very high computational density, therefore cannot be executed in realtime on the embedded lowend processors that most of the robot systems equip with. Switching to highend CPU or GPU generally means much higher cost and power consumption. Meanwhile, FPGA is well suited for robot application because it provides high computing power with low cost and high power efficiency. In this paper we design an FPGA based system for the acceleration of MTCNN, which is one of the most accurate face detection neural networks. We evaluate the system using a Zynq 706 board and compare the performance with embedded CPU and popular GPU edge computing platform Jetson TX2. Our FPGA system has 40xc3x97 lower latency than Jetson TX2 with 2.5 xc3x97 higher power efficiency, making it a promising candidate for egde computing on mobile robot applications.