Study for NOR Flash cell burn out failure improvement in the advanced node below 65nm Flash cell endurance performance is one of the most important index for flash technology, it becomes more and more challenge during the NOR flash cell scaling down. In this paper, it was reported the mechanism analysis and improvement method for NOR Flash cell endurance burn out in the advanced node beyond 65nm. Tunnel oxide, inter poly dielectric(IPD) film, dielectric film between control gate(CG) to active area(AA) have been analyzed through various experiments to explain the mechanism for NOR Flash cell endurance burn out. To be noticed, we found that CG to AA interface defect reduction and optimized chip probing (CP) screen methodology could be extremely good to enhance NOR Flash cell endurance performance.

Reliability and Accelerated Testing of 14nm FinFET Ring Oscillators Accelerated lifetime tests are necessary for reliability evaluation of circuits and systems, but the parameters for choosing the test conditions are often unknown. Furthermore, reliability testing is generally performed on test structures that have different properties than actual circuits and systems, which may create inconsistencies in how circuits and systems work in reality. To combat this problem, we use ring oscillators, which are similar to circuits, based on the 14nm FinFET node as the circuit vehicle to extract wearout data. We explore the effects of testing time, sample size, and number of stages on the ability to detect failures for various test conditions, focusing on frontend time dependent dielectric breakdown, which is one of the most dominant wearout mechanisms.