Noiseinduced Performance Enhancement of Variabilityaware Memristor Networks Memristor networks are capable of lowpower, massive parallel processing and information storage. Moreover, they have widely used for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. However, till today, one of the major drawbacks resulting to their commercial cumbersome growth, is the fact that the fabricated memristor devices are subject to devicetodevice and cycletocycle variability that strongly affects the performance of the memristive network and restricts, in a sense, the utilisation of such systems for reallife demanding applications. In this work, we put effort on increasing the performance of memristive networks by incorporating external additive noise that will be proven to have a beneficial role for the memristor devices and networks. More specifically, we are taking inspiration from the wellknown nonlinear system phenomenon, called Stochastic Resonance, which alleges that noisy signals with specific characteristics can positively affect the operation of nonlinear devices. As such, we are now focusing on the utilisation of the phenomenon on memristor devices in a way that the negative effect of variability is reduced, thus the operation of the whole memristor network is assisted by the increased variability tolerance. The presented results of Bit Error Rate (BER) on a small ReRAM crossbar array sound promising and enable us to further investigate the exploitation of the described phenomenon by memristorbased networks and memories.

A Continuoustime Learning Rule for Memristorxe2x80x93based Recurrent Neural Networks Among the recent disruptive technologies, volatilenonvolatile memoryresistor (memristor) has attracted the researchersu0027 attention as a fundamental computation element. It has been experimentally shown that memristive elements can emulate synaptic dynamics and are even capable of supporting spike timing dependent plasticity (STDP), an important adaptation rule for competitive Hebbian learning. The overall goal of this work is to provide a novel analogue computing platform based on memristor devices and recurrent neural networks that exploit the memristor device physics to implement the backpropagation algorithm. Back propagation for recurrent neural networks requires a side network for the propagation of error derivatives. The use of memristorbased synaptic weights permit to propagate the error signals in the network via the nonlinear dynamics without the need of a digital side network. Experimental results show that the approach significantly outperforms conventional architectures used for pattern reconstruction. Further results will be reported in an extended work.