A SemiEmpirical Model of PV Modules Including Manufacturing IV Mismatch This paper presents an analysis of the impact of manufacturing variability in PV modules when interconnected into a large PV panel. The key enabling technology is a compact semiempirical model, that is built solely from information derived from datasheets, without requiring extraction of electrical parameters or measurements. The model explicits the dependency of output power on those quantities that are heavily affected by variability, like short circuit current and open circuit voltage. In this way, variability can be included with Monte Carlo techniques and tuned to the desired distributions and tolerance. In the experimental results, we prove the effectiveness of the model in the analysis of the optimal interconnection of PV modules, with the goal of reducing the impact of variability.

A Statistical Timing Model for CMOS Inverter in Nearthreshold Region Considering Input Transition Time The increasing performance variation poses remarkable challenges to timing analysis for circuits operating in nearthreshold voltage (NTV) region in spite of attractive energy efficiency advantage. Few researches were devoted to the statistical timing model for NTV design especially when input transition time was considered. In this paper, a statistical timing model for CMOS inverter is proposed in NTV region under process variation considering fast and slow input, which is derived analytically with a novel segmented step approximation method to overcome the integral issue of drain current equation for ramp input. The mean and variance of inverter delay distribution are derived as a function of the supply voltage, inverter size, load capacitance, and input transition time with the statistical characteristics of process variation. Experimental results under 40nm process show that the proposed inverter delay model is highly fitted with Monte Carlo (MC) simulation results at the supply voltage of 0.4V, where the mean and variance error are less than 5.35% and 8.36% for fast input and 10.89% and 13.07% for slow input respectively.