Evaluation of a Practical Markov modelbased Methodology for Energy Efficiency in Multicore Systems Greedy heuristic methodologies perform the dynamic voltage and frequency scaling (DVFS) on multicore systems based on the localized system performance data. The characteristics of applications such as their floatingpoint operations and memory loads can vary largely during the runtime. As such, the heuristicbased prediction of Voltage and Frequency (VF) is suboptimal and leads to performance degradation in applications with widely varying computational demands. This work develops a new approach, Markovbased DVFS (MDVFS), which formulates a Hidden Markov Model (HMM) for predicting core utilizations (states) and VF levels based on the observable execution times of cores across application time intervals. MDVFS uses the wellknown Kmeans algorithm for defining states and observation levels of HMM. For solving the HMM problem, MDVFS uses the Viterbi algorithm to find a sequence of VF levels that most likely generate the execution time sequence. This paper uses EnergyDelay2 Product (ED2 P) for measuring system energy efficiency and compares the performance of MDVFS to 2 predictive algorithms, history and feedback controller, on multiple applications. Experimental results show that for 5 out of 6 applications MDVFS, on the average, obtains up to 34% faster execution runtime and improves ED2 P by 24% compared to the history and the feedback controller.

Machine Learningbased Prediction for Dynamic Architectural Optimizations Embedded system complexity is rapidly evolving, becoming more desktopsystemlike, requiring more complex optimization methods to adhere to more stringent design constraints (e.g., area, thermal pressures, performance, battery lifetime, etc.) given restricted resources, widely varying applications, and environmental stimuli. Configurable architectural parameters (e.g., voltage, frequency, pipeline depth, cache specifics, etc.) can be specialized to meet these applicationspecific constraints and requirements (e.g., available parallelism, cache locality and access patterns, etc.) based on the available resources (e.g., heterogeneous cores with different architectural parameters). Unfortunately, due to this environmentaland applicationdependent information, embedded system designers are challenged with meeting constraints and requirements with no a priori knowledge of this dynamic runtime information, which results in a very large dynamic design space. In this work, we propose a machinelearningbased method to meet these runtime optimization challenges using a fast and reactive methodology. Our methodology uses offline feature selection and neural network training to create a model that can be used online to predict the best configurable parameter values based on unknown runtime applications, environmental stimuli, resource availability, user expectations, etc. Without loss of generality, we propose a cache line size onlinedynamic prediction module. Results show that our prediction module achieves 86% and 91% classification accuracies, comparable to prior work, for predicting the instruction and data cache line sizes, respectively, and achieves average energy consumption optimizations within 1% of the applicationsxe2x80x99 optimal energy consumptions determined using exhaustive simulation.