Design of Aging Detection Sensor Based on Voltage Comparison With the shrink of integrated chip process size, the circuit aging has become a major challenge for integrated chip designs. Based on the research of aging detection and voltage comparison, we proposed an aging detection circuit scheme based on voltage comparison. This scheme firstly obtains the deviation signal of aging module. Then, the quantization module uses its sampling characteristics to acquire the aging signal and quantize it by the counter unit. Finally, the aging decision module converts the quantized data into a voltage signal and determine whether the circuit is aging by the comparison result between the voltage signal and the reference voltage. Achieving the design of aging detection sensor in the TSMC 65nm CMOS process, the experimental result suggests that the logic function of design is correct. In the meanwhile, margin can be adjusted dynamically and it has a certain flexibility compared to other detection circuits.

Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit With the technology node scaling down, aging effect and process variations have become the most critical reliability issues for integrated circuit. In this paper, the influence of BTI effect and process variation on threshold voltage is analyzed. Then, the delay of logic gate and the change of subthreshold current are deduced from the change of threshold voltage. Finally, the logic gate and ISCAS85 circuit are simulated by HSPICE in PTM 45nm model. Simulation results show the relationship between delay and subthreshold current with aging time, which can be used to predict the degradation of circuit parameters. The change of circuit delay can be quickly monitored by measuring subthreshold current.