Survey on FPGAs in Medical Radiology Applications: Challenges, Architectures and Programming Models This paper provides a survey on hardware architectures and programming models for FPGAs in medical radiology applications. This area imposes many challenging constraints on the underlying hardware platform that can be solved best by FPGAs: hard realtime, low latency interdevice communication, safety, huge data volume, and onthefly image processing tasks. We consider these aspects from the application as well as from the FPGA design perspective and provide a definition and classification of the most relevant challenges, trends, and requirements. Therefore, we analyse different application scenarios ranging from basic Computed Tomography (CT) to modern Interventional Radiology systems. The main focus of our work lies on CT appliances. Finally, we discuss trends of architectures solutions and programming models in these complex systems. By means of this systematic literature survey, we derive an architectural model from realtime, patient and application constraints for hardware design and system engineering tasks.

Evaluation of Medical Imaging Applications using SYCL As opposed to the Open Computing Language (OpenCL) programming model in which host and device codes are written in different languages, the SYCL programming model can combine host and device codes for an application in a typesafe way to improve development productivity. In this paper, we chose two medical imaging applications (Heart Wall and Particle Filter) in the Rodinia benchmark suite to study the performance and programming productivity of the SYCL programming model. More specifically, we introduced the SYCL programming model, shared our experience of implementing the applications using SYCL, and compared the performance and programming portability of the SYCL implementations with the OpenCL implementations on an Intelxc2xae Xeonxc2xae CPU and an Irisxc2xae Pro integrated GPU. The results are promising. For the Heart Wall application, the SYCL implementation is on average 15% faster than the OpenCL implementation on the GPU. For the Particle Filter application, the SYCL implementation is 3% slower than the OpenCL implementation on the GPU, but it is 75% faster on the CPU. Using lines of code as an indicator of programming productivity, the SYCL host program reduces the lines of code of the OpenCL host program by 52% and 38% for the Heart Wall and Particle Filter applications, respectively.