Scheduling Algorithm Based on System of Difference Constraints Using Network Flow As an essential step in HighLevel Synthesis (HLS) tools, scheduling algorithm has displayed a decisive character in the process that transforms a behavioral specification into a register transfer level (RTL) circuit. Scheduling algorithm based on system of difference constraints (SDC) transforms scheduling problem into a special linearprogramming mathematic problem by bringing in the conception of scheduling variables and transforming the scheduling constraints into mathematic constraints of integer difference form. In this paper, the method of applying mincost network flow into scheduling algorithm is proposed. Through experiment, scheduling algorithm applied mincost network flow has more advantages in time complexity than scheduling based on traditional linearprogramming mathematic algorithm. The conclusion of the experiment is that the application of mincost network flow algorithm in HLS scheduling algorithm is feasible.

Latency Minimal Scheduling with Maximum Instruction Parallelism High Level Synthesis (HLS) is to synthesize circuits from algorithmic level descriptions. There is a strong need to deploy HLS in high performance computing for data center and edge computing. In this paper, we propose a new scheduling algorithm based on an instructionlevel Dependency Graph (DG) for latency minimization. Unlike existing scheduling algorithms assuming a sequential execution order of Basic Blocks (BBs), we can identify instruction parallelism across BBs and schedule them parallelly for smaller circuit latency. Our test results show that we can significantly improve the circuit latency when compared with the stateoftheart SDCbased LegUp and even outperform PandA with sophisticated code motion heuristics by 8% on average.