Bit Allocation based on Visual Saliency in HEVC As one of the important part in the HEVC reference software, Rlambda model adopts mean absolute difference (MAD) for the coding unit tree (CTU) level bit allocation. However, this optimum method may neglect some important characteristics of human visual system (HVS). In this paper, we propose a novel bit allocation algorithm to process some salient visual information priority. Firstly, an improved video saliency detection algorithm is proposed, which induces temporal correlation into a 2D visual attention model. Secondly, the visual saliency based CTU level bit allocation algorithm is presented by allocating bits for CTUs with their saliency weights. Whatxe2x80x99s more, with considerations of the temporal quality consistence among Saliency Areas (SAs), a window based weight smoothing model is proposed to achieve better subjective quality. Finally, several experiments are performed on the HEVC reference software, HM16.9, under the low delay P configuration, and the experimental results show that the average BDRate of the entire test sequences and of the SAs reduce 1.7% and 6.2%, respectively. The proposed algorithm can also improve subjective quality remarkably.

Temporal dependency based CTUlevel bit allocation for rate control Rate control ensures the coded bit stream can meet channel bandwidth or storage space requirements. however, it may degrade ratedistortion (RD) performance of encoders. Inspired by temporal dependent rate distortion optimization, this paper proposes a temporal dependency based CTU level rate control algorithm to improve RD performance while achieving a high bitrate accuracy. First, an estimation method of CTU level RD model is proposed to better characterize RD relationship. Second, a formulation combining interCTU dependencies and RD characteristics is constructed for CTU level bit allocation, which aims to minimize the distortion of the whole video sequence under the constraint of frame level bit budget. Finally, in the process of encoding a frame, a strict constraint of bits is used to reduce the difference between numbers of actual and target bits for the current frame. Experimental results show that, on the platform of HEVC test model (HM16.7), the proposed algorithm achieves considerable RD performance improvement with smaller bitrate error. Specifically, against HM16.7 without rate control, the proposed scheme achieves bitrate savings of 4.2% and 3.7% on average under the configurations of low delay P and B frames, respectively.