An Optimized Modeling Method for Transformer Design This paper presents an optimized modeling method for transformer design in the narrowband application. In order to improve the accuracy of analysis, the parasitic capacitors are contained in the equivalent circuit model. According to the model, the parameters of transformer with maximum efficiency can be obtained. The transformer is used in the output impedance matching of power amplifier with a turn ratio of 2:3 in 40nm CMOS process. Equality factor Q of primary and secondary toil of transformers are 9.28 and 14.19 respectively, while the coupling coefficient is 0.83. This method is demonstrated to be efficient according to the post simulation on a power amplifier with 25dBm saturated power and 19% PAE when the input power is OdBm in 2.4GHz under 3.3V voltage supply.

Design of A Dband TransformerBased Neutralized ClassAB Power Amplifier in Silicon Technologies Highspeed wireless communication in the post5G era will likely make use of frequency bands above 100 GHz. This poses challenges to IC design in silicon technologies. This paper presents a general comparison of a Dband transformerbased ClassAB power amplifier with crosscoupled capacitive neutralization in three advanced silicon technologies: bulk CMOS, fullydepleted SOI, and SiGe BiCMOS. Each of these technologies has its own prospects and disadvantages. A comparison of performance parameters is made such as the maximum available power gain G max , saturation power P sat , drain efficiency DE and power added efficiency PAE after properly sizing the transistors to reach an optimum load resistance Ropt. Further, a 140 GHz 4stage power amplifier is fabricated in a 28 nm bulk CMOS process as a reference. Its design considerations, layout parasitics analysis, and layout techniques are discussed as well.