Design of SAR ADC to Light Charging for Optical Sensors Applications The proposed successive approximation register (SAR) analogtodigital converter (ADC) for integrates optical sensor. The heart rate sensor including SAR ADC and OPVs are presented. To reduce DAC switching energy, a hybrid resistorcapacitor DAC is applied. The optimal design used charging near infrared laser driven (NIRLD) with thin Fresnel and OPVs light with VCSEL. The charging near infrared laser driven (NIRLD) with thin Fresnel might be a promising OPVs light power supplier and low consumption, asynchronous control logic to drive the ADC is used. A preamplifierbased comparator circuit is built to reduce the kickback noise from the dynamic latch designs for optical sensor applications.

A 7.6nW 1kSs 10bit SAR ADC for Biomedical Applications This paper presents a 10bit successive approximation register analoguetodigital converter with energyefficient switching scheme for biomedical applications. The energyefficient switching scheme achieves an average digitaltoanalog converter switching energy of 63.56  CV_ref2 , achieving an reduction of 95.34% compared with the conventional capacitor switching scheme for CDACs. With the switching scheme, the ADC can lower the dependency on the accuracy of  V_cm  and complexity of digital control logic and DAC driver circuit. Moreover, dynamic circuits are used to reduce power consumption of comparator and SAR digital logic. The prototype is designed and fabricated in a 180 nm CMOS with a core size of 500 xc2xb5m x 300 xc2xb5m (0.15 mm2). It consumes 7.6 nW at 1 kSs sampling rate and 1.8V supply with an achieved signaltonoiseand distortion ratio of 45.90 dB and a resulting figure of merit of 51.7 fJconv.step.