A Highspeed Dynamic Domino Full Adder Based on DICG Positive Feedback Dynamic domino circuit affords significant advantages in speed performance and area by virtue of dynamic operating behavior and uncomplementary circuit structure, while compromising too much power consumption and noise tolerance. In this paper, a highspeed full adder based on dynamic domino circuit is proposed by utilizing the DICG (DelayedInvertedCLKGating) positive feedback scheme. Thanks to the DICG technique, it relaxes the competition between pullup and pulldown networks effectively, achieving notable improvements in speed, power dissipation and circuit stability. Experimental results show that the presented dynamic domino adder exhibits 21.2% improvement in speed performance and 18.7% reduction in powerdelay product compared with previous work when using a TSMC 65nm process technology.

FinFET Variability and Nearthreshold operation: Impact on Full Adders design using XOR Blocks Near threshold operation reaches good results to energy critical applications. However, it introduces a considerable degradation on delay. Moreover, considering nanoeffects, circuits operating at nearthreshold are more sensitive to process variability. This paper analysis 9 full adders built with internal blocks that contain different combinations of 3 XOR logic circuits operating with nominal and nearthreshold voltages under process variability effects. The experiments adopt the 7nm FinFET ASAP technology. The nearthreshold operation can reduce on 97% the maximum power consumption and 65% the total energy, with an impact of about 10 times on delay. Considering process variability impact on energy and delay, the nearthreshold operation turns the circuits about 1.6 and 4 times more sensitive in the critical cases, respectively. Compared with traditional full adders, the proposed circuits can improve around 15% of the delay with similar power results. The results provide valuable data and show how the impact of variability and nearthreshold operation are important factors that must be analyzed to design more robust and low power circuits.