Fine Time Resolution TDC Architectures Integral and DeltaSigma Types This paper describes two timetodigital converter (TDC) architectures for fine time resolution and good linearity: integraltype and deltasigma TDC architectures. By investigating them, the similarity and difference between TDC and ADC architectures for fine resolution but slow measurement are clarified. Our integraltype TDC architectures are inspired by the integraltype ADC, and also the timebases of the equivalent time sampling in the sampling oscilloscope: sequential sampling and random sampling. One TDC uses a sequential sampling timebase, and the other uses a random sampling timebase. Each of them consists of two trigger circuits, a sampling flipflop, a binary counter and additional small logic circuit. Their circuit topologies, operation principles and simulation results as well as their comparison are presented. Also our deltasigma TDC architecture is mentioned, and comparison between the integral and deltasigma TDC architectures is discussed.

A MultiPhase TimetoDigital Converter Differential Vernier Ring Oscillator This paper reports the development of an adjustable, TimetoDigital Converter (TDC) based on two vernier Ring Oscillators (RO). The TDC aims to measure timing in Resistive Plate Chamber (RPC) detector for CMS experiment. Considering previous designs, the contribution from power supply noise and intrinsic transistor noise had been minimizing with differential stages and proper transistor sizing. To reduce the timing resolution and deadtime inherent to Vernier TDC architecture, as many Phase Detector (PD) as possible had been implemented. Such functionality permits to choose whether reducing the dead time or measuring redundantly the startstop time difference for an improved precision. The prototype TDC fabricated in a 130nm technology consumes 8.5 mW power under 1.2V supply. The measurement of this chip shown a timing accuracy of 5.48 ps at a timing resolution of 8 ps for the first data allowed by the first phase detection.