Improve DRAM Leakage Issue During RAS Operational Phase Through TCAD Simulation With the Dynamic Random Access Memory (DRAM) integration increase, the array transistor active area layout has arranged in 6F2 mode 1. With the DRAM architecture, the large storage node leakage current caused by the adjacent wordline (WL) during row address strobe (RAS) operating steps is one of the major operation and reliability concerns in circuits. In this paper, we present the leakage mechanisms of DRAM device caused by the onstate adjacent WL on the shallow trench isolation (STI) region and show the methods to suppress the leakage current. The proposed methodologies on the leakage current reduction are well analyzed and verified systematically by TCAD (Technical Computer Aided Design) simulation. After dopants and architecture optimization, a reduction of 3.23 times of the leakage current is obtained and an assessment method to optimize the STI depth is proposed.

Deep Learning Based Diagnostics for Rowhammer Protection of DRAM Chips Modern day DRAM chips have been shown to have a reliability issue which can lead to erratic bit flips, a phenomenon which is called Rowhammer. Although current DRAM modules come with inbuilt countermeasures, recent attacks have shown they are still vulnerable. The Rowhammer vulnerability has been used in conjunction with other sidechannels to lead to devastating attacks. In this work, we take a novel approach by training a deep learning model based on several successful and unsuccessful attempts to conduct Rowhammer. The objective of the model is to analyze the access patterns of the DRAM by reverse engineering the physical address to pinpoint exact DRAM location and in turn use them for early prediction of a potential Rowhammer flip. We showed that our approach could detect a probable Rowhammer attempt with considerably high accuracy and even before the completion of the attack. In a more general context, this work shows that suitable combinations of deep learning and reverse engineering of physical address space can help to enhance both the reliability and security of systems.