Optimization of High Reliability and Wide SOA 100 V LDMOS Transistor with Low Specific OnResistance We proposed a wide SOA and high reliability 0.35 xc2xb5m CMOS compatible 100 V dual RESURF LDMOS transistor with low switching loss and low specific onresistance for automotive applications. This paper describes how much production tolerances for the mask alignment and the net dose of the gateside Ptype buried layer for dual RESURF of the proposed device affect electrical characteristics. TCAD simulations verified that the mask alignment tolerance is xc2xb1 50 nm, and the net dose tolerance is xc2xb1 40 %, which are possible enough in mass production. Within the range of the tolerances, the device maintains top level characteristics (breakdown voltage BV DS   132 V and specific onresistance R on,sp   150 mxcexa9mm2) with keeping high hot carrier endurance and wide SOA.

A Low Onstate Voltage and Large Current Capability Thin SOILIGBT with Trench NMOS In this paper, a novel thin silicononinsulator (SOI) lateral insulated gate bipolar transistor (LIGBT) is proposed and investigated by numerical simulation. In such a device, several trench gates and an Nburied layer under the Pbase are employed to form multiple trench NMOS, which increases the effective channel width. Consequently, the onstate voltage (Von) is reduced, and the saturation current is distinctly enhanced. Moreover, because the Nburied layer can be pinched off in the blocking state, the proposed device exhibits an approximate breakdown voltage (BV) with the conventional one. The simulation results demonstrate that the saturation current and the Von of the proposed device are increased by 316.5% and decreased by 21.7%, respectively. Additionally, an excellent tradeoff between the Von and the turnoff energy loss (E off ) is achieved.