Systematic Construction of Resistor Ladder Network for Nary DACs This paper describes a systematic configuration method of resistor ladder networks for Nary DACs, by generalizing the configuration of the conventional R2R DAC. Resistor networks divide the current at each node with its combined resistor ratio; the current flowing into each node of the resistor ladder is weighted with a nonbinary ratio. Also using several unit current sources at each node, configuration of nonbinary weighted DACs (such as ternary and quaternary weighted ones) can be derived. We have verified the operation of these resistor network DACs by SPICE simulations, and discuss their pros and cons as well as possible applications.

Low Complexity Architecture of NPath Mixers for Low Power Application The complexity of harmonic rejection Npath mixer based receivers is studied in this paper. A solution to improve harmonic rejection without increasing the complexity is presented and compared with conventional LNAfirst receivers. This solution is based on xcfx80delayed driving signals that enable a Npath mixer to present the same harmonic rejection than its 2Npath counterparts while reducing by 2 the frequency of operation and showing a reduced number of differential gain stages and switches. A 5path mixer is thus proposed. It allows rejecting up to the 8th harmonic with only 3 differential gain stages whereas only the 6th harmonic would be rejected with conventional topologies having the same number of amplifier stages.