A Polymorphic Circuit Interoperability Framework The Polymorphic Circuit Interoperability Framework is presented in this paper. This framework separates the polymorphic component (called the polymorphic element) from the functional gates (called the switchable gate). The requirement of the framework is that the polymorphic element outputs a nonempty set of signals that change based on the polymorphic effect desired. In this paper, single output polymorphic elements based on voltage and clock speed are shown, and a polymorphic element based on temperature is theoretically adapted from existing literature 5. A switchable gate that implements NANDNOR functionality is shown and used with these polymorphic elements to test the framework for polymorphic functionality. The results are presented and polymorphic functionality is successfully demonstrated.

Synthesizing Efficient Hardware from HighLevel Functional Hardware Description Languages Functional hardware description languages (FHDL) provide powerful tools for building new abstractions that enable sophisticated hardware system to be constructed by composing small reusable parts. Raising the level of abstractions in hardware designs means the programmer can focus on highlevel circuit structure rather than mundane lowlevel details. The language features that facilitate this include highorder functions, rich static type system with type inference, and parametric polymorphism. We use handwritten structural and behavioral VHDL, Simulink, and the Kansas Lava FHDL to reimplement several components taken from a Simulink model of an orthogonal frequencydivision multiplexing (OFDM) physical layer (PHY). Our development demonstrates that an FHDL can require fewer lines of code than traditional design languages without sacrificing performance.