A 63.3ps TDC Measurement System Based on FPGA for Pulsed Laser Ranging For pulsed laser ranging systems, the accuracy of the timetodigital converter (TDC) measurement directly determines the accuracy of the systemu0027s ranging. This work uses the internal carry chain of the FPGA to construct the delay chain, together with the encoder, coarse time counter, mean filtering and the trigger modules build up the proposed TDC design. In order to ensure the consistency of the delay chain, this work utilizes the entire CARRY4 carry chain as a single delay unit, and the total delay of the delay chain needs to be more than one clock cycle. Therefore, with careful verifications, 160 delay units are connected in series to form a completed delay chain. In order to reduce the complexity of the design, this work partitions the 160bit input encoder into five 32bit input encoders, which is equivalent to divide the delay chain into five segments and then accumulate all the statistical results. The measured results show that the TDC measurement resolution can reach 63.3ps, and the ranging accuracy of the ranging system is 0.95cm, while the measurement error is 0.38cm, and the logic complexity is 3k LUTS and 4k DFFS.

FPGAbased Implementation of a RealTime Distance Evaluation Algorithm for Wireless Localization Systems The work introduces the FPGA implementation of a novel highprecision TDOA distance evaluation system based on a OFDM symbol that is completely charaterized, generated, and processed in the digital domain. The system exploits a SoftwareDefined Radio architeture, thus its charateristics can be adjusted by means of simple software modifications performed on the FPGA. The system was implemented using the FPGA (Cyclone IVE EP4CE115F29C8L) available through the Alterau0027s DE2115 development board. The FPGA implementation comprises a digital hardware, that extracts the distance by processing the incoming signal in both the time and frequency domains, and a NIOS processor to transmit the elaborated data to a main central microcontroller unit (MCU). The implementation requires about 120k bits of memory and 44k logic elements (of which about 30k are registers).