The Advances of OTP Memory for Embedded Applications in HKMG Generation and Beyond Current need to the development of advanced 28nm and beyond OTP (OnetimeProgrammable) nonvolatile memory is limited by the compatibility with advanced nodes with particular highk metalgate gate stack feature. On the other hand, there is a strong demand for future use in IoT and AI in security applications. In this talk, we will provide a solution on how to develop a unique structure of OTP for the above purpose. A 4kb macro of One Time Programming (OTP) memory, implemented by a new breakdown, named dielectric fuse (dFuse) breakdown, will be demonstrated which is constructed on a foundry pure logic 28nm HKMG CMOS platform. The feature size of a unit cell is 1.5T per cell with 7.5F2. The experimental results show that dFuse macro exhibits high programming (PGM) speed of 100ns at 4V, read time smaller than 10ns at 0.75V, and excellent data retention under onemonth baking at 150xc2xb0C. More importantly, the program voltage is weakly dependent on the environmental temperature, suitable for automotive applications. This OTP is also expected to be scalable to advanced technology node such as FinFET and provides an ideal and reliable solution for the storage purpose in IoT and 5G era. In particular, it has great potential for embedded applications in MCU, e.g., automotive applications.

Novel smart card SoC memory architecture based on embedded STTMRAM In the applications of Internet of Things (IoT), the limitations of the common NVM  RAM hybrid memory architecture cannot simultaneously provided the solution of lower power, low resource consumption and nonvolatile which are critical for IoT designing. Spin Transfer Torque Magnetic Random Access Memory (STTMRAM) has become a major candidate for onchip memory because of its ideal memory characteristics, such as nonvolatile, near zero standby leakage power and compatibility with CMOS. Therefore, this paper focuses on the application of STTMRAM in the storage of IoT. We design the eSTTMRAM nonhybrid memory architecture for smart card SoCs. The prototype verification results on Xilinxu0027s ARTIX7 XC7A100T FPGA platform show that the STTMRAMbased memory architecture can greatly improve the operating efficiency of SoC programs and reduce the dynamic power consumption of the system due to data storage.