Patent application 14828281 (US), filed 2015-08-17
Publication number: US20150357248A1
Title: METHOD OF FORMING A CMOS STRUCTURE HAVING GATE INSULATION FILMS OF DIFFERENT THICKNESSES
CPC codes: H10D  84/038
H10D  84/0147
H10D  84/0181
H10D  84/0144
H10D  84/83
H10D  84/0179
H10D  84/84
H10D  84/014
H10D  64/514
B82Y  99/00
Y10S 438/981
Y10S 977/936
Office action: rejection, dated 2015-10-15
Rejection reasons: anticipation_102
obviousness_103
indefiniteness_112
Prior art cited: ref_id: 5330929
ref_type: patent
severity: novelty_destroying
ref_id: 5330929
ref_type: patent
severity: novelty_destroying
ref_id: 5241198
ref_type: patent
severity: novelty_destroying
ref_id: 5436481
ref_type: patent
severity: novelty_destroying
Final disposition: pending (2015-10-15)