{"name": "disas_dsp_insn", "code": "__int64 __fastcall disas_dsp_insn ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { __int64 result ; unsigned int v4 ; int @@v6@@ ; int @@v7@@ ; int v8 ; int v9 ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; if ( ( @@a3@@ & Number ) == Number ) { @@v10@@ = @@a3@@ & Number ; v8 = ( unsigned __int8 ) @@a3@@ >> Number ; if ( ( unsigned __int8 ) @@a3@@ >> Number ) return Number L ; @@v11@@ = load_reg ( @@a2@@ , ( unsigned __int16 ) @@a3@@ >> Number ) ; @@v12@@ = load_reg ( @@a2@@ , @@v10@@ ) ; v4 = HIWORD ( @@a3@@ ) & Number ; if ( v4 >= Number ) { if ( ( @@a3@@ & Number ) != Number ) tcg_gen_shri_i32 ( @@v11@@ , @@v11@@ , Number ) ; if ( ( @@a3@@ & Number ) != Number ) tcg_gen_shri_i32 ( @@v12@@ , @@v12@@ , Number ) ; gen_helper_iwmmxt_muladdswl ( cpu_M0 , cpu_M0 , @@v11@@ , @@v12@@ ) ; } else if ( v4 ) { if ( v4 != Number ) return Number L ; gen_helper_iwmmxt_muladdsw ( cpu_M0 , cpu_M0 , @@v11@@ , @@v12@@ ) ; } else { gen_helper_iwmmxt_muladdsl ( cpu_M0 , cpu_M0 , @@v11@@ , @@v12@@ ) ; } dead_tmp ( @@v12@@ ) ; dead_tmp ( @@v11@@ ) ; gen_op_iwmmxt_movq_wRn_M0 ( v8 ) ; result = Number L ; } else if ( ( @@a3@@ & Number ) == Number ) { @@v6@@ = HIWORD ( @@a3@@ ) & Number ; @@v7@@ = ( unsigned __int16 ) @@a3@@ >> Number ; v9 = @@a3@@ & Number ; if ( ( @@a3@@ & Number ) != Number ) { result = Number L ; } else { if ( ( @@a3@@ & Number ) != Number ) { iwmmxt_load_reg ( cpu_V0 , v9 ) ; tcg_gen_trunc_i64_i32 ( cpu_R [ @@v7@@ ] , cpu_V0 ) ; tcg_gen_shri_i64 ( cpu_V0 , cpu_V0 , Number L ) ; tcg_gen_trunc_i64_i32 ( cpu_R [ @@v6@@ ] , cpu_V0 ) ; tcg_gen_andi_i32 ( cpu_R [ @@v6@@ ] , cpu_R [ @@v6@@ ] , Number ) ; } else { tcg_gen_concat_i32_i64 ( cpu_V0 , cpu_R [ ( unsigned __int16 ) @@a3@@ >> Number ] , cpu_R [ @@v6@@ ] ) ; iwmmxt_store_reg ( cpu_V0 , v9 ) ; } result = Number L ; } } else { result = Number L ; } return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}]}