{"name": "DecodeGPRnopcRegisterClass", "code": "__int64 __fastcall DecodeGPRnopcRegisterClass ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; @@v4@@ = Number ; if ( @@a2@@ == Number ) @@v4@@ = Number ; @@v2@@ = DecodeGPRRegisterClass ( @@a1@@ , @@a2@@ ) ; Check ( & @@v4@@ , @@v2@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}]}
{"name": "Check", "code": "__int64 __fastcall Check ( _DWORD * @@a1@@ , unsigned int @@a2@@ ) { if ( @@a2@@ == Number ) return Number L ; if ( @@a2@@ <= Number ) { if ( ! @@a2@@ ) { * @@a1@@ = Number ; return Number L ; } if ( @@a2@@ == Number ) { * @@a1@@ = Number ; return Number L ; } } return Number L ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} {"name": "DecodeGPRRegisterClass", "code": "__int64 __fastcall DecodeGPRRegisterClass ( __int64 @@a1@@ , unsigned int @@a2@@ ) { if ( @@a2@@ > Number ) return Number L ; MCOperand_CreateReg0 ( @@a1@@ , ( unsigned __int16 ) GPRDecoderTable [ @@a2@@ ] ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} {"name": "DecodeSORegRegOperand", "code": "__int64 __fastcall DecodeSORegRegOperand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; @@v5@@ = Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; @@v9@@ = Number ; if ( @@v7@@ == Number ) { @@v9@@ = Number ; } else if ( @@v7@@ <= Number ) { if ( @@v7@@ == Number ) { @@v9@@ = Number ; } else if ( @@v7@@ ) { @@v9@@ = Number ; } else { @@v9@@ = Number ; } } MCOperand_CreateImm0 ( @@a1@@ , @@v9@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeAddrMode2IdxInstruction", "code": "__int64 __fastcall DecodeAddrMode2IdxInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v3 ; __int64 result ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; bool v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int @@v13@@ ; int @@v14@@ ; unsigned int @@v15@@ ; bool @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; int @@v27@@ ; @@v13@@ = Number ; @@v24@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v23@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v22@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v20@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v25@@ = Number ; v2 = MCInst_getOpcode ( @@a1@@ ) ; if ( v2 > Number ) { if ( v2 - Number > Number ) goto LABEL_7 ; } else if ( v2 < Number ) { goto LABEL_7 ; } v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v3 ) != Number ) return Number L ; LABEL_7 : v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v23@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v5 ) != Number ) return Number L ; v6 = MCInst_getOpcode ( @@a1@@ ) ; if ( v6 > Number ) { if ( v6 - Number > Number ) goto LABEL_15 ; } else if ( v6 < Number ) { goto LABEL_15 ; } v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v7 ) != Number ) return Number L ; LABEL_15 : v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v8 ) != Number ) return Number L ; @@v27@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) != Number ; v9 = ! @@v18@@ || @@v17@@ == Number ; @@v16@@ = v9 ; if ( @@v18@@ && @@v16@@ ) { @@v25@@ = Number ; } else if ( ! @@v18@@ && @@v16@@ ) { @@v25@@ = Number ; } if ( @@v16@@ && ( @@v24@@ == Number || @@v24@@ == @@v23@@ ) ) @@v13@@ = Number ; if ( @@v19@@ ) { v10 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v22@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v10 ) != Number ) return Number L ; @@v26@@ = Number ; v11 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v11 == Number ) { @@v26@@ = Number ; } else { if ( v11 > Number ) return Number L ; if ( v11 == Number ) { @@v26@@ = Number ; } else if ( v11 ) { @@v26@@ = Number ; } else { @@v26@@ = Number ; } } @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v26@@ == Number && ! @@v14@@ ) @@v26@@ = Number ; @@v21@@ = ARM_AM_getAM2Opc ( @@v27@@ , @@v14@@ , @@v26@@ , @@v25@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v21@@ ) ; } else { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; @@v15@@ = ARM_AM_getAM2Opc ( @@v27@@ , @@v21@@ , Number , @@v25@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v15@@ ) ; } v12 = DecodePredicateOperand ( @@a1@@ , @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v12 ) != Number ) result = Number L ; else result = @@v13@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v25", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v27", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v16", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s45"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v14", "t": {"T": 1, "n": "int", "s": 4}, "location": "s56"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v26", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeQADDInstruction", "code": "__int64 __fastcall DecodeQADDInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 result ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v11@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number ) return DecodeCPSInstruction ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; v5 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v5 ) != Number ) return Number L ; v6 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v6 ) != Number ) return Number L ; v7 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v7 ) != Number ) return Number L ; v8 = DecodePredicateOperand ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v8 ) != Number ) result = Number L ; else result = @@v11@@ ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeArmMOVTWInstruction", "code": "__int64 __fastcall DecodeArmMOVTWInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; @@v6@@ = Number ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; if ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) == Number ) { v2 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v2 ) != Number ) return Number L ; } v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v7@@ ) ; v5 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v5 ) != Number ) result = Number L ; else result = @@v6@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeSMLAInstruction", "code": "__int64 __fastcall DecodeSMLAInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v8@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v9@@ == Number ) return DecodeCPSInstruction ( @@a1@@ , @@a2@@ ) ; v3 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v3 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; v5 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; v6 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; v7 = DecodePredicateOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) result = Number L ; else result = @@v8@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2AddrModeImm0_1020s4", "code": "__int64 __fastcall DecodeT2AddrModeImm0_1020s4 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; @@v4@@ = Number ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v2@@ = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , @@v2@@ ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v5@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodePostIdxReg", "code": "__int64 __fastcall DecodePostIdxReg ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; @@v4@@ = Number ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v2@@ = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , @@v2@@ ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v5@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeDoubleRegStore", "code": "__int64 __fastcall DecodeDoubleRegStore ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v7@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; if ( @@v9@@ == Number || @@v11@@ == @@v9@@ || @@v11@@ == @@v10@@ || @@v11@@ == @@v10@@ + Number ) @@v7@@ = Number ; v4 = DecodeGPRPairRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeSwap", "code": "__int64 __fastcall DecodeSwap ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v8@@ == Number ) return DecodeCPSInstruction ( @@a1@@ , @@a2@@ ) ; @@v7@@ = Number ; if ( @@v11@@ == @@v9@@ || @@v9@@ == @@v10@@ ) @@v7@@ = Number ; v3 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v3 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeLDR", "code": "__int64 __fastcall DecodeLDR ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; @@v8@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) || @@v12@@ == @@v11@@ ) @@v8@@ = Number ; v2 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; v5 = DecodeAddrMode7Operand ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; v6 = DecodePostIdxReg ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; v7 = DecodePredicateOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) result = Number L ; else result = @@v8@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeMRRC2", "code": "__int64 __fastcall DecodeMRRC2 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; @@v5@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( @@v8@@ & Number ) == Number ) return Number L ; if ( @@v7@@ == @@v6@@ ) @@v5@@ = Number ; MCOperand_CreateImm0 ( @@a1@@ , @@v8@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v9@@ ) ; v3 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v3 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]}