{"name": "DecodeVCVTQ", "code": "__int64 __fastcall DecodeVCVTQ ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; @@v5@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( @@v8@@ & Number ) != Number || @@v7@@ != Number ) { if ( ( @@v8@@ & Number ) != Number ) { v3 = DecodeQPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v3 ) != Number ) { result = Number L ; } else { v4 = DecodeQPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) { result = Number L ; } else { MCOperand_CreateImm0 ( @@a1@@ , ( unsigned int ) ( Number - @@v8@@ ) ) ; result = @@v5@@ ; } } } else { result = Number L ; } } else if ( @@v6@@ == Number ) { result = Number L ; } else { MCInst_setOpcode ( @@a1@@ , Number L ) ; result = DecodeNEONModImmInstruction ( @@a1@@ , @@a2@@ ) ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]}
{"name": "Check", "code": "__int64 __fastcall Check ( _DWORD * @@a1@@ , unsigned int @@a2@@ ) { if ( @@a2@@ == Number ) return Number L ; if ( @@a2@@ <= Number ) { if ( ! @@a2@@ ) { * @@a1@@ = Number ; return Number L ; } if ( @@a2@@ == Number ) { * @@a1@@ = Number ; return Number L ; } } return Number L ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} {"name": "fieldFromInstruction_4", "code": "__int64 __fastcall fieldFromInstruction_4 ( unsigned int @@a1@@ , char @@a2@@ , int @@a3@@ ) { int @@v4@@ ; if ( @@a3@@ == Number ) @@v4@@ = Number ; else @@v4@@ = ( ( Number << @@a3@@ ) - Number ) << @@a2@@ ; return ( @@v4@@ & @@a1@@ ) >> @@a2@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}]} {"name": "DecodeQPRRegisterClass", "code": "__int64 __fastcall DecodeQPRRegisterClass ( __int64 @@a1@@ , unsigned int @@a2@@ ) { if ( @@a2@@ > Number || ( @@a2@@ & Number ) != Number ) return Number L ; MCOperand_CreateReg0 ( @@a1@@ , * ( ( unsigned __int16 * ) & QPRDecoderTable + ( @@a2@@ >> Number ) ) ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} {"name": "DecodeNEONModImmInstruction", "code": "__int64 __fastcall DecodeNEONModImmInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v8@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) { v2 = DecodeQPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) != Number ) return Number L ; } else { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; } MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; v5 = MCInst_getOpcode ( @@a1@@ ) ; if ( v5 > Number ) return @@v8@@ ; if ( v5 >= Number ) goto LABEL_16 ; if ( v5 >= Number ) goto LABEL_14 ; if ( v5 <= Number ) { if ( v5 < Number ) return @@v8@@ ; LABEL_14 : v6 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; return @@v8@@ ; } if ( v5 - Number <= Number ) { LABEL_16 : v7 = DecodeQPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; } return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]}