{"name": "gen_helper_enter64_level", "code": "unsigned __int64 __fastcall gen_helper_enter64_level ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { __int64 @@v4@@ [ Number ] ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ [ Number ] = @@a1@@ ; @@v4@@ [ Number ] = @@a2@@ ; @@v4@@ [ Number ] = @@a3@@ ; tcg_gen_helperN ( ( __int64 ) & helper_enter64_level , Number , Number , Number , Number , ( __int64 ) @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
{"name": "tcg_gen_helperN", "code": "unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r80"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_enter", "code": "unsigned __int64 __fastcall gen_enter ( _DWORD * @@a1@@ , int @@a2@@ , char @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; int v9 ; unsigned int @@v11@@ ; int v12 ; int v13 ; int v14 ; int v15 ; unsigned __int64 @@v16@@ ; @@v16@@ = __readfsqword ( Number ) ; @@v11@@ = @@a3@@ & Number ; if ( @@a1@@ [ Number ] ) { if ( @@a1@@ [ Number ] ) v3 = Number ; else v3 = Number ; v12 = v3 ; v14 = Number << v3 ; gen_op_movl_A0_reg ( Number ) ; gen_op_addq_A0_im ( - v14 ) ; tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; gen_op_mov_TN_reg ( Number , Number , Number ) ; gen_op_st_T0_A0 ( @@a1@@ [ Number ] + v12 ) ; if ( @@v11@@ ) { v4 = dword_2E2A4 ; v5 = tcg_const_i32 ( v12 == Number ) ; v6 = tcg_const_i32 ( @@v11@@ ) ; gen_helper_enter64_level ( v6 , v5 , v4 ) ; } gen_op_mov_reg_T1 ( v12 , Number ) ; tcg_gen_addi_i64 ( dword_2E2A4 , dword_2E2A4 , ( int ) ( @@v11@@ * - v14 - @@a2@@ ) ) ; gen_op_mov_reg_T1 ( Number , Number ) ; } else { v13 = @@a1@@ [ Number ] + Number ; v15 = Number << @@a1@@ [ Number ] ; gen_op_movl_A0_reg ( Number ) ; gen_op_addl_A0_im ( - v15 ) ; if ( ! @@a1@@ [ Number ] ) gen_op_andl_A0_ffff ( ) ; tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; if ( @@a1@@ [ Number ] ) gen_op_addl_A0_seg ( Number ) ; gen_op_mov_TN_reg ( Number , Number , Number ) ; gen_op_st_T0_A0 ( @@a1@@ [ Number ] + v13 ) ; if ( @@v11@@ ) { v7 = dword_2E2A4 ; v8 = tcg_const_i32 ( ( unsigned int ) @@a1@@ [ Number ] ) ; v9 = tcg_const_i32 ( @@v11@@ ) ; gen_helper_enter_level ( v9 , v8 , v7 ) ; } gen_op_mov_reg_T1 ( v13 , Number ) ; tcg_gen_addi_i64 ( dword_2E2A4 , dword_2E2A4 , ( int ) ( @@v11@@ * - v15 - @@a2@@ ) ) ; gen_op_mov_reg_T1 ( @@a1@@ [ Number ] + Number , Number ) ; } return __readfsqword ( Number ) ^ @@v16@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "char", "s": 1}, "location": "r16"}, {"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v16", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}]}