{"name": "gen_op_movl_A0_seg", "code": "unsigned __int64 __fastcall gen_op_movl_A0_seg ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_ld32u_i64 ( cpu_A0 , cpu_env , Number L * @@a1@@ + Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
{"name": "tcg_gen_ld32u_i64", "code": "unsigned __int64 __fastcall tcg_gen_ld32u_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_string_movl_A0_ESI", "code": "unsigned __int64 __fastcall gen_string_movl_A0_ESI ( int * @@a1@@ ) { int @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = * @@a1@@ ; if ( @@a1@@ [ Number ] == Number ) { if ( @@v2@@ < Number ) { gen_op_movq_A0_reg ( Number ) ; } else { gen_op_movq_A0_seg ( @@v2@@ ) ; gen_op_addq_A0_reg_sN ( Number , Number ) ; } } else if ( @@a1@@ [ Number ] ) { if ( @@a1@@ [ Number ] && @@v2@@ < Number ) @@v2@@ = Number ; if ( @@v2@@ < Number ) { gen_op_movl_A0_reg ( Number ) ; } else { gen_op_movl_A0_seg ( @@v2@@ ) ; gen_op_addl_A0_reg_sN ( Number , Number ) ; } } else { if ( @@v2@@ < Number ) @@v2@@ = Number ; gen_op_movl_A0_reg ( Number ) ; gen_op_andl_A0_ffff ( ) ; gen_op_addl_A0_seg ( @@v2@@ ) ; } return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "int"}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_string_movl_A0_EDI", "code": "unsigned __int64 __fastcall gen_string_movl_A0_EDI ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) == Number ) { gen_op_movq_A0_reg ( Number ) ; } else if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { gen_op_movl_A0_seg ( Number ) ; gen_op_addl_A0_reg_sN ( Number , Number ) ; } else { gen_op_movl_A0_reg ( Number ) ; } } else { gen_op_movl_A0_reg ( Number ) ; gen_op_andl_A0_ffff ( ) ; gen_op_addl_A0_seg ( Number ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op", "code": "unsigned __int64 __fastcall gen_op ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( @@a4@@ == Number ) gen_op_ld_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_TN_reg ( @@a3@@ , Number , @@a4@@ ) ; switch ( @@a2@@ ) { case Number : gen_op_addl_T0_T1 ( ) ; if ( @@a4@@ == Number ) gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; gen_op_update2_cc ( ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = @@a3@@ + Number ; return __readfsqword ( Number ) ^ @@v7@@ ; case Number : tcg_gen_or_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; if ( @@a4@@ == Number ) goto LABEL_32 ; goto LABEL_28 ; case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) gen_op_set_cc_op ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_compute_eflags_c ( cpu_tmp4 ) ; tcg_gen_add_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; tcg_gen_add_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , cpu_tmp4 ) ; if ( @@a4@@ == Number ) gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; tcg_gen_mov_i64 ( cpu_cc_src , dword_2E2A4 ) ; tcg_gen_mov_i64 ( cpu_cc_dst , cpu_T [ Number ] ) ; tcg_gen_trunc_i64_i32 ( cpu_tmp2_i32 , cpu_tmp4 ) ; tcg_gen_shli_i32 ( cpu_tmp2_i32 , cpu_tmp2_i32 , Number ) ; tcg_gen_addi_i32 ( cpu_cc_op , cpu_tmp2_i32 , @@a3@@ + Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; return __readfsqword ( Number ) ^ @@v7@@ ; case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) gen_op_set_cc_op ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_compute_eflags_c ( cpu_tmp4 ) ; tcg_gen_sub_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; tcg_gen_sub_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , cpu_tmp4 ) ; if ( @@a4@@ == Number ) gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; tcg_gen_mov_i64 ( cpu_cc_src , dword_2E2A4 ) ; tcg_gen_mov_i64 ( cpu_cc_dst , cpu_T [ Number ] ) ; tcg_gen_trunc_i64_i32 ( cpu_tmp2_i32 , cpu_tmp4 ) ; tcg_gen_shli_i32 ( cpu_tmp2_i32 , cpu_tmp2_i32 , Number ) ; tcg_gen_addi_i32 ( cpu_cc_op , cpu_tmp2_i32 , @@a3@@ + Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; return __readfsqword ( Number ) ^ @@v7@@ ; case Number : tcg_gen_sub_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; if ( @@a4@@ == Number ) gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; gen_op_update2_cc ( ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = @@a3@@ + Number ; return __readfsqword ( Number ) ^ @@v7@@ ; case Number : tcg_gen_xor_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; if ( @@a4@@ != Number ) goto LABEL_28 ; goto LABEL_32 ; case Number : gen_op_cmpl_T0_T1_cc ( ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = @@a3@@ + Number ; return __readfsqword ( Number ) ^ @@v7@@ ; default : tcg_gen_and_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; if ( @@a4@@ == Number ) LABEL_32 : gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else LABEL_28 : gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; gen_op_update1_cc ( ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = @@a3@@ + Number ; return __readfsqword ( Number ) ^ @@v7@@ ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_movl", "code": "unsigned __int64 __fastcall gen_op_movl ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( cpu_tmp2_i32 , cpu_env , @@a2@@ ) ; tcg_gen_st_i32 ( cpu_tmp2_i32 , cpu_env , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}