{"name": "DecoderGPRRegisterClass", "code": "__int64 __fastcall DecoderGPRRegisterClass ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; @@v4@@ = Number ; if ( @@a2@@ == Number || @@a2@@ == Number ) @@v4@@ = Number ; @@v2@@ = DecodeGPRRegisterClass ( @@a1@@ , @@a2@@ ) ; Check ( & @@v4@@ , @@v2@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}]}
{"name": "Check", "code": "__int64 __fastcall Check ( _DWORD * @@a1@@ , unsigned int @@a2@@ ) { if ( @@a2@@ == Number ) return Number L ; if ( @@a2@@ <= Number ) { if ( ! @@a2@@ ) { * @@a1@@ = Number ; return Number L ; } if ( @@a2@@ == Number ) { * @@a1@@ = Number ; return Number L ; } } return Number L ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} {"name": "DecodeGPRRegisterClass", "code": "__int64 __fastcall DecodeGPRRegisterClass ( __int64 @@a1@@ , unsigned int @@a2@@ ) { if ( @@a2@@ > Number ) return Number L ; MCOperand_CreateReg0 ( @@a1@@ , ( unsigned __int16 ) GPRDecoderTable [ @@a2@@ ] ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} {"name": "DecodeT2MOVTWInstruction", "code": "__int64 __fastcall DecodeT2MOVTWInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; @@v5@@ = Number ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v6@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v6@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; if ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) == Number ) { v2 = DecoderGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; } v4 = DecoderGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v6@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2AddrModeSOReg", "code": "__int64 __fastcall DecodeT2AddrModeSOReg ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int v5 ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; @@v6@@ = Number ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = MCInst_getOpcode ( @@a1@@ ) - Number ; if ( v2 <= Number && ( ( Number L << v2 ) & Number ) != Number && @@v9@@ == Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v4 ) != Number ) return Number L ; v5 = DecoderGPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v5 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v7@@ ) ; return @@v6@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LoadT", "code": "__int64 __fastcall DecodeT2LoadT ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 result ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; @@v9@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = ( @@v12@@ << Number ) | fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number ) { switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_9 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_9 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_9 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_9 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; LABEL_9 : result = DecodeT2LoadLabel ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; break ; default : result = Number L ; break ; } } else { v5 = DecoderGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) { result = Number L ; } else { v6 = DecodeT2AddrModeImm8 ( @@a1@@ , @@v10@@ , @@a3@@ , @@a4@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) result = Number L ; else result = @@v9@@ ; } } return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeThumbTableBranch", "code": "__int64 __fastcall DecodeThumbTableBranch ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; @@v5@@ = Number ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v7@@ == Number ) @@v5@@ = Number ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecoderGPRRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) result = Number L ; else result = @@v5@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LDRDPreInstruction", "code": "__int64 __fastcall DecodeT2LDRDPreInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; bool @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v7@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = @@v11@@ == Number || @@v9@@ == Number ; @@v12@@ |= ( @@v10@@ << Number ) | ( @@v13@@ << Number ) ; if ( @@v8@@ && ( @@v13@@ == @@v15@@ || @@v13@@ == @@v14@@ ) ) Check ( & @@v7@@ , Number ) ; if ( @@v15@@ == @@v14@@ ) Check ( & @@v7@@ , Number ) ; v2 = DecoderGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; v4 = DecoderGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecoderGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodeT2AddrModeImm8s4 ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v8", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s29"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2STRDPreInstruction", "code": "__int64 __fastcall DecodeT2STRDPreInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; bool @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v7@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = @@v11@@ == Number || @@v9@@ == Number ; @@v12@@ |= ( @@v10@@ << Number ) | ( @@v13@@ << Number ) ; if ( @@v8@@ && ( @@v13@@ == @@v15@@ || @@v13@@ == @@v14@@ ) ) Check ( & @@v7@@ , Number ) ; v2 = DecoderGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; v4 = DecoderGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecoderGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodeT2AddrModeImm8s4 ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v8", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s29"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]}