{"name": "gen_op_addl_A0_seg", "code": "unsigned __int64 __fastcall gen_op_addl_A0_seg ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_ld_i64 ( cpu_tmp0 , cpu_env , Number L * @@a1@@ + Number ) ; tcg_gen_add_i64 ( cpu_A0 , cpu_A0 , cpu_tmp0 ) ; tcg_gen_andi_i64 ( cpu_A0 , cpu_A0 , Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
{"name": "tcg_gen_ld_i64", "code": "unsigned __int64 __fastcall tcg_gen_ld_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "tcg_gen_add_i64", "code": "unsigned __int64 __fastcall tcg_gen_add_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "tcg_gen_andi_i64", "code": "unsigned __int64 __fastcall tcg_gen_andi_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_and_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_string_movl_A0_ESI", "code": "unsigned __int64 __fastcall gen_string_movl_A0_ESI ( int * @@a1@@ ) { int @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = * @@a1@@ ; if ( @@a1@@ [ Number ] == Number ) { if ( @@v2@@ < Number ) { gen_op_movq_A0_reg ( Number ) ; } else { gen_op_movq_A0_seg ( @@v2@@ ) ; gen_op_addq_A0_reg_sN ( Number , Number ) ; } } else if ( @@a1@@ [ Number ] ) { if ( @@a1@@ [ Number ] && @@v2@@ < Number ) @@v2@@ = Number ; if ( @@v2@@ < Number ) { gen_op_movl_A0_reg ( Number ) ; } else { gen_op_movl_A0_seg ( @@v2@@ ) ; gen_op_addl_A0_reg_sN ( Number , Number ) ; } } else { if ( @@v2@@ < Number ) @@v2@@ = Number ; gen_op_movl_A0_reg ( Number ) ; gen_op_andl_A0_ffff ( ) ; gen_op_addl_A0_seg ( @@v2@@ ) ; } return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "int"}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_string_movl_A0_EDI", "code": "unsigned __int64 __fastcall gen_string_movl_A0_EDI ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) == Number ) { gen_op_movq_A0_reg ( Number ) ; } else if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { gen_op_movl_A0_seg ( Number ) ; gen_op_addl_A0_reg_sN ( Number , Number ) ; } else { gen_op_movl_A0_reg ( Number ) ; } } else { gen_op_movl_A0_reg ( Number ) ; gen_op_andl_A0_ffff ( ) ; gen_op_addl_A0_seg ( Number ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op", "code": "unsigned __int64 __fastcall gen_op ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; if ( @@a4@@ == Number ) gen_op_ld_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_TN_reg ( @@a3@@ , Number , @@a4@@ ) ; switch ( @@a2@@ ) { case Number : gen_op_addl_T0_T1 ( ) ; if ( @@a4@@ == Number ) gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; gen_op_update2_cc ( ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = @@a3@@ + Number ; return __readfsqword ( Number ) ^ @@v7@@ ; case Number : tcg_gen_or_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; if ( @@a4@@ == Number ) goto LABEL_32 ; goto LABEL_28 ; case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) gen_op_set_cc_op ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_compute_eflags_c ( cpu_tmp4 ) ; tcg_gen_add_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; tcg_gen_add_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , cpu_tmp4 ) ; if ( @@a4@@ == Number ) gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; tcg_gen_mov_i64 ( cpu_cc_src , dword_2E2A4 ) ; tcg_gen_mov_i64 ( cpu_cc_dst , cpu_T [ Number ] ) ; tcg_gen_trunc_i64_i32 ( cpu_tmp2_i32 , cpu_tmp4 ) ; tcg_gen_shli_i32 ( cpu_tmp2_i32 , cpu_tmp2_i32 , Number ) ; tcg_gen_addi_i32 ( cpu_cc_op , cpu_tmp2_i32 , @@a3@@ + Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; return __readfsqword ( Number ) ^ @@v7@@ ; case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) gen_op_set_cc_op ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; gen_compute_eflags_c ( cpu_tmp4 ) ; tcg_gen_sub_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; tcg_gen_sub_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , cpu_tmp4 ) ; if ( @@a4@@ == Number ) gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; tcg_gen_mov_i64 ( cpu_cc_src , dword_2E2A4 ) ; tcg_gen_mov_i64 ( cpu_cc_dst , cpu_T [ Number ] ) ; tcg_gen_trunc_i64_i32 ( cpu_tmp2_i32 , cpu_tmp4 ) ; tcg_gen_shli_i32 ( cpu_tmp2_i32 , cpu_tmp2_i32 , Number ) ; tcg_gen_addi_i32 ( cpu_cc_op , cpu_tmp2_i32 , @@a3@@ + Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; return __readfsqword ( Number ) ^ @@v7@@ ; case Number : tcg_gen_sub_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; if ( @@a4@@ == Number ) gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; gen_op_update2_cc ( ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = @@a3@@ + Number ; return __readfsqword ( Number ) ^ @@v7@@ ; case Number : tcg_gen_xor_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; if ( @@a4@@ != Number ) goto LABEL_28 ; goto LABEL_32 ; case Number : gen_op_cmpl_T0_T1_cc ( ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = @@a3@@ + Number ; return __readfsqword ( Number ) ^ @@v7@@ ; default : tcg_gen_and_i64 ( cpu_T [ Number ] , cpu_T [ Number ] , dword_2E2A4 ) ; if ( @@a4@@ == Number ) LABEL_32 : gen_op_st_T0_A0 ( * ( _DWORD * ) ( @@a1@@ + Number ) + @@a3@@ ) ; else LABEL_28 : gen_op_mov_reg_T0 ( @@a3@@ , @@a4@@ ) ; gen_op_update1_cc ( ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = @@a3@@ + Number ; return __readfsqword ( Number ) ^ @@v7@@ ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_lea_modrm", "code": "unsigned __int64 __fastcall gen_lea_modrm ( __int64 @@a1@@ , int @@a2@@ , _DWORD * @@a3@@ , _DWORD * @@a4@@ ) { __int64 v4 ; __int64 v5 ; unsigned int v6 ; __int64 v7 ; int @@v11@@ ; int v12 ; int v13 ; int @@v14@@ ; int @@v15@@ ; int @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; __int64 v21 ; __int64 v22 ; unsigned __int64 @@v23@@ ; @@v23@@ = __readfsqword ( Number ) ; @@v17@@ = * ( _DWORD * ) @@a1@@ ; @@v18@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( * ( int * ) @@a1@@ >= Number ) @@v18@@ = Number ; @@v19@@ = ( @@a2@@ >> Number ) & Number ; @@v16@@ = @@a2@@ & Number ; if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) ) { if ( @@v19@@ ) { if ( @@v19@@ == Number ) { v7 = * ( _QWORD * ) ( @@a1@@ + Number ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = v7 + Number ; v22 = ( char ) ldub_p ( ( unsigned __int8 * ) ( guest_base + v7 ) ) ; } else { v22 = ( int ) lduw_le_p ( ( unsigned __int16 * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + guest_base ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; } } else { if ( @@v16@@ == Number ) { v6 = lduw_le_p ( ( unsigned __int16 * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + guest_base ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; gen_op_movl_A0_im ( v6 ) ; @@v16@@ = Number ; LABEL_60 : if ( ! @@v18@@ ) goto LABEL_68 ; if ( @@v17@@ < Number ) { if ( @@v16@@ == Number || @@v16@@ == Number || @@v16@@ == Number ) { gen_op_addl_A0_seg ( Number ) ; goto LABEL_68 ; } @@v17@@ = Number ; } goto LABEL_67 ; } v22 = Number L ; } switch ( @@a2@@ & Number ) { case Number : gen_op_movl_A0_reg ( Number ) ; gen_op_addl_A0_reg_sN ( Number , Number ) ; break ; case Number : gen_op_movl_A0_reg ( Number ) ; gen_op_addl_A0_reg_sN ( Number , Number ) ; break ; case Number : gen_op_movl_A0_reg ( Number ) ; gen_op_addl_A0_reg_sN ( Number , Number ) ; break ; case Number : gen_op_movl_A0_reg ( Number ) ; gen_op_addl_A0_reg_sN ( Number , Number ) ; break ; case Number : gen_op_movl_A0_reg ( Number ) ; break ; case Number : gen_op_movl_A0_reg ( Number ) ; break ; case Number : gen_op_movl_A0_reg ( Number ) ; break ; default : gen_op_movl_A0_reg ( Number ) ; break ; } if ( v22 ) gen_op_addl_A0_im ( v22 ) ; gen_op_andl_A0_ffff ( ) ; goto LABEL_60 ; } @@v11@@ = Number ; v12 = @@a2@@ & Number ; @@v14@@ = Number ; @@v15@@ = Number ; if ( @@v16@@ == Number ) { @@v11@@ = Number ; v4 = * ( _QWORD * ) ( @@a1@@ + Number ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = v4 + Number ; @@v20@@ = ldub_p ( ( unsigned __int8 * ) ( guest_base + v4 ) ) ; @@v15@@ = ( @@v20@@ >> Number ) & Number ; @@v14@@ = ( @@v20@@ >> Number ) & Number | * ( _DWORD * ) ( @@a1@@ + Number ) ; v12 = @@v20@@ & Number ; } v13 = * ( _DWORD * ) ( @@a1@@ + Number ) | v12 ; if ( @@v19@@ ) { if ( @@v19@@ == Number ) { v5 = * ( _QWORD * ) ( @@a1@@ + Number ) ; * ( _QWORD * ) ( @@a1@@ + Number ) = v5 + Number ; v21 = ( char ) ldub_p ( ( unsigned __int8 * ) ( guest_base + v5 ) ) ; } else { v21 = ( int ) ldl_le_p ( ( unsigned int * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + guest_base ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; } } else if ( ( v13 & Number ) == Number ) { v13 = Number ; v21 = ( int ) ldl_le_p ( ( unsigned int * ) ( * ( _QWORD * ) ( @@a1@@ + Number ) + guest_base ) ) ; * ( _QWORD * ) ( @@a1@@ + Number ) += Number L ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) && ! @@v11@@ ) v21 += * ( int * ) ( @@a1@@ + Number ) + * ( _QWORD * ) ( @@a1@@ + Number ) ; } else { v21 = Number L ; } if ( v13 < Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) == Number ) gen_op_movq_A0_im ( v21 ) ; else gen_op_movl_A0_im ( v21 ) ; } else { if ( v13 == Number && * ( _DWORD * ) ( @@a1@@ + Number ) ) v21 += * ( int * ) ( @@a1@@ + Number ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) == Number ) { gen_op_movq_A0_reg ( v13 ) ; if ( v21 ) gen_op_addq_A0_im ( v21 ) ; } else { gen_op_movl_A0_reg ( v13 ) ; if ( v21 ) gen_op_addl_A0_im ( v21 ) ; } } if ( @@v11@@ && @@v14@@ != Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) == Number ) gen_op_addq_A0_reg_sN ( @@v15@@ , @@v14@@ ) ; else gen_op_addl_A0_reg_sN ( @@v15@@ , @@v14@@ ) ; } if ( @@v18@@ ) { if ( @@v17@@ < Number ) { if ( v13 == Number || v13 == Number ) @@v17@@ = Number ; else @@v17@@ = Number ; } if ( * ( _DWORD * ) ( @@a1@@ + Number ) == Number ) { gen_op_addq_A0_seg ( @@v17@@ ) ; goto LABEL_68 ; } LABEL_67 : gen_op_addl_A0_seg ( @@v17@@ ) ; } LABEL_68 : * @@a3@@ = Number ; * @@a4@@ = Number ; return __readfsqword ( Number ) ^ @@v23@@ ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_DWORD"}, "location": "r16"}, {"n": "a4", "t": {"T": 3, "t": "_DWORD"}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v16", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v14", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s56"}, {"n": "v23", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_add_A0_ds_seg", "code": "unsigned __int64 __fastcall gen_add_A0_ds_seg ( int * @@a1@@ ) { int @@v2@@ ; int @@v3@@ ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ = @@a1@@ [ Number ] ; @@v2@@ = Number ; if ( * @@a1@@ >= Number ) { @@v2@@ = * @@a1@@ ; @@v3@@ = Number ; } if ( @@v3@@ ) { if ( @@a1@@ [ Number ] ) gen_op_addq_A0_seg ( @@v2@@ ) ; else gen_op_addl_A0_seg ( @@v2@@ ) ; } return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "int"}, "location": "r56"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v2", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_push_T0", "code": "unsigned __int64 __fastcall gen_push_T0 ( _DWORD * @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( @@a1@@ [ Number ] ) { gen_op_movq_A0_reg ( Number ) ; if ( @@a1@@ [ Number ] ) { gen_op_addq_A0_im ( Number ) ; gen_op_st_T0_A0 ( @@a1@@ [ Number ] + Number ) ; } else { gen_op_addq_A0_im ( Number ) ; gen_op_st_T0_A0 ( @@a1@@ [ Number ] + Number ) ; } gen_op_mov_reg_A0 ( Number , Number ) ; } else { gen_op_movl_A0_reg ( Number ) ; if ( @@a1@@ [ Number ] ) gen_op_addl_A0_im ( Number ) ; else gen_op_addl_A0_im ( Number ) ; if ( @@a1@@ [ Number ] ) { if ( @@a1@@ [ Number ] ) { tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; gen_op_addl_A0_seg ( Number ) ; } } else { gen_op_andl_A0_ffff ( ) ; tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; gen_op_addl_A0_seg ( Number ) ; } gen_op_st_T0_A0 ( @@a1@@ [ Number ] + Number + @@a1@@ [ Number ] ) ; if ( ! @@a1@@ [ Number ] || @@a1@@ [ Number ] ) gen_op_mov_reg_T1 ( @@a1@@ [ Number ] + Number , Number ) ; else gen_op_mov_reg_A0 ( Number , Number ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_push_T1", "code": "unsigned __int64 __fastcall gen_push_T1 ( _DWORD * @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( @@a1@@ [ Number ] ) { gen_op_movq_A0_reg ( Number ) ; if ( @@a1@@ [ Number ] ) { gen_op_addq_A0_im ( Number ) ; gen_op_st_T1_A0 ( @@a1@@ [ Number ] + Number ) ; } else { gen_op_addq_A0_im ( Number ) ; gen_op_st_T0_A0 ( @@a1@@ [ Number ] + Number ) ; } gen_op_mov_reg_A0 ( Number , Number ) ; } else { gen_op_movl_A0_reg ( Number ) ; if ( @@a1@@ [ Number ] ) gen_op_addl_A0_im ( Number ) ; else gen_op_addl_A0_im ( Number ) ; if ( @@a1@@ [ Number ] ) { if ( @@a1@@ [ Number ] ) gen_op_addl_A0_seg ( Number ) ; } else { gen_op_andl_A0_ffff ( ) ; gen_op_addl_A0_seg ( Number ) ; } gen_op_st_T1_A0 ( @@a1@@ [ Number ] + Number + @@a1@@ [ Number ] ) ; if ( ! @@a1@@ [ Number ] || @@a1@@ [ Number ] ) gen_stack_update ( ( __int64 ) @@a1@@ , Number << @@a1@@ [ Number ] ) ; else gen_op_mov_reg_A0 ( Number , Number ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_pop_T0", "code": "unsigned __int64 __fastcall gen_pop_T0 ( _DWORD * @@a1@@ ) { int @@v1@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; if ( @@a1@@ [ Number ] ) { gen_op_movq_A0_reg ( Number ) ; if ( @@a1@@ [ Number ] ) @@v1@@ = Number ; else @@v1@@ = Number ; gen_op_ld_T0_A0 ( @@v1@@ + @@a1@@ [ Number ] ) ; } else { gen_op_movl_A0_reg ( Number ) ; if ( @@a1@@ [ Number ] ) { if ( @@a1@@ [ Number ] ) gen_op_addl_A0_seg ( Number ) ; } else { gen_op_andl_A0_ffff ( ) ; gen_op_addl_A0_seg ( Number ) ; } gen_op_ld_T0_A0 ( @@a1@@ [ Number ] + Number + @@a1@@ [ Number ] ) ; } return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_stack_A0", "code": "unsigned __int64 __fastcall gen_stack_A0 ( __int64 @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; gen_op_movl_A0_reg ( Number ) ; if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) ) gen_op_andl_A0_ffff ( ) ; tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) gen_op_addl_A0_seg ( Number ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_pusha", "code": "unsigned __int64 __fastcall gen_pusha ( _DWORD * @@a1@@ ) { int @@i@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; gen_op_movl_A0_reg ( Number ) ; gen_op_addl_A0_im ( Number << @@a1@@ [ Number ] ) ; if ( ! @@a1@@ [ Number ] ) gen_op_andl_A0_ffff ( ) ; tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; if ( @@a1@@ [ Number ] ) gen_op_addl_A0_seg ( Number ) ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) { gen_op_mov_TN_reg ( Number , Number , Number - @@i@@ ) ; gen_op_st_T0_A0 ( @@a1@@ [ Number ] + Number + @@a1@@ [ Number ] ) ; gen_op_addl_A0_im ( Number << @@a1@@ [ Number ] ) ; } gen_op_mov_reg_T1 ( @@a1@@ [ Number ] + Number , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_popa", "code": "unsigned __int64 __fastcall gen_popa ( _DWORD * @@a1@@ ) { int @@i@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; gen_op_movl_A0_reg ( Number ) ; if ( ! @@a1@@ [ Number ] ) gen_op_andl_A0_ffff ( ) ; tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; tcg_gen_addi_i64 ( dword_2E2A4 , dword_2E2A4 , Number << @@a1@@ [ Number ] ) ; if ( @@a1@@ [ Number ] ) gen_op_addl_A0_seg ( Number ) ; for ( @@i@@ = Number ; @@i@@ <= Number ; ++ @@i@@ ) { if ( @@i@@ != Number ) { gen_op_ld_T0_A0 ( @@a1@@ [ Number ] + Number + @@a1@@ [ Number ] ) ; gen_op_mov_reg_T0 ( @@a1@@ [ Number ] + Number , Number - @@i@@ ) ; } gen_op_addl_A0_im ( Number << @@a1@@ [ Number ] ) ; } gen_op_mov_reg_T1 ( @@a1@@ [ Number ] + Number , Number ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_enter", "code": "unsigned __int64 __fastcall gen_enter ( _DWORD * @@a1@@ , int @@a2@@ , char @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; int v9 ; unsigned int @@v11@@ ; int v12 ; int v13 ; int v14 ; int v15 ; unsigned __int64 @@v16@@ ; @@v16@@ = __readfsqword ( Number ) ; @@v11@@ = @@a3@@ & Number ; if ( @@a1@@ [ Number ] ) { if ( @@a1@@ [ Number ] ) v3 = Number ; else v3 = Number ; v12 = v3 ; v14 = Number << v3 ; gen_op_movl_A0_reg ( Number ) ; gen_op_addq_A0_im ( - v14 ) ; tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; gen_op_mov_TN_reg ( Number , Number , Number ) ; gen_op_st_T0_A0 ( @@a1@@ [ Number ] + v12 ) ; if ( @@v11@@ ) { v4 = dword_2E2A4 ; v5 = tcg_const_i32 ( v12 == Number ) ; v6 = tcg_const_i32 ( @@v11@@ ) ; gen_helper_enter64_level ( v6 , v5 , v4 ) ; } gen_op_mov_reg_T1 ( v12 , Number ) ; tcg_gen_addi_i64 ( dword_2E2A4 , dword_2E2A4 , ( int ) ( @@v11@@ * - v14 - @@a2@@ ) ) ; gen_op_mov_reg_T1 ( Number , Number ) ; } else { v13 = @@a1@@ [ Number ] + Number ; v15 = Number << @@a1@@ [ Number ] ; gen_op_movl_A0_reg ( Number ) ; gen_op_addl_A0_im ( - v15 ) ; if ( ! @@a1@@ [ Number ] ) gen_op_andl_A0_ffff ( ) ; tcg_gen_mov_i64 ( dword_2E2A4 , cpu_A0 ) ; if ( @@a1@@ [ Number ] ) gen_op_addl_A0_seg ( Number ) ; gen_op_mov_TN_reg ( Number , Number , Number ) ; gen_op_st_T0_A0 ( @@a1@@ [ Number ] + v13 ) ; if ( @@v11@@ ) { v7 = dword_2E2A4 ; v8 = tcg_const_i32 ( ( unsigned int ) @@a1@@ [ Number ] ) ; v9 = tcg_const_i32 ( @@v11@@ ) ; gen_helper_enter_level ( v9 , v8 , v7 ) ; } gen_op_mov_reg_T1 ( v13 , Number ) ; tcg_gen_addi_i64 ( dword_2E2A4 , dword_2E2A4 , ( int ) ( @@v11@@ * - v15 - @@a2@@ ) ) ; gen_op_mov_reg_T1 ( @@a1@@ [ Number ] + Number , Number ) ; } return __readfsqword ( Number ) ^ @@v16@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "char", "s": 1}, "location": "r16"}, {"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v16", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}]}