{"name": "DecodeDPRRegisterClass", "code": "__int64 __fastcall DecodeDPRRegisterClass ( __int64 @@a1@@ , unsigned int @@a2@@ ) { if ( @@a2@@ > Number ) return Number L ; MCOperand_CreateReg0 ( @@a1@@ , DPRDecoderTable [ @@a2@@ ] ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]}
{"name": "DecodeDPR_8RegisterClass", "code": "__int64 __fastcall DecodeDPR_8RegisterClass ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@result@@ ; if ( @@a2@@ <= Number ) @@result@@ = DecodeDPRRegisterClass ( @@a1@@ , @@a2@@ ) ; else @@result@@ = Number L ; return @@result@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "result", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]} {"name": "DecodeDPR_VFP2RegisterClass", "code": "__int64 __fastcall DecodeDPR_VFP2RegisterClass ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@result@@ ; if ( @@a2@@ <= Number ) @@result@@ = DecodeDPRRegisterClass ( @@a1@@ , @@a2@@ ) ; else @@result@@ = Number L ; return @@result@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "result", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]} {"name": "DecodeDPRRegListOperand", "code": "__int64 __fastcall DecodeDPRRegListOperand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v3 ; int v4 ; unsigned int v5 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@i@@ ; @@v8@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ! @@v9@@ || @@v9@@ > Number || @@v10@@ + @@v9@@ > Number ) { if ( @@v10@@ + @@v9@@ <= Number ) v2 = @@v9@@ ; else v2 = Number - @@v10@@ ; @@v9@@ = v2 ; if ( v2 ) v3 = @@v9@@ ; else v3 = Number ; @@v9@@ = v3 ; v4 = Number ; if ( @@v9@@ <= Number ) v4 = @@v9@@ ; @@v9@@ = v4 ; @@v8@@ = Number ; } v5 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; for ( @@i@@ = Number ; @@i@@ < @@v9@@ - Number ; ++ @@i@@ ) { v7 = DecodeDPRRegisterClass ( @@a1@@ , ++ @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; } return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "i", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLDInstruction", "code": "__int64 __fastcall DecodeVLDInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v3 ; __int64 result ; unsigned int v5 ; char v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; unsigned int v16 ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; @@v17@@ = Number ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v21@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v20@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = MCInst_getOpcode ( @@a1@@ ) ; if ( v2 <= Number ) { if ( v2 >= Number ) goto LABEL_8 ; if ( v2 > Number ) { if ( v2 - Number <= Number ) { v5 = DecodeDPairSpacedRegisterClass ( @@a1@@ , @@v21@@ ) ; v6 = Check ( & @@v17@@ , v5 ) ; if ( v6 != Number ) return Number L ; goto LABEL_14 ; } goto LABEL_12 ; } if ( v2 >= Number ) { LABEL_8 : v3 = DecodeDPairRegisterClass ( @@a1@@ , @@v21@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v3 ) != Number ) return Number L ; goto LABEL_14 ; } } LABEL_12 : v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v21@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v7 ) != Number ) return Number L ; LABEL_14 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v8 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v8 ) == Number ) goto LABEL_19 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v9 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v9 ) == Number ) goto LABEL_19 ; result = Number L ; break ; default : LABEL_19 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v10 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v10 ) == Number ) goto LABEL_24 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v11 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v11 ) == Number ) goto LABEL_24 ; result = Number L ; break ; default : LABEL_24 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : v12 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v12 ) == Number ) goto LABEL_29 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : v13 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v13 ) == Number ) goto LABEL_29 ; result = Number L ; break ; default : LABEL_29 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; goto LABEL_33 ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v14 = DecodeGPRRegisterClass ( @@a1@@ , @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v14 ) == Number ) goto LABEL_33 ; result = Number L ; break ; default : LABEL_33 : v15 = DecodeAddrMode6Operand ( @@a1@@ , @@v19@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v15 ) != Number ) { result = Number L ; } else { switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_38 ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_42 ; default : if ( @@v18@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { LABEL_38 : if ( @@v18@@ != Number && @@v18@@ != Number ) { v16 = DecodeGPRRegisterClass ( @@a1@@ , @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v16 ) != Number ) return Number L ; } } LABEL_42 : result = @@v17@@ ; break ; } } break ; } break ; } break ; } break ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVSTInstruction", "code": "__int64 __fastcall DecodeVSTInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; char v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; unsigned int v16 ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; @@v17@@ = Number ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v21@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v20@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( @@v18@@ != Number ) { MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; goto LABEL_7 ; } result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v3 ) == Number ) goto LABEL_7 ; result = Number L ; break ; default : LABEL_7 : v4 = DecodeAddrMode6Operand ( @@a1@@ , @@v19@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v4 ) != Number ) { result = Number L ; } else { switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_15 ; default : if ( @@v18@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else if ( @@v18@@ != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v5 ) != Number ) return Number L ; } LABEL_15 : v6 = MCInst_getOpcode ( @@a1@@ ) ; if ( v6 > Number ) goto LABEL_26 ; if ( v6 >= Number ) goto LABEL_22 ; if ( v6 > Number ) { if ( v6 - Number <= Number ) { v8 = DecodeDPairSpacedRegisterClass ( @@a1@@ , @@v21@@ ) ; v9 = Check ( & @@v17@@ , v8 ) ; if ( v9 != Number ) return Number L ; goto LABEL_28 ; } } else if ( v6 >= Number ) { LABEL_22 : v7 = DecodeDPairRegisterClass ( @@a1@@ , @@v21@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v7 ) != Number ) return Number L ; goto LABEL_28 ; } LABEL_26 : v10 = DecodeDPRRegisterClass ( @@a1@@ , @@v21@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v10 ) != Number ) return Number L ; LABEL_28 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v11 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v11 ) == Number ) goto LABEL_33 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v12 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v12 ) == Number ) goto LABEL_33 ; result = Number L ; break ; default : LABEL_33 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v13 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v13 ) == Number ) goto LABEL_38 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v14 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v14 ) == Number ) goto LABEL_38 ; result = Number L ; break ; default : LABEL_38 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : v15 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v15 ) == Number ) goto LABEL_43 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : v16 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v16 ) == Number ) goto LABEL_43 ; result = Number L ; break ; default : LABEL_43 : result = @@v17@@ ; break ; } break ; } break ; } break ; } } break ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD1DupInstruction", "code": "__int64 __fastcall DecodeVLD1DupInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v8@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ! @@v9@@ && @@v10@@ == Number ) return Number L ; @@v10@@ <<= @@v9@@ ; if ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) - Number > Number ) { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; } else { v3 = DecodeDPairRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v3 ) != Number ) return Number L ; } if ( @@v11@@ != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; } v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; if ( @@v11@@ == Number || @@v11@@ == Number || ( v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) , ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) == Number ) ) result = @@v8@@ ; else result = Number L ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD2DupInstruction", "code": "__int64 __fastcall DecodeVLD2DupInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v8@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = Number << fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ *= Number * @@v9@@ ; switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v2 = DecodeDPairRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) == Number ) goto LABEL_8 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v4 = DecodeDPairSpacedRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) == Number ) goto LABEL_8 ; result = Number L ; break ; default : v5 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) { result = Number L ; } else { LABEL_8 : if ( @@v11@@ != Number ) MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) { result = Number L ; } else { MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; if ( @@v11@@ == Number || @@v11@@ == Number || ( v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) , ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) == Number ) ) result = @@v8@@ ; else result = Number L ; } } break ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD3DupInstruction", "code": "__int64 __fastcall DecodeVLD3DupInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v9@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) + Number ; v2 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v2 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v13@@ + ( _BYTE ) @@v10@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v4 ) != Number ) return Number L ; v5 = DecodeDPRRegisterClass ( @@a1@@ , ( Number * ( _BYTE ) @@v10@@ + ( _BYTE ) @@v13@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) return Number L ; if ( @@v11@@ != Number ) { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) return Number L ; } v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; if ( @@v11@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else if ( @@v11@@ != Number ) { v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) return Number L ; } return @@v9@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD4DupInstruction", "code": "__int64 __fastcall DecodeVLD4DupInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; @@v10@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v15@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) + Number ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number ) { if ( ! @@v16@@ ) return Number L ; @@v16@@ = Number ; } else if ( @@v12@@ == Number ) { @@v16@@ *= Number ; } else { @@v12@@ = Number << @@v12@@ ; @@v16@@ *= Number * @@v12@@ ; } v3 = DecodeDPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v3 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v15@@ + ( _BYTE ) @@v11@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v4 ) != Number ) return Number L ; v5 = DecodeDPRRegisterClass ( @@a1@@ , ( Number * ( _BYTE ) @@v11@@ + ( _BYTE ) @@v15@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v5 ) != Number ) return Number L ; v6 = DecodeDPRRegisterClass ( @@a1@@ , ( Number * ( _BYTE ) @@v11@@ + ( _BYTE ) @@v15@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v6 ) != Number ) return Number L ; if ( @@v13@@ != Number ) { v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v7 ) != Number ) return Number L ; } v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v8 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v16@@ ) ; if ( @@v13@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else if ( @@v13@@ != Number ) { v9 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v9 ) != Number ) return Number L ; } return @@v10@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeNEONModImmInstruction", "code": "__int64 __fastcall DecodeNEONModImmInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v8@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) { v2 = DecodeQPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) != Number ) return Number L ; } else { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; } MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; v5 = MCInst_getOpcode ( @@a1@@ ) ; if ( v5 > Number ) return @@v8@@ ; if ( v5 >= Number ) goto LABEL_16 ; if ( v5 >= Number ) goto LABEL_14 ; if ( v5 <= Number ) { if ( v5 < Number ) return @@v8@@ ; LABEL_14 : v6 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; return @@v8@@ ; } if ( v5 - Number <= Number ) { LABEL_16 : v7 = DecodeQPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; } return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVSHLMaxInstruction", "code": "__int64 __fastcall DecodeVSHLMaxInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; @@v5@@ = Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeQPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , Number << @@v6@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeTBLInstruction", "code": "__int64 __fastcall DecodeTBLInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v9@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v2 ) != Number ) return Number L ; if ( @@v10@@ ) { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v4 ) != Number ) return Number L ; } v5 = MCInst_getOpcode ( @@a1@@ ) ; if ( v5 == Number || v5 == Number ) { v6 = DecodeDPairRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) return Number L ; } else { v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) return Number L ; } v8 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) result = Number L ; else result = @@v9@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD1LN", "code": "__int64 __fastcall DecodeVLD1LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v9@@ = Number ; @@v15@@ = Number ; @@v14@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v10@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v3 ) { if ( v3 != Number ) return Number L ; @@v15@@ = Number ; } else { @@v15@@ = Number ; } } else { if ( @@v10@@ > Number ) return Number L ; if ( @@v10@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v4 ) != Number ) return Number L ; if ( @@v12@@ != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) return Number L ; } v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v15@@ ) ; if ( @@v12@@ != Number ) { if ( @@v12@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) return Number L ; } } v8 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; return @@v9@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVST1LN", "code": "__int64 __fastcall DecodeVST1LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; @@v8@@ = Number ; @@v14@@ = Number ; @@v13@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v9@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v3 ) { if ( v3 != Number ) return Number L ; @@v14@@ = Number ; } else { @@v14@@ = Number ; } } else { if ( @@v9@@ > Number ) return Number L ; if ( @@v9@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v14@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } if ( @@v11@@ != Number ) { v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; } v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; if ( @@v11@@ != Number ) { if ( @@v11@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; } } v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v13@@ ) ; return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD2LN", "code": "__int64 __fastcall DecodeVLD2LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; @@v10@@ = Number ; @@v17@@ = Number ; @@v16@@ = Number ; @@v15@@ = Number ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v11@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v17@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { if ( @@v11@@ > Number ) return Number L ; if ( @@v11@@ ) { @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v17@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v17@@ = Number ; } } v3 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v3 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ + @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v4 ) != Number ) return Number L ; if ( @@v13@@ != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v5 ) != Number ) return Number L ; } v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v6 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v17@@ ) ; if ( @@v13@@ != Number ) { if ( @@v13@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v7 ) != Number ) return Number L ; } } v8 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v8 ) != Number ) return Number L ; v9 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ + @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v9 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v16@@ ) ; return @@v10@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVST2LN", "code": "__int64 __fastcall DecodeVST2LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v8@@ = Number ; @@v15@@ = Number ; @@v14@@ = Number ; @@v13@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v9@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v13@@ = Number ; } else { if ( @@v9@@ > Number ) return Number L ; if ( @@v9@@ ) { @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v13@@ = Number ; } else { @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } } if ( @@v11@@ != Number ) { v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v3 ) != Number ) return Number L ; } v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v15@@ ) ; if ( @@v11@@ != Number ) { if ( @@v11@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; } } v6 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ + @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD3LN", "code": "__int64 __fastcall DecodeVLD3LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; int @@v18@@ ; unsigned int @@v19@@ ; @@v12@@ = Number ; @@v17@@ = Number ; @@v19@@ = Number ; @@v18@@ = Number ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v13@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v18@@ = Number ; } else { if ( @@v13@@ > Number ) return Number L ; if ( @@v13@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v18@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } v3 = DecodeDPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v3 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v14@@ + @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v4 ) != Number ) return Number L ; v5 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v18@@ + @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v5 ) != Number ) return Number L ; if ( @@v15@@ != Number ) { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v16@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v6 ) != Number ) return Number L ; } v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v16@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v7 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v17@@ ) ; if ( @@v15@@ != Number ) { if ( @@v15@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v8 ) != Number ) return Number L ; } } v9 = DecodeDPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v9 ) != Number ) return Number L ; v10 = DecodeDPRRegisterClass ( @@a1@@ , @@v14@@ + @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v10 ) != Number ) return Number L ; v11 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v18@@ + @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v11 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v19@@ ) ; return @@v12@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeVST3LN", "code": "__int64 __fastcall DecodeVST3LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; int @@v15@@ ; unsigned int @@v16@@ ; @@v9@@ = Number ; @@v14@@ = Number ; @@v16@@ = Number ; @@v15@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v10@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { if ( @@v10@@ > Number ) return Number L ; if ( @@v10@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } if ( @@v12@@ != Number ) { v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v3 ) != Number ) return Number L ; } v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; if ( @@v12@@ != Number ) { if ( @@v12@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) return Number L ; } } v6 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) return Number L ; v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ + @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) return Number L ; v8 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v15@@ + @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v16@@ ) ; return @@v9@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD4LN", "code": "__int64 __fastcall DecodeVLD4LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; @@v15@@ = Number ; @@v22@@ = Number ; @@v21@@ = Number ; @@v20@@ = Number ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v17@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v16@@ == Number ) { v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v3 ) { if ( v3 == Number ) return Number L ; @@v22@@ = Number << fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } else { @@v22@@ = Number ; } @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v20@@ = Number ; } else { if ( @@v16@@ > Number ) return Number L ; if ( @@v16@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v22@@ = Number ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v20@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v22@@ = Number ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v4 ) != Number ) return Number L ; v5 = DecodeDPRRegisterClass ( @@a1@@ , @@v17@@ + @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v5 ) != Number ) return Number L ; v6 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v20@@ + @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v6 ) != Number ) return Number L ; v7 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v20@@ + @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v7 ) != Number ) return Number L ; if ( @@v18@@ != Number ) { v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v19@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v8 ) != Number ) return Number L ; } v9 = DecodeGPRRegisterClass ( @@a1@@ , @@v19@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v9 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v22@@ ) ; if ( @@v18@@ != Number ) { if ( @@v18@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v10 = DecodeGPRRegisterClass ( @@a1@@ , @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v10 ) != Number ) return Number L ; } } v11 = DecodeDPRRegisterClass ( @@a1@@ , @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v11 ) != Number ) return Number L ; v12 = DecodeDPRRegisterClass ( @@a1@@ , @@v17@@ + @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v12 ) != Number ) return Number L ; v13 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v20@@ + @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v13 ) != Number ) return Number L ; v14 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v20@@ + @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v14 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v21@@ ) ; return @@v15@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVST4LN", "code": "__int64 __fastcall DecodeVST4LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; @@v11@@ = Number ; @@v18@@ = Number ; @@v17@@ = Number ; @@v16@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number ) { v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v3 ) { if ( v3 == Number ) return Number L ; @@v18@@ = Number << fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } else { @@v18@@ = Number ; } @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v16@@ = Number ; } else { if ( @@v12@@ > Number ) return Number L ; if ( @@v12@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v18@@ = Number ; @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v16@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v18@@ = Number ; @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } if ( @@v14@@ != Number ) { v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v4 ) != Number ) return Number L ; } v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v5 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v18@@ ) ; if ( @@v14@@ != Number ) { if ( @@v14@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v6 ) != Number ) return Number L ; } } v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v7 ) != Number ) return Number L ; v8 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ + @@v16@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v8 ) != Number ) return Number L ; v9 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v16@@ + @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v9 ) != Number ) return Number L ; v10 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v16@@ + @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v10 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v17@@ ) ; return @@v11@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v16", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVCVTD", "code": "__int64 __fastcall DecodeVCVTD ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; @@v5@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( @@v8@@ & Number ) != Number || @@v7@@ != Number ) { if ( ( @@v8@@ & Number ) != Number ) { v3 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v3 ) != Number ) { result = Number L ; } else { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) { result = Number L ; } else { MCOperand_CreateImm0 ( @@a1@@ , ( unsigned int ) ( Number - @@v8@@ ) ) ; result = @@v5@@ ; } } } else { result = Number L ; } } else if ( @@v6@@ == Number ) { result = Number L ; } else { MCInst_setOpcode ( @@a1@@ , Number L ) ; result = DecodeNEONModImmInstruction ( @@a1@@ , @@a2@@ ) ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]}