{"name": "fieldFromInstruction_4", "code": "__int64 __fastcall fieldFromInstruction_4 ( unsigned int @@a1@@ , char @@a2@@ , int @@a3@@ ) { int @@v4@@ ; if ( @@a3@@ == Number ) @@v4@@ = Number ; else @@v4@@ = ( ( Number << @@a3@@ ) - Number ) << @@a2@@ ; return ( @@v4@@ & @@a1@@ ) >> @@a2@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}]}
{"name": "decodeInstruction_4", "code": "__int64 __fastcall decodeInstruction_4 ( char * @@a1@@ , __int64 @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ , char @@a6@@ ) { __int64 result ; char * v7 ; char * v8 ; char * v9 ; char * v10 ; char * v11 ; char * v12 ; bool v13 ; unsigned int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; unsigned int @@v23@@ ; int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; bool @@v27@@ ; int @@v28@@ ; int @@v29@@ ; __int64 @@v30@@ ; unsigned int @@v31@@ ; int @@v32@@ ; char * @@v33@@ ; @@v30@@ = ARM_getFeatureBits ( @@a6@@ ) ; @@v33@@ = @@a1@@ ; @@v32@@ = Number ; @@v31@@ = Number ; while ( Number ) { switch ( * @@v33@@ ) { case Number : @@v21@@ = ( unsigned __int8 ) * ++ @@v33@@ ; @@v17@@ = ( unsigned __int8 ) * ++ @@v33@@ ; ++ @@v33@@ ; @@v32@@ = fieldFromInstruction_4 ( @@a3@@ , @@v21@@ , @@v17@@ ) ; continue ; case Number : @@v18@@ = decodeULEB128 ( ++ @@v33@@ , & @@v17@@ ) ; @@v33@@ += @@v17@@ ; v7 = @@v33@@ ++ ; @@v23@@ = ( unsigned __int8 ) * v7 ; v8 = @@v33@@ ++ ; @@v23@@ |= ( unsigned __int8 ) * v8 << Number ; if ( @@v18@@ != @@v32@@ ) @@v33@@ += @@v23@@ ; continue ; case Number : @@v21@@ = ( unsigned __int8 ) * ++ @@v33@@ ; @@v17@@ = ( unsigned __int8 ) * ++ @@v33@@ ; @@v20@@ = fieldFromInstruction_4 ( @@a3@@ , @@v21@@ , @@v17@@ ) ; @@v19@@ = decodeULEB128 ( ++ @@v33@@ , & @@v17@@ ) ; @@v33@@ += @@v17@@ ; v9 = @@v33@@ ++ ; @@v23@@ = ( unsigned __int8 ) * v9 ; v10 = @@v33@@ ++ ; @@v23@@ |= ( unsigned __int8 ) * v10 << Number ; if ( @@v19@@ != @@v20@@ ) @@v33@@ += @@v23@@ ; continue ; case Number : @@v24@@ = decodeULEB128 ( ++ @@v33@@ , & @@v17@@ ) ; @@v33@@ += @@v17@@ ; v11 = @@v33@@ ++ ; @@v23@@ = ( unsigned __int8 ) * v11 ; v12 = @@v33@@ ++ ; @@v23@@ |= ( unsigned __int8 ) * v12 << Number ; if ( ! checkDecoderPredicate ( @@v24@@ , @@v30@@ ) ) @@v33@@ += @@v23@@ ; continue ; case Number : @@v26@@ = decodeULEB128 ( ++ @@v33@@ , & @@v17@@ ) ; @@v33@@ += @@v17@@ ; @@v25@@ = decodeULEB128 ( @@v33@@ , & @@v17@@ ) ; @@v33@@ += @@v17@@ ; MCInst_setOpcode ( @@a2@@ , @@v26@@ ) ; result = decodeToMCInst_4 ( @@v31@@ , @@v25@@ , @@a3@@ , @@a2@@ , @@a4@@ , @@a5@@ ) ; break ; case Number : @@v29@@ = decodeULEB128 ( ++ @@v33@@ , & @@v17@@ ) ; @@v33@@ += @@v17@@ ; @@v28@@ = decodeULEB128 ( @@v33@@ , & @@v17@@ ) ; @@v33@@ += @@v17@@ ; v13 = ( @@v29@@ & @@a3@@ ) != Number || ( @@v28@@ & ~ @@a3@@ ) != Number ; @@v27@@ = v13 ; if ( v13 ) @@v31@@ = Number ; continue ; case Number : result = Number L ; break ; default : result = Number L ; break ; } return result ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 3, "t": "char"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "char", "s": 1}, "location": "r80"}, {"n": "v32", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v31", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v30", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v29", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v28", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v27", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s33"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}, {"n": "v24", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v21", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s64"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s72"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v33", "t": {"T": 3, "t": "char"}, "location": "s8"}]} {"name": "_Thumb_getInstruction", "code": "__int64 __fastcall Thumb_getInstruction ( __int64 @@a1@@ , __int64 @@a2@@ , _WORD * @@a3@@ , unsigned __int64 @@a4@@ , _WORD * @@a5@@ , __int64 @@a6@@ ) { __int64 result ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; __int64 v10 ; __int64 v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; int @@v20@@ ; int @@v21@@ ; bool @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; unsigned __int64 @@i@@ ; int @@v28@@ ; unsigned __int16 @@v29@@ ; if ( @@a4@@ <= Number ) return Number L ; if ( * ( _QWORD * ) ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) ) { memset ( ( void * ) ( * ( _QWORD * ) ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) + Number L ) , Number , Number ) ; for ( @@i@@ = Number L ; @@i@@ <= Number ; ++ @@i@@ ) * ( _DWORD * ) ( * ( _QWORD * ) ( * ( _QWORD * ) ( @@a2@@ + Number ) + Number L ) + Number * @@i@@ + Number ) = Number ; } LOWORD ( @@v19@@ ) = * @@a3@@ ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) @@v29@@ = _byteswap_ushort ( @@v19@@ ) ; else @@v29@@ = @@v19@@ ; @@v18@@ = decodeInstruction_2 ( DecoderTableThumb16 , @@a2@@ , @@v29@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) { * @@a5@@ = Number ; v7 = AddThumbPredicate ( @@a1@@ , @@a2@@ ) ; Check ( & @@v18@@ , v7 ) ; return @@v18@@ ; } MCInst_clear ( @@a2@@ ) ; @@v18@@ = decodeInstruction_2 ( DecoderTableThumbSBit16 , @@a2@@ , @@v29@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) { * @@a5@@ = Number ; @@v22@@ = ITStatus_instrInITBlock ( @@a1@@ + Number ) ; v8 = AddThumbPredicate ( @@a1@@ , @@a2@@ ) ; Check ( & @@v18@@ , v8 ) ; AddThumb1SBit ( @@a2@@ , @@v22@@ ) ; return @@v18@@ ; } MCInst_clear ( @@a2@@ ) ; @@v18@@ = decodeInstruction_2 ( DecoderTableThumb216 , @@a2@@ , @@v29@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) { * @@a5@@ = Number ; if ( ( unsigned int ) MCInst_getOpcode ( @@a2@@ ) == Number && ITStatus_instrInITBlock ( @@a1@@ + Number ) ) { result = Number L ; } else { v9 = AddThumbPredicate ( @@a1@@ , @@a2@@ ) ; Check ( & @@v18@@ , v9 ) ; if ( ( unsigned int ) MCInst_getOpcode ( @@a2@@ ) == Number ) { v10 = MCInst_getOperand ( @@a2@@ , Number L ) ; @@v21@@ = MCOperand_getImm ( v10 ) ; v11 = MCInst_getOperand ( @@a2@@ , Number L ) ; @@v20@@ = MCOperand_getImm ( v11 ) ; ITStatus_setITState ( @@a1@@ + Number , @@v21@@ , @@v20@@ ) ; } result = @@v18@@ ; } } else { if ( @@a4@@ <= Number ) return Number L ; @@v19@@ = * ( _DWORD * ) @@a3@@ ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) @@v28@@ = _byteswap_ulong ( @@v19@@ ) ; else @@v28@@ = ( BYTE1 ( @@v19@@ ) << Number ) | HIWORD ( @@v19@@ ) | ( ( unsigned __int8 ) @@v19@@ << Number ) ; MCInst_clear ( @@a2@@ ) ; @@v18@@ = decodeInstruction_4 ( DecoderTableThumb32 , @@a2@@ , @@v28@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) { * @@a5@@ = Number ; @@v22@@ = ITStatus_instrInITBlock ( @@a1@@ + Number ) ; v12 = AddThumbPredicate ( @@a1@@ , @@a2@@ ) ; Check ( & @@v18@@ , v12 ) ; AddThumb1SBit ( @@a2@@ , @@v22@@ ) ; return @@v18@@ ; } MCInst_clear ( @@a2@@ ) ; @@v18@@ = decodeInstruction_4 ( DecoderTableThumb232 , @@a2@@ , @@v28@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) goto LABEL_42 ; MCInst_clear ( @@a2@@ ) ; @@v18@@ = decodeInstruction_4 ( DecoderTableVFP32 , @@a2@@ , @@v28@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ || ( unsigned int ) fieldFromInstruction_4 ( @@v28@@ , Number , Number ) == Number && ( MCInst_clear ( @@a2@@ ) , ( @@v18@@ = decodeInstruction_4 ( DecoderTableVFP32 , @@a2@@ , @@v28@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ) != Number ) ) { * @@a5@@ = Number ; UpdateThumbVFPPredicate ( @@a1@@ , @@a2@@ ) ; return @@v18@@ ; } MCInst_clear ( @@a2@@ ) ; @@v18@@ = decodeInstruction_4 ( DecoderTableVFPV832 , @@a2@@ , @@v28@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) { * @@a5@@ = Number ; return @@v18@@ ; } if ( ( unsigned int ) fieldFromInstruction_4 ( @@v28@@ , Number , Number ) == Number ) { MCInst_clear ( @@a2@@ ) ; @@v18@@ = decodeInstruction_4 ( DecoderTableNEONDup32 , @@a2@@ , @@v28@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) goto LABEL_42 ; } if ( ( unsigned int ) fieldFromInstruction_4 ( @@v28@@ , Number , Number ) == Number && ( MCInst_clear ( @@a2@@ ) , @@v26@@ = @@v28@@ & Number | Number , ( @@v18@@ = decodeInstruction_4 ( DecoderTableNEONLoadStore32 , @@a2@@ , @@v26@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ) != Number ) || ( unsigned int ) fieldFromInstruction_4 ( @@v28@@ , Number , Number ) == Number && ( MCInst_clear ( @@a2@@ ) , @@v25@@ = ( ( @@v28@@ & Number ) >> Number ) & Number | @@v28@@ & Number | Number , ( @@v18@@ = decodeInstruction_4 ( DecoderTableNEONData32 , @@a2@@ , @@v25@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ) != Number ) ) { LABEL_42 : * @@a5@@ = Number ; v13 = AddThumbPredicate ( @@a1@@ , @@a2@@ ) ; Check ( & @@v18@@ , v13 ) ; result = @@v18@@ ; } else { MCInst_clear ( @@a2@@ ) ; @@v24@@ = ( ( @@v28@@ & Number ) >> Number ) & Number | @@v28@@ & Number | Number ; @@v18@@ = decodeInstruction_4 ( DecoderTablev8Crypto32 , @@a2@@ , @@v24@@ , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) { * @@a5@@ = Number ; result = @@v18@@ ; } else { MCInst_clear ( @@a2@@ ) ; @@v23@@ = @@v28@@ & Number ; @@v18@@ = decodeInstruction_4 ( DecoderTablev8NEON32 , @@a2@@ , @@v28@@ & Number , @@a6@@ , Number L , * ( _DWORD * ) ( @@a1@@ + Number ) ) ; if ( @@v18@@ ) { * @@a5@@ = Number ; result = @@v18@@ ; } else { MCInst_clear ( @@a2@@ ) ; * @@a5@@ = Number ; result = Number L ; } } } } return result ; }", "source": [{"n": "a3", "t": {"T": 3, "t": "_WORD"}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 3, "t": "_WORD"}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r80"}, {"n": "i", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s16"}, {"n": "v29", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "s2"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v22", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s33"}, {"n": "v21", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v28", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeSORegImmOperand", "code": "__int64 __fastcall DecodeSORegImmOperand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; int @@v9@@ ; @@v4@@ = Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v2@@ = DecodeGPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , @@v2@@ ) != Number ) return Number L ; @@v9@@ = Number ; if ( @@v7@@ == Number ) { @@v9@@ = Number ; } else if ( @@v7@@ <= Number ) { if ( @@v7@@ == Number ) { @@v9@@ = Number ; } else if ( @@v7@@ ) { @@v9@@ = Number ; } else { @@v9@@ = Number ; } } if ( @@v9@@ == Number && ! @@v6@@ ) @@v9@@ = Number ; @@v5@@ = @@v9@@ | ( Number * @@v6@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v5@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeSORegRegOperand", "code": "__int64 __fastcall DecodeSORegRegOperand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; @@v5@@ = Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; @@v9@@ = Number ; if ( @@v7@@ == Number ) { @@v9@@ = Number ; } else if ( @@v7@@ <= Number ) { if ( @@v7@@ == Number ) { @@v9@@ = Number ; } else if ( @@v7@@ ) { @@v9@@ = Number ; } else { @@v9@@ = Number ; } } MCOperand_CreateImm0 ( @@a1@@ , @@v9@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeSPRRegListOperand", "code": "__int64 __fastcall DecodeSPRRegListOperand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v2 ; int v3 ; unsigned int v4 ; unsigned int v6 ; unsigned int @@v7@@ ; int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@i@@ ; @@v7@@ = Number ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ! @@v8@@ || @@v9@@ + @@v8@@ > Number ) { if ( @@v9@@ + @@v8@@ <= Number ) v2 = @@v8@@ ; else v2 = Number - @@v9@@ ; @@v8@@ = v2 ; if ( v2 ) v3 = @@v8@@ ; else v3 = Number ; @@v8@@ = v3 ; @@v7@@ = Number ; } v4 = DecodeSPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; for ( @@i@@ = Number ; @@i@@ < @@v8@@ - Number ; ++ @@i@@ ) { v6 = DecodeSPRRegisterClass ( @@a1@@ , ++ @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) return Number L ; } return @@v7@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "i", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeDPRRegListOperand", "code": "__int64 __fastcall DecodeDPRRegListOperand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v3 ; int v4 ; unsigned int v5 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@i@@ ; @@v8@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ! @@v9@@ || @@v9@@ > Number || @@v10@@ + @@v9@@ > Number ) { if ( @@v10@@ + @@v9@@ <= Number ) v2 = @@v9@@ ; else v2 = Number - @@v10@@ ; @@v9@@ = v2 ; if ( v2 ) v3 = @@v9@@ ; else v3 = Number ; @@v9@@ = v3 ; v4 = Number ; if ( @@v9@@ <= Number ) v4 = @@v9@@ ; @@v9@@ = v4 ; @@v8@@ = Number ; } v5 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; for ( @@i@@ = Number ; @@i@@ < @@v9@@ - Number ; ++ @@i@@ ) { v7 = DecodeDPRRegisterClass ( @@a1@@ , ++ @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; } return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "i", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeBitfieldMaskOperand", "code": "__int64 __fastcall DecodeBitfieldMaskOperand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; int @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v3@@ = Number ; if ( @@v7@@ > @@v5@@ ) { Check ( & @@v3@@ , Number ) ; @@v7@@ = @@v5@@ ; } @@v6@@ = Number ; if ( @@v5@@ != Number ) @@v6@@ = ( Number << ( @@v5@@ + Number ) ) - Number ; @@v4@@ = ( Number << @@v7@@ ) - Number ; MCOperand_CreateImm0 ( @@a1@@ , ~ ( @@v4@@ ^ @@v6@@ ) ) ; return @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeCopMemInstruction", "code": "__int64 __fastcall DecodeCopMemInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; @@v8@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = MCInst_getOpcode ( @@a1@@ ) ; if ( v2 <= Number ) { if ( v2 < Number ) { if ( v2 > Number ) goto LABEL_12 ; if ( v2 < Number ) { if ( v2 > Number ) { if ( v2 - Number > Number ) goto LABEL_12 ; } else if ( v2 < Number ) { goto LABEL_12 ; } } } if ( @@v11@@ == Number || @@v11@@ == Number ) return Number L ; } LABEL_12 : MCOperand_CreateImm0 ( @@a1@@ , @@v11@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v12@@ ) ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; v5 = MCInst_getOpcode ( @@a1@@ ) ; if ( v5 > Number ) goto LABEL_30 ; if ( v5 < Number ) { if ( v5 <= Number ) { if ( v5 >= Number ) { switch ( v5 ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_28 ; case Number : case Number : case Number : case Number : goto LABEL_29 ; default : goto LABEL_30 ; } } if ( v5 > Number ) { if ( v5 <= Number && v5 >= Number ) { switch ( v5 ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_28 ; case Number : case Number : case Number : case Number : goto LABEL_29 ; default : break ; } } } else if ( v5 >= Number ) { switch ( v5 ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_28 ; case Number : case Number : case Number : case Number : goto LABEL_29 ; default : break ; } } } LABEL_30 : MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; goto LABEL_31 ; } switch ( v5 ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : LABEL_28 : @@v14@@ = ARM_AM_getAM5Opc ( @@v9@@ != Number , @@v14@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; break ; case Number : case Number : case Number : case Number : LABEL_29 : @@v14@@ |= @@v9@@ << Number ; goto LABEL_30 ; default : goto LABEL_30 ; } LABEL_31 : v6 = MCInst_getOpcode ( @@a1@@ ) ; if ( v6 > Number ) { if ( v6 - Number > Number ) return @@v8@@ ; } else if ( v6 < Number ) { return @@v8@@ ; } v7 = DecodePredicateOperand ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeAddrMode2IdxInstruction", "code": "__int64 __fastcall DecodeAddrMode2IdxInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v3 ; __int64 result ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; bool v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int @@v13@@ ; int @@v14@@ ; unsigned int @@v15@@ ; bool @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; int @@v25@@ ; int @@v26@@ ; int @@v27@@ ; @@v13@@ = Number ; @@v24@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v23@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v22@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v20@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v25@@ = Number ; v2 = MCInst_getOpcode ( @@a1@@ ) ; if ( v2 > Number ) { if ( v2 - Number > Number ) goto LABEL_7 ; } else if ( v2 < Number ) { goto LABEL_7 ; } v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v3 ) != Number ) return Number L ; LABEL_7 : v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v23@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v5 ) != Number ) return Number L ; v6 = MCInst_getOpcode ( @@a1@@ ) ; if ( v6 > Number ) { if ( v6 - Number > Number ) goto LABEL_15 ; } else if ( v6 < Number ) { goto LABEL_15 ; } v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v7 ) != Number ) return Number L ; LABEL_15 : v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v8 ) != Number ) return Number L ; @@v27@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) != Number ; v9 = ! @@v18@@ || @@v17@@ == Number ; @@v16@@ = v9 ; if ( @@v18@@ && @@v16@@ ) { @@v25@@ = Number ; } else if ( ! @@v18@@ && @@v16@@ ) { @@v25@@ = Number ; } if ( @@v16@@ && ( @@v24@@ == Number || @@v24@@ == @@v23@@ ) ) @@v13@@ = Number ; if ( @@v19@@ ) { v10 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v22@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v10 ) != Number ) return Number L ; @@v26@@ = Number ; v11 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v11 == Number ) { @@v26@@ = Number ; } else { if ( v11 > Number ) return Number L ; if ( v11 == Number ) { @@v26@@ = Number ; } else if ( v11 ) { @@v26@@ = Number ; } else { @@v26@@ = Number ; } } @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v26@@ == Number && ! @@v14@@ ) @@v26@@ = Number ; @@v21@@ = ARM_AM_getAM2Opc ( @@v27@@ , @@v14@@ , @@v26@@ , @@v25@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v21@@ ) ; } else { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; @@v15@@ = ARM_AM_getAM2Opc ( @@v27@@ , @@v21@@ , Number , @@v25@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v15@@ ) ; } v12 = DecodePredicateOperand ( @@a1@@ , @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v13@@ , v12 ) != Number ) result = Number L ; else result = @@v13@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v25", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v27", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v16", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s45"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s52"}, {"n": "v14", "t": {"T": 1, "n": "int", "s": 4}, "location": "s56"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s60"}, {"n": "v26", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeSORegMemOperand", "code": "__int64 __fastcall DecodeSORegMemOperand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; @@v5@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = Number ; if ( @@v8@@ == Number ) { @@v12@@ = Number ; } else if ( @@v8@@ <= Number ) { if ( @@v8@@ == Number ) { @@v12@@ = Number ; } else if ( @@v8@@ ) { @@v12@@ = Number ; } else { @@v12@@ = Number ; } } if ( @@v12@@ == Number && ! @@v7@@ ) @@v12@@ = Number ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; if ( @@v6@@ ) @@v11@@ = ARM_AM_getAM2Opc ( Number , @@v7@@ , @@v12@@ , Number ) ; else @@v11@@ = ARM_AM_getAM2Opc ( Number , @@v7@@ , @@v12@@ , Number ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v11@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeAddrMode3Instruction", "code": "__int64 __fastcall DecodeAddrMode3Instruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v2 ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; __int64 result ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int @@v15@@ ; bool @@v16@@ ; int @@v17@@ ; int @@v18@@ ; int @@v19@@ ; unsigned int @@v20@@ ; int @@v21@@ ; int @@v22@@ ; unsigned int @@v23@@ ; unsigned int @@v24@@ ; unsigned int @@v25@@ ; unsigned int @@v26@@ ; @@v15@@ = Number ; @@v25@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v24@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v23@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v22@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( fieldFromInstruction_4 ( @@a2@@ , Number , Number ) & Number ) != Number ) v2 = Number ; else v2 = Number ; @@v26@@ = v2 ; @@v20@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v17@@ = @@v25@@ + Number ; @@v16@@ = @@v19@@ == Number || @@v18@@ == Number ; v3 = MCInst_getOpcode ( @@a1@@ ) ; if ( v3 > Number ) { if ( v3 - Number > Number ) goto LABEL_10 ; } else if ( v3 < Number ) { goto LABEL_10 ; } if ( ( @@v25@@ & Number ) != Number ) @@v15@@ = Number ; LABEL_10 : v4 = MCInst_getOpcode ( @@a1@@ ) ; if ( v4 <= Number ) { if ( v4 >= Number || v4 == Number ) { if ( @@v25@@ == Number ) @@v15@@ = Number ; if ( @@v16@@ && ( @@v24@@ == Number || @@v24@@ == @@v25@@ ) ) @@v15@@ = Number ; if ( ! @@v22@@ && @@v23@@ == Number ) @@v15@@ = Number ; } else if ( v4 <= Number ) { if ( v4 > Number ) { if ( v4 - Number <= Number ) { if ( ! @@v18@@ && @@v19@@ == Number ) @@v15@@ = Number ; if ( @@v16@@ && ( @@v24@@ == Number || @@v24@@ == @@v25@@ || @@v24@@ == @@v17@@ ) ) @@v15@@ = Number ; if ( @@v22@@ && @@v23@@ == Number ) @@v15@@ = Number ; if ( @@v17@@ == Number ) @@v15@@ = Number ; if ( ! @@v22@@ && ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } } else if ( v4 >= Number ) { switch ( v4 ) { case Number : case Number : case Number : if ( @@v22@@ && @@v24@@ == Number ) { if ( @@v17@@ == Number ) @@v15@@ = Number ; } else { if ( ! @@v18@@ && @@v19@@ == Number ) @@v15@@ = Number ; if ( ! @@v22@@ && ( @@v17@@ == Number || @@v23@@ == Number || @@v23@@ == @@v25@@ || @@v23@@ == @@v17@@ ) ) @@v15@@ = Number ; if ( ! @@v22@@ && @@v16@@ && @@v24@@ == Number ) @@v15@@ = Number ; if ( @@v16@@ && ( @@v24@@ == @@v25@@ || @@v24@@ == @@v17@@ ) ) @@v15@@ = Number ; } break ; case Number : case Number : case Number : if ( @@v22@@ && @@v24@@ == Number ) { if ( @@v25@@ == Number ) @@v15@@ = Number ; } else { if ( @@v25@@ == Number ) @@v15@@ = Number ; if ( ! @@v22@@ && @@v23@@ == Number ) @@v15@@ = Number ; if ( ! @@v22@@ && @@v16@@ && ( @@v24@@ == Number || @@v24@@ == @@v25@@ ) ) @@v15@@ = Number ; } break ; case Number : case Number : case Number : case Number : case Number : case Number : if ( @@v22@@ && @@v24@@ == Number ) { if ( @@v25@@ == Number ) @@v15@@ = Number ; } else { if ( @@v22@@ && ( @@v25@@ == Number || @@v16@@ && @@v24@@ == @@v25@@ ) ) @@v15@@ = Number ; if ( ! @@v22@@ && ( @@v25@@ == Number || @@v23@@ == Number ) ) @@v15@@ = Number ; if ( ! @@v22@@ && @@v16@@ && ( @@v24@@ == Number || @@v24@@ == @@v25@@ ) ) @@v15@@ = Number ; } break ; default : break ; } } } } if ( @@v16@@ ) { * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; @@v26@@ |= @@v18@@ ? Number : Number ; v5 = MCInst_getOpcode ( @@a1@@ ) - Number ; if ( v5 <= Number && ( ( Number L << v5 ) & Number ) != Number ) { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v6 ) != Number ) return Number L ; } } v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v25@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v8 ) != Number ) return Number L ; v9 = MCInst_getOpcode ( @@a1@@ ) ; if ( v9 > Number ) { if ( v9 - Number > Number ) goto LABEL_112 ; } else if ( v9 < Number ) { goto LABEL_112 ; } v10 = DecodeGPRRegisterClass ( @@a1@@ , @@v25@@ + Number ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v10 ) != Number ) return Number L ; LABEL_112 : if ( @@v16@@ ) { switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v11 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v11 ) == Number ) goto LABEL_116 ; result = Number L ; break ; default : goto LABEL_116 ; } } else { LABEL_116 : v12 = DecodeGPRRegisterClass ( @@a1@@ , @@v24@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v12 ) != Number ) return Number L ; if ( @@v22@@ ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v23@@ | @@v26@@ | ( Number * @@v21@@ ) ) ; } else { v13 = DecodeGPRRegisterClass ( @@a1@@ , @@v23@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v13 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v26@@ ) ; } v14 = DecodePredicateOperand ( @@a1@@ , @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v14 ) != Number ) result = Number L ; else result = @@v15@@ ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v24", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v23", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v22", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v21", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v19", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v26", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v17", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v16", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s41"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s48"}, {"n": "v25", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeRFEInstruction", "code": "__int64 __fastcall DecodeRFEInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; @@v4@@ = Number ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v6@@ == Number ) { @@v6@@ = Number ; } else if ( @@v6@@ <= Number ) { if ( @@v6@@ == Number ) { @@v6@@ = Number ; } else if ( @@v6@@ ) { @@v6@@ = Number ; } else { @@v6@@ = Number ; } } MCOperand_CreateImm0 ( @@a1@@ , @@v6@@ ) ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v5@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , v2 ) != Number ) result = Number L ; else result = @@v4@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeQADDInstruction", "code": "__int64 __fastcall DecodeQADDInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 result ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v11@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number ) return DecodeCPSInstruction ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; v5 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v5 ) != Number ) return Number L ; v6 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v6 ) != Number ) return Number L ; v7 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v7 ) != Number ) return Number L ; v8 = DecodePredicateOperand ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v8 ) != Number ) result = Number L ; else result = @@v11@@ ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeMemMultipleWritebackInstruction", "code": "__int64 __fastcall DecodeMemMultipleWritebackInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; @@v9@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v11@@ == Number ) { v2 = MCInst_getOpcode ( @@a1@@ ) ; if ( v2 <= Number ) { if ( v2 >= Number ) { switch ( v2 ) { case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_27 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_27 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_27 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_27 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_27 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_27 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_27 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_27 ; default : return Number L ; } } return Number L ; } if ( v2 > Number || v2 < Number ) return Number L ; switch ( v2 ) { case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; break ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; break ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; break ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; break ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; break ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; break ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; break ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; break ; default : return Number L ; } LABEL_27 : if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) { result = DecodeRFEInstruction ( @@a1@@ , @@a2@@ ) ; } else if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) == Number && ! ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) { v4 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; MCOperand_CreateImm0 ( @@a1@@ , v4 ) ; result = @@v9@@ ; } else { result = Number L ; } } else { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) { result = Number L ; } else { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) { result = Number L ; } else { v7 = DecodePredicateOperand ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) { result = Number L ; } else { v8 = DecodeRegListOperand ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) result = Number L ; else result = @@v9@@ ; } } } } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeCPSInstruction", "code": "__int64 __fastcall DecodeCPSInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned int @@v4@@ ; int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v4@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v3@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) || ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) || ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) != Number ) { return Number L ; } if ( @@v6@@ == Number ) return Number L ; if ( @@v6@@ && @@v5@@ ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v6@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v4@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v3@@ ) ; } else if ( ! @@v6@@ || @@v5@@ ) { if ( @@v6@@ || ! @@v5@@ ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v3@@ ) ; @@v7@@ = Number ; } else { MCInst_setOpcode ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v3@@ ) ; if ( @@v4@@ ) @@v7@@ = Number ; } } else { MCInst_setOpcode ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v6@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v4@@ ) ; if ( @@v3@@ ) @@v7@@ = Number ; } return @@v7@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2CPSInstruction", "code": "__int64 __fastcall DecodeT2CPSInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int @@v3@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v4@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = Number ; if ( @@v7@@ == Number ) return Number L ; if ( @@v7@@ && @@v6@@ ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v7@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v5@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v4@@ ) ; } else if ( ! @@v7@@ || @@v6@@ ) { if ( @@v7@@ || ! @@v6@@ ) { @@v3@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v3@@ > Number ) return Number L ; MCInst_setOpcode ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v3@@ ) ; } else { MCInst_setOpcode ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v4@@ ) ; if ( @@v5@@ ) @@v8@@ = Number ; } } else { MCInst_setOpcode ( @@a1@@ , Number L ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v7@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v5@@ ) ; if ( @@v4@@ ) @@v8@@ = Number ; } return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2MOVTWInstruction", "code": "__int64 __fastcall DecodeT2MOVTWInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; @@v5@@ = Number ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v6@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v6@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; if ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) == Number ) { v2 = DecoderGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; } v4 = DecoderGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v6@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeArmMOVTWInstruction", "code": "__int64 __fastcall DecodeArmMOVTWInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; @@v6@@ = Number ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; if ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) == Number ) { v2 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v2 ) != Number ) return Number L ; } v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v7@@ ) ; v5 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v5 ) != Number ) result = Number L ; else result = @@v6@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeSMLAInstruction", "code": "__int64 __fastcall DecodeSMLAInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v8@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v9@@ == Number ) return DecodeCPSInstruction ( @@a1@@ , @@a2@@ ) ; v3 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v3 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; v5 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; v6 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; v7 = DecodePredicateOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) result = Number L ; else result = @@v8@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeAddrModeImm12Operand", "code": "__int64 __fastcall DecodeAddrModeImm12Operand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; @@v4@@ = Number ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v2@@ = DecodeGPRRegisterClass ( @@a1@@ , @@v5@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , @@v2@@ ) != Number ) return Number L ; if ( ! @@v6@@ ) @@v7@@ = - @@v7@@ ; if ( ! @@v7@@ && ! @@v6@@ ) @@v7@@ = Number ; MCOperand_CreateImm0 ( @@a1@@ , @@v7@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeAddrMode5Operand", "code": "__int64 __fastcall DecodeAddrMode5Operand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; unsigned int @@v8@@ ; @@v5@@ = Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; if ( @@v7@@ ) v4 = ARM_AM_getAM5Opc ( Number , @@v6@@ ) ; else v4 = ARM_AM_getAM5Opc ( Number , @@v6@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , v4 ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2BInstruction", "code": "__int64 __fastcall DecodeT2BInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int @@v3@@ ; int @@v4@@ ; int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) == @@v8@@ ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v4@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) | ( @@v6@@ << Number ) | ( ( @@v7@@ == @@v8@@ ) << Number ) | ( @@v8@@ << Number ) | ( @@v5@@ << Number ) ; @@v3@@ = SignExtend32 ( Number * @@v4@@ , Number ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v3@@ ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v5", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v4", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "s40"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeBranchImmInstruction", "code": "__int64 __fastcall DecodeBranchImmInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v2 ; int v3 ; __int64 result ; int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; @@v7@@ = Number ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v9@@ == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; v2 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v3 = SignExtend32 ( ( Number * v2 ) | @@v8@@ , Number ) ; MCOperand_CreateImm0 ( @@a1@@ , v3 ) ; result = @@v7@@ ; } else { v5 = SignExtend32 ( @@v8@@ , Number ) ; MCOperand_CreateImm0 ( @@a1@@ , v5 ) ; v6 = DecodePredicateOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeAddrMode6Operand", "code": "__int64 __fastcall DecodeAddrMode6Operand ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; int @@v5@@ ; unsigned int @@v6@@ ; @@v4@@ = Number ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v2@@ = DecodeGPRRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , @@v2@@ ) != Number ) return Number L ; if ( @@v5@@ ) MCOperand_CreateImm0 ( @@a1@@ , Number << @@v5@@ ) ; else MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v5", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLDInstruction", "code": "__int64 __fastcall DecodeVLDInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v3 ; __int64 result ; unsigned int v5 ; char v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; unsigned int v16 ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; @@v17@@ = Number ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v21@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v20@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = MCInst_getOpcode ( @@a1@@ ) ; if ( v2 <= Number ) { if ( v2 >= Number ) goto LABEL_8 ; if ( v2 > Number ) { if ( v2 - Number <= Number ) { v5 = DecodeDPairSpacedRegisterClass ( @@a1@@ , @@v21@@ ) ; v6 = Check ( & @@v17@@ , v5 ) ; if ( v6 != Number ) return Number L ; goto LABEL_14 ; } goto LABEL_12 ; } if ( v2 >= Number ) { LABEL_8 : v3 = DecodeDPairRegisterClass ( @@a1@@ , @@v21@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v3 ) != Number ) return Number L ; goto LABEL_14 ; } } LABEL_12 : v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v21@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v7 ) != Number ) return Number L ; LABEL_14 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v8 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v8 ) == Number ) goto LABEL_19 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v9 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v9 ) == Number ) goto LABEL_19 ; result = Number L ; break ; default : LABEL_19 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v10 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v10 ) == Number ) goto LABEL_24 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v11 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v11 ) == Number ) goto LABEL_24 ; result = Number L ; break ; default : LABEL_24 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : v12 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v12 ) == Number ) goto LABEL_29 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : v13 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v13 ) == Number ) goto LABEL_29 ; result = Number L ; break ; default : LABEL_29 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; goto LABEL_33 ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v14 = DecodeGPRRegisterClass ( @@a1@@ , @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v14 ) == Number ) goto LABEL_33 ; result = Number L ; break ; default : LABEL_33 : v15 = DecodeAddrMode6Operand ( @@a1@@ , @@v19@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v15 ) != Number ) { result = Number L ; } else { switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_38 ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_42 ; default : if ( @@v18@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { LABEL_38 : if ( @@v18@@ != Number && @@v18@@ != Number ) { v16 = DecodeGPRRegisterClass ( @@a1@@ , @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v16 ) != Number ) return Number L ; } } LABEL_42 : result = @@v17@@ ; break ; } } break ; } break ; } break ; } break ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLDST1Instruction", "code": "__int64 __fastcall DecodeVLDST1Instruction ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { int @@v7@@ ; int @@v8@@ ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v8@@ == Number && ( @@v7@@ & Number ) != Number ) return Number L ; if ( @@v8@@ == Number && ( @@v7@@ & Number ) != Number ) return Number L ; if ( @@v8@@ == Number && @@v7@@ == Number ) return Number L ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return DecodeVLDInstruction ( @@a1@@ , @@a2@@ ) ; return DecodeVSTInstruction ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLDST2Instruction", "code": "__int64 __fastcall DecodeVLDST2Instruction ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { int @@v7@@ ; int @@v8@@ ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) == Number ) return Number L ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v8@@ == Number && @@v7@@ == Number ) return Number L ; if ( @@v8@@ == Number && @@v7@@ == Number ) return Number L ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return DecodeVLDInstruction ( @@a1@@ , @@a2@@ ) ; return DecodeVSTInstruction ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLDST3Instruction", "code": "__int64 __fastcall DecodeVLDST3Instruction ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) == Number ) return Number L ; if ( ( fieldFromInstruction_4 ( @@a2@@ , Number , Number ) & Number ) != Number ) return Number L ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return DecodeVLDInstruction ( @@a1@@ , @@a2@@ ) ; return DecodeVSTInstruction ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} {"name": "DecodeVLDST4Instruction", "code": "__int64 __fastcall DecodeVLDST4Instruction ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) == Number ) return Number L ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return DecodeVLDInstruction ( @@a1@@ , @@a2@@ ) ; return DecodeVSTInstruction ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}]} {"name": "DecodeVSTInstruction", "code": "__int64 __fastcall DecodeVSTInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; char v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; unsigned int v16 ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; unsigned int @@v20@@ ; unsigned int @@v21@@ ; @@v17@@ = Number ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v21@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v20@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v19@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : if ( @@v18@@ != Number ) { MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; goto LABEL_7 ; } result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v3 ) == Number ) goto LABEL_7 ; result = Number L ; break ; default : LABEL_7 : v4 = DecodeAddrMode6Operand ( @@a1@@ , @@v19@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v4 ) != Number ) { result = Number L ; } else { switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : goto LABEL_15 ; default : if ( @@v18@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else if ( @@v18@@ != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v5 ) != Number ) return Number L ; } LABEL_15 : v6 = MCInst_getOpcode ( @@a1@@ ) ; if ( v6 > Number ) goto LABEL_26 ; if ( v6 >= Number ) goto LABEL_22 ; if ( v6 > Number ) { if ( v6 - Number <= Number ) { v8 = DecodeDPairSpacedRegisterClass ( @@a1@@ , @@v21@@ ) ; v9 = Check ( & @@v17@@ , v8 ) ; if ( v9 != Number ) return Number L ; goto LABEL_28 ; } } else if ( v6 >= Number ) { LABEL_22 : v7 = DecodeDPairRegisterClass ( @@a1@@ , @@v21@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v7 ) != Number ) return Number L ; goto LABEL_28 ; } LABEL_26 : v10 = DecodeDPRRegisterClass ( @@a1@@ , @@v21@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v10 ) != Number ) return Number L ; LABEL_28 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v11 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v11 ) == Number ) goto LABEL_33 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v12 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v12 ) == Number ) goto LABEL_33 ; result = Number L ; break ; default : LABEL_33 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v13 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v13 ) == Number ) goto LABEL_38 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v14 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v14 ) == Number ) goto LABEL_38 ; result = Number L ; break ; default : LABEL_38 : switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : v15 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v15 ) == Number ) goto LABEL_43 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : v16 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v21@@ + Number ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v17@@ , v16 ) == Number ) goto LABEL_43 ; result = Number L ; break ; default : LABEL_43 : result = @@v17@@ ; break ; } break ; } break ; } break ; } } break ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v20", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD1DupInstruction", "code": "__int64 __fastcall DecodeVLD1DupInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v8@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ! @@v9@@ && @@v10@@ == Number ) return Number L ; @@v10@@ <<= @@v9@@ ; if ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) - Number > Number ) { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; } else { v3 = DecodeDPairRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v3 ) != Number ) return Number L ; } if ( @@v11@@ != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; } v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; if ( @@v11@@ == Number || @@v11@@ == Number || ( v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) , ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) == Number ) ) result = @@v8@@ ; else result = Number L ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD2DupInstruction", "code": "__int64 __fastcall DecodeVLD2DupInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v8@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = Number << fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ *= Number * @@v9@@ ; switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v2 = DecodeDPairRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) == Number ) goto LABEL_8 ; result = Number L ; break ; case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : case Number : v4 = DecodeDPairSpacedRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) == Number ) goto LABEL_8 ; result = Number L ; break ; default : v5 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) { result = Number L ; } else { LABEL_8 : if ( @@v11@@ != Number ) MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) { result = Number L ; } else { MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; if ( @@v11@@ == Number || @@v11@@ == Number || ( v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) , ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) == Number ) ) result = @@v8@@ ; else result = Number L ; } } break ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD3DupInstruction", "code": "__int64 __fastcall DecodeVLD3DupInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v9@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) + Number ; v2 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v2 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v13@@ + ( _BYTE ) @@v10@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v4 ) != Number ) return Number L ; v5 = DecodeDPRRegisterClass ( @@a1@@ , ( Number * ( _BYTE ) @@v10@@ + ( _BYTE ) @@v13@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) return Number L ; if ( @@v11@@ != Number ) { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) return Number L ; } v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , Number L ) ; if ( @@v11@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else if ( @@v11@@ != Number ) { v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) return Number L ; } return @@v9@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD4DupInstruction", "code": "__int64 __fastcall DecodeVLD4DupInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int @@v10@@ ; int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; @@v10@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v15@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) + Number ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number ) { if ( ! @@v16@@ ) return Number L ; @@v16@@ = Number ; } else if ( @@v12@@ == Number ) { @@v16@@ *= Number ; } else { @@v12@@ = Number << @@v12@@ ; @@v16@@ *= Number * @@v12@@ ; } v3 = DecodeDPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v3 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , ( ( _BYTE ) @@v15@@ + ( _BYTE ) @@v11@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v4 ) != Number ) return Number L ; v5 = DecodeDPRRegisterClass ( @@a1@@ , ( Number * ( _BYTE ) @@v11@@ + ( _BYTE ) @@v15@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v5 ) != Number ) return Number L ; v6 = DecodeDPRRegisterClass ( @@a1@@ , ( Number * ( _BYTE ) @@v11@@ + ( _BYTE ) @@v15@@ ) & Number ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v6 ) != Number ) return Number L ; if ( @@v13@@ != Number ) { v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v7 ) != Number ) return Number L ; } v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v8 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v16@@ ) ; if ( @@v13@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else if ( @@v13@@ != Number ) { v9 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v9 ) != Number ) return Number L ; } return @@v10@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeNEONModImmInstruction", "code": "__int64 __fastcall DecodeNEONModImmInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v8@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) { v2 = DecodeQPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) != Number ) return Number L ; } else { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; } MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; v5 = MCInst_getOpcode ( @@a1@@ ) ; if ( v5 > Number ) return @@v8@@ ; if ( v5 >= Number ) goto LABEL_16 ; if ( v5 >= Number ) goto LABEL_14 ; if ( v5 <= Number ) { if ( v5 < Number ) return @@v8@@ ; LABEL_14 : v6 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; return @@v8@@ ; } if ( v5 - Number <= Number ) { LABEL_16 : v7 = DecodeQPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; } return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVSHLMaxInstruction", "code": "__int64 __fastcall DecodeVSHLMaxInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; @@v5@@ = Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeQPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , Number << @@v6@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeTBLInstruction", "code": "__int64 __fastcall DecodeTBLInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; @@v9@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v2 ) != Number ) return Number L ; if ( @@v10@@ ) { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v4 ) != Number ) return Number L ; } v5 = MCInst_getOpcode ( @@a1@@ ) ; if ( v5 == Number || v5 == Number ) { v6 = DecodeDPairRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) return Number L ; } else { v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) return Number L ; } v8 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) result = Number L ; else result = @@v9@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeThumbAddrModeRR", "code": "__int64 __fastcall DecodeThumbAddrModeRR ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; @@v5@@ = Number ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodetGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecodetGPRRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) result = Number L ; else result = @@v5@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeThumbAddrModeIS", "code": "__int64 __fastcall DecodeThumbAddrModeIS ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; @@v4@@ = Number ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v2@@ = DecodetGPRRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , @@v2@@ ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v5@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2AddrModeSOReg", "code": "__int64 __fastcall DecodeT2AddrModeSOReg ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int v5 ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; @@v6@@ = Number ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = MCInst_getOpcode ( @@a1@@ ) - Number ; if ( v2 <= Number && ( ( Number L << v2 ) & Number ) != Number && @@v9@@ == Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v4 ) != Number ) return Number L ; v5 = DecoderGPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v5 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v7@@ ) ; return @@v6@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LoadShift", "code": "__int64 __fastcall DecodeT2LoadShift ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { unsigned int v4 ; __int64 result ; int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; int @@v14@@ ; unsigned int @@v15@@ ; @@v12@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v14@@ == Number ) { v4 = MCInst_getOpcode ( @@a1@@ ) ; if ( v4 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( v4 > Number ) return Number L ; if ( v4 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( v4 > Number ) return Number L ; if ( v4 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( v4 > Number ) return Number L ; if ( v4 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( v4 > Number ) return Number L ; if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( v4 != Number ) return Number L ; MCInst_setOpcode ( @@a1@@ , Number L ) ; } return DecodeT2LoadLabel ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; } return Number L ; } MCInst_setOpcode ( @@a1@@ , Number L ) ; } } } } return DecodeT2LoadLabel ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; } if ( @@v15@@ == Number ) { v6 = MCInst_getOpcode ( @@a1@@ ) ; if ( v6 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else if ( v6 == Number ) { return Number L ; } } v7 = MCInst_getOpcode ( @@a1@@ ) - Number ; if ( v7 > Number || ( ( Number L << v7 ) & Number ) == Number ) { v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v8 ) != Number ) return Number L ; } @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; v9 = DecodeT2AddrModeSOReg ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v9 ) != Number ) result = Number L ; else result = @@v12@@ ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LoadImm8", "code": "__int64 __fastcall DecodeT2LoadImm8 ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { unsigned int v4 ; __int64 result ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; int @@v15@@ ; @@v11@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = ( @@v15@@ << Number ) | ( @@v13@@ << Number ) | fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v15@@ == Number ) { v4 = MCInst_getOpcode ( @@a1@@ ) ; if ( v4 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( v4 > Number ) return Number L ; if ( v4 <= Number ) { if ( v4 >= Number ) { switch ( v4 ) { case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; default : return Number L ; } } return Number L ; } if ( v4 != Number ) return Number L ; MCInst_setOpcode ( @@a1@@ , Number L ) ; } LABEL_17 : result = DecodeT2LoadLabel ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; } else if ( @@v14@@ == Number && ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) == Number ) { result = Number L ; } else { v6 = MCInst_getOpcode ( @@a1@@ ) - Number ; if ( v6 <= Number && ( ( Number L << v6 ) & Number ) != Number || ( v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) , ( unsigned __int8 ) Check ( & @@v11@@ , v7 ) == Number ) ) { v8 = DecodeT2AddrModeImm8 ( @@a1@@ , @@v12@@ , @@a3@@ , @@a4@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v8 ) != Number ) result = Number L ; else result = @@v11@@ ; } else { result = Number L ; } } return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LoadImm12", "code": "__int64 __fastcall DecodeT2LoadImm12 ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { unsigned int v4 ; __int64 result ; int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; int @@v15@@ ; @@v12@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = ( @@v15@@ << Number ) | fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v15@@ == Number ) { v4 = MCInst_getOpcode ( @@a1@@ ) ; if ( v4 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( v4 > Number ) return Number L ; if ( v4 <= Number ) { if ( v4 >= Number ) { switch ( v4 ) { case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_17 ; default : return Number L ; } } return Number L ; } if ( v4 != Number ) return Number L ; MCInst_setOpcode ( @@a1@@ , Number L ) ; } LABEL_17 : result = DecodeT2LoadLabel ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; } else { if ( @@v14@@ == Number ) { v6 = MCInst_getOpcode ( @@a1@@ ) ; if ( v6 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else if ( v6 == Number ) { return Number L ; } } v7 = MCInst_getOpcode ( @@a1@@ ) - Number ; if ( v7 <= Number && ( ( Number L << v7 ) & Number ) != Number || ( v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) , ( unsigned __int8 ) Check ( & @@v12@@ , v8 ) == Number ) ) { v9 = DecodeT2AddrModeImm12 ( @@a1@@ , @@v13@@ , @@a3@@ , @@a4@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v9 ) != Number ) result = Number L ; else result = @@v12@@ ; } else { result = Number L ; } } return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LoadT", "code": "__int64 __fastcall DecodeT2LoadT ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 result ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; @@v9@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = ( @@v12@@ << Number ) | fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number ) { switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_9 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_9 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_9 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_9 ; case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; LABEL_9 : result = DecodeT2LoadLabel ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; break ; default : result = Number L ; break ; } } else { v5 = DecoderGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) { result = Number L ; } else { v6 = DecodeT2AddrModeImm8 ( @@a1@@ , @@v10@@ , @@a3@@ , @@a4@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) result = Number L ; else result = @@v9@@ ; } } return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LoadLabel", "code": "__int64 __fastcall DecodeT2LoadLabel ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; unsigned int v5 ; unsigned int @@v6@@ ; int @@v7@@ ; unsigned int @@v8@@ ; int @@v9@@ ; @@v6@@ = Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v8@@ == Number ) { v2 = MCInst_getOpcode ( @@a1@@ ) ; if ( v2 == Number ) return Number L ; if ( v2 <= Number ) { if ( v2 == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else if ( v2 <= Number && ( v2 == Number || v2 == Number ) ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } } } v4 = MCInst_getOpcode ( @@a1@@ ) ; if ( v4 != Number && v4 != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v5 ) != Number ) return Number L ; } if ( ! @@v7@@ ) { if ( @@v9@@ ) @@v9@@ = - @@v9@@ ; else @@v9@@ = Number ; } MCOperand_CreateImm0 ( @@a1@@ , @@v9@@ ) ; return @@v6@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2AddrModeImm8s4", "code": "__int64 __fastcall DecodeT2AddrModeImm8s4 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; @@v5@@ = Number ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecodeT2Imm8S4 ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) result = Number L ; else result = @@v5@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2AddrModeImm0_1020s4", "code": "__int64 __fastcall DecodeT2AddrModeImm0_1020s4 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; @@v4@@ = Number ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v2@@ = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , @@v2@@ ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v5@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2AddrModeImm8", "code": "__int64 __fastcall DecodeT2AddrModeImm8 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; int @@v9@@ ; @@v7@@ = Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : case Number : case Number : case Number : case Number : if ( @@v8@@ != Number ) goto LABEL_4 ; result = Number L ; break ; default : LABEL_4 : v3 = MCInst_getOpcode ( @@a1@@ ) ; if ( v3 > Number ) { if ( v3 <= Number && v3 >= Number ) { v4 = v3 - Number ; if ( v4 <= Number && ( ( Number L << v4 ) & Number ) != Number ) LABEL_14 : @@v9@@ |= Number ; } } else if ( v3 >= Number ) { switch ( v3 ) { case Number : case Number : case Number : case Number : case Number : goto LABEL_14 ; default : break ; } } v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) { result = Number L ; } else { v6 = DecodeT2Imm8 ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; } break ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LdStPre", "code": "__int64 __fastcall DecodeT2LdStPre ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v7@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ |= ( @@v10@@ << Number ) | ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v10@@ == Number ) { switch ( ( unsigned int ) MCInst_getOpcode ( @@a1@@ ) ) { case Number : case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_11 ; case Number : case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_11 ; case Number : case Number : if ( @@v11@@ == Number ) MCInst_setOpcode ( @@a1@@ , Number L ) ; else MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_11 ; case Number : case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; goto LABEL_11 ; case Number : case Number : MCInst_setOpcode ( @@a1@@ , Number L ) ; LABEL_11 : result = DecodeT2LoadLabel ( @@a1@@ , @@a2@@ ) ; break ; default : result = Number L ; break ; } } else if ( @@v8@@ || ( v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v10@@ ) , ( unsigned __int8 ) Check ( & @@v7@@ , v3 ) == Number ) ) { v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) { result = Number L ; } else if ( @@v8@@ && ( v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v10@@ ) , ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) ^ Number ) ) { result = Number L ; } else { v6 = DecodeT2AddrModeImm8 ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; } } else { result = Number L ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2AddrModeImm12", "code": "__int64 __fastcall DecodeT2AddrModeImm12 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; @@v5@@ = Number ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = MCInst_getOpcode ( @@a1@@ ) - Number ; if ( v2 <= Number && ( ( Number L << v2 ) & Number ) != Number && @@v7@@ == Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v6@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodePostIdxReg", "code": "__int64 __fastcall DecodePostIdxReg ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v2@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; @@v4@@ = Number ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v2@@ = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v4@@ , @@v2@@ ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v5@@ ) ; return @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeThumbTableBranch", "code": "__int64 __fastcall DecodeThumbTableBranch ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; @@v5@@ = Number ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v7@@ == Number ) @@v5@@ = Number ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v2 ) != Number ) return Number L ; v4 = DecoderGPRRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) result = Number L ; else result = @@v5@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeThumb2BCCInstruction", "code": "__int64 __fastcall DecodeThumb2BCCInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 result ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; int @@v12@@ ; unsigned int @@v13@@ ; @@v9@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v13@@ == Number || @@v13@@ == Number ) { @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v11@@ == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( @@v11@@ > Number ) return Number L ; if ( @@v11@@ == Number ) { MCInst_setOpcode ( @@a1@@ , Number L ) ; } else { if ( @@v11@@ != Number ) return Number L ; MCInst_setOpcode ( @@a1@@ , Number L ) ; } } @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; result = DecodeMemBarrierOption ( @@a1@@ , @@v10@@ , @@a3@@ , @@a4@@ ) ; } else { @@v12@@ = Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v12@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v12@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v12@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; v5 = DecodeT2BROperand ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) { result = Number L ; } else { v6 = DecodePredicateOperand ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) result = Number L ; else result = @@v9@@ ; } } return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2SOImm", "code": "__int64 __fastcall DecodeT2SOImm ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int @@v2@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; char @@v6@@ ; int @@v7@@ ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) { @@v2@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; LOBYTE ( @@v2@@ ) = @@v2@@ | Number ; @@v7@@ = @@v2@@ ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; MCOperand_CreateImm0 ( @@a1@@ , ( unsigned int ) __ROR4__ ( @@v7@@ , @@v6@@ ) ) ; } else { @@v5@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v4@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v5@@ == Number ) { MCOperand_CreateImm0 ( @@a1@@ , @@v4@@ | ( @@v4@@ << Number ) | ( @@v4@@ << Number ) | ( @@v4@@ << Number ) ) ; } else if ( @@v5@@ <= Number ) { if ( @@v5@@ == Number ) { MCOperand_CreateImm0 ( @@a1@@ , ( @@v4@@ << Number ) | ( @@v4@@ << Number ) ) ; } else if ( @@v5@@ ) { MCOperand_CreateImm0 ( @@a1@@ , @@v4@@ | ( @@v4@@ << Number ) ) ; } else { MCOperand_CreateImm0 ( @@a1@@ , @@v4@@ ) ; } } } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "v6", "t": {"T": 1, "n": "char", "s": 1}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeDoubleRegLoad", "code": "__int64 __fastcall DecodeDoubleRegLoad ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; @@v6@@ = Number ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v8@@ == Number ) @@v6@@ = Number ; v2 = DecodeGPRPairRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v4 ) != Number ) return Number L ; v5 = DecodePredicateOperand ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v6@@ , v5 ) != Number ) result = Number L ; else result = @@v6@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeDoubleRegStore", "code": "__int64 __fastcall DecodeDoubleRegStore ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v7@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v2 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; if ( @@v9@@ == Number || @@v11@@ == @@v9@@ || @@v11@@ == @@v10@@ || @@v11@@ == @@v10@@ + Number ) @@v7@@ = Number ; v4 = DecodeGPRPairRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeLDRPreImm", "code": "__int64 __fastcall DecodeLDRPreImm ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v7@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v9@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v11@@ == Number || @@v11@@ == @@v10@@ ) @@v7@@ = Number ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecodeAddrModeImm12Operand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeLDRPreReg", "code": "__int64 __fastcall DecodeLDRPreReg ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; @@v7@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v10@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number || @@v12@@ == @@v11@@ ) @@v7@@ = Number ; if ( @@v8@@ == Number ) @@v7@@ = Number ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecodeSORegMemOperand ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodePredicateOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeSTRPreImm", "code": "__int64 __fastcall DecodeSTRPreImm ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v7@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v9@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v11@@ == Number || @@v11@@ == @@v10@@ ) @@v7@@ = Number ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecodeAddrModeImm12Operand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeSTRPreReg", "code": "__int64 __fastcall DecodeSTRPreReg ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v7@@ = Number ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v9@@ |= ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v11@@ == Number || @@v11@@ == @@v10@@ ) @@v7@@ = Number ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecodeSORegMemOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD1LN", "code": "__int64 __fastcall DecodeVLD1LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v9@@ = Number ; @@v15@@ = Number ; @@v14@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v10@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v3 ) { if ( v3 != Number ) return Number L ; @@v15@@ = Number ; } else { @@v15@@ = Number ; } } else { if ( @@v10@@ > Number ) return Number L ; if ( @@v10@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v4 ) != Number ) return Number L ; if ( @@v12@@ != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) return Number L ; } v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v15@@ ) ; if ( @@v12@@ != Number ) { if ( @@v12@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) return Number L ; } } v8 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; return @@v9@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVST1LN", "code": "__int64 __fastcall DecodeVST1LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; @@v8@@ = Number ; @@v14@@ = Number ; @@v13@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v9@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v3 ) { if ( v3 != Number ) return Number L ; @@v14@@ = Number ; } else { @@v14@@ = Number ; } } else { if ( @@v9@@ > Number ) return Number L ; if ( @@v9@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v14@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } if ( @@v11@@ != Number ) { v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; } v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; if ( @@v11@@ != Number ) { if ( @@v11@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; } } v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v13@@ ) ; return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD2LN", "code": "__int64 __fastcall DecodeVLD2LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; @@v10@@ = Number ; @@v17@@ = Number ; @@v16@@ = Number ; @@v15@@ = Number ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v11@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v17@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { if ( @@v11@@ > Number ) return Number L ; if ( @@v11@@ ) { @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v17@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v17@@ = Number ; } } v3 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v3 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ + @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v4 ) != Number ) return Number L ; if ( @@v13@@ != Number ) { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v5 ) != Number ) return Number L ; } v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v6 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v17@@ ) ; if ( @@v13@@ != Number ) { if ( @@v13@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v7 ) != Number ) return Number L ; } } v8 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v8 ) != Number ) return Number L ; v9 = DecodeDPRRegisterClass ( @@a1@@ , @@v12@@ + @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v10@@ , v9 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v16@@ ) ; return @@v10@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVST2LN", "code": "__int64 __fastcall DecodeVST2LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v8@@ = Number ; @@v15@@ = Number ; @@v14@@ = Number ; @@v13@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v9@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v13@@ = Number ; } else { if ( @@v9@@ > Number ) return Number L ; if ( @@v9@@ ) { @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v13@@ = Number ; } else { @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } } if ( @@v11@@ != Number ) { v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v3 ) != Number ) return Number L ; } v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v15@@ ) ; if ( @@v11@@ != Number ) { if ( @@v11@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; } } v6 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ + @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; return @@v8@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD3LN", "code": "__int64 __fastcall DecodeVLD3LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; int @@v18@@ ; unsigned int @@v19@@ ; @@v12@@ = Number ; @@v17@@ = Number ; @@v19@@ = Number ; @@v18@@ = Number ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v13@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v18@@ = Number ; } else { if ( @@v13@@ > Number ) return Number L ; if ( @@v13@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v18@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } v3 = DecodeDPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v3 ) != Number ) return Number L ; v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v14@@ + @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v4 ) != Number ) return Number L ; v5 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v18@@ + @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v5 ) != Number ) return Number L ; if ( @@v15@@ != Number ) { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v16@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v6 ) != Number ) return Number L ; } v7 = DecodeGPRRegisterClass ( @@a1@@ , @@v16@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v7 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v17@@ ) ; if ( @@v15@@ != Number ) { if ( @@v15@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v8 ) != Number ) return Number L ; } } v9 = DecodeDPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v9 ) != Number ) return Number L ; v10 = DecodeDPRRegisterClass ( @@a1@@ , @@v14@@ + @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v10 ) != Number ) return Number L ; v11 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v18@@ + @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v12@@ , v11 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v19@@ ) ; return @@v12@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v18", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeVST3LN", "code": "__int64 __fastcall DecodeVST3LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; int @@v15@@ ; unsigned int @@v16@@ ; @@v9@@ = Number ; @@v14@@ = Number ; @@v16@@ = Number ; @@v15@@ = Number ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v10@@ == Number ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { if ( @@v10@@ > Number ) return Number L ; if ( @@v10@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v15@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } if ( @@v12@@ != Number ) { v3 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v3 ) != Number ) return Number L ; } v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v14@@ ) ; if ( @@v12@@ != Number ) { if ( @@v12@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v5 ) != Number ) return Number L ; } } v6 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v6 ) != Number ) return Number L ; v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v11@@ + @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v7 ) != Number ) return Number L ; v8 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v15@@ + @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v9@@ , v8 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v16@@ ) ; return @@v9@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v15", "t": {"T": 1, "n": "int", "s": 4}, "location": "s8"}]} {"name": "DecodeVLD4LN", "code": "__int64 __fastcall DecodeVLD4LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int @@v15@@ ; unsigned int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; unsigned int @@v19@@ ; int @@v20@@ ; unsigned int @@v21@@ ; unsigned int @@v22@@ ; @@v15@@ = Number ; @@v22@@ = Number ; @@v21@@ = Number ; @@v20@@ = Number ; @@v19@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v18@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v17@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v16@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v16@@ == Number ) { v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v3 ) { if ( v3 == Number ) return Number L ; @@v22@@ = Number << fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } else { @@v22@@ = Number ; } @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v20@@ = Number ; } else { if ( @@v16@@ > Number ) return Number L ; if ( @@v16@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v22@@ = Number ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v20@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v22@@ = Number ; @@v21@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v4 ) != Number ) return Number L ; v5 = DecodeDPRRegisterClass ( @@a1@@ , @@v17@@ + @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v5 ) != Number ) return Number L ; v6 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v20@@ + @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v6 ) != Number ) return Number L ; v7 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v20@@ + @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v7 ) != Number ) return Number L ; if ( @@v18@@ != Number ) { v8 = DecodeGPRRegisterClass ( @@a1@@ , @@v19@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v8 ) != Number ) return Number L ; } v9 = DecodeGPRRegisterClass ( @@a1@@ , @@v19@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v9 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v22@@ ) ; if ( @@v18@@ != Number ) { if ( @@v18@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v10 = DecodeGPRRegisterClass ( @@a1@@ , @@v18@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v10 ) != Number ) return Number L ; } } v11 = DecodeDPRRegisterClass ( @@a1@@ , @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v11 ) != Number ) return Number L ; v12 = DecodeDPRRegisterClass ( @@a1@@ , @@v17@@ + @@v20@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v12 ) != Number ) return Number L ; v13 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v20@@ + @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v13 ) != Number ) return Number L ; v14 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v20@@ + @@v17@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v15@@ , v14 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v21@@ ) ; return @@v15@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v20", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v19", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v16", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v22", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v21", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVST4LN", "code": "__int64 __fastcall DecodeVST4LN ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; int @@v16@@ ; unsigned int @@v17@@ ; unsigned int @@v18@@ ; @@v11@@ = Number ; @@v18@@ = Number ; @@v17@@ = Number ; @@v16@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number ) { v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( v3 ) { if ( v3 == Number ) return Number L ; @@v18@@ = Number << fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } else { @@v18@@ = Number ; } @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v16@@ = Number ; } else { if ( @@v12@@ > Number ) return Number L ; if ( @@v12@@ ) { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v18@@ = Number ; @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v16@@ = Number ; } else { if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) @@v18@@ = Number ; @@v17@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; } } if ( @@v14@@ != Number ) { v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v4 ) != Number ) return Number L ; } v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v5 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v18@@ ) ; if ( @@v14@@ != Number ) { if ( @@v14@@ == Number ) { MCOperand_CreateReg0 ( @@a1@@ , Number L ) ; } else { v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v6 ) != Number ) return Number L ; } } v7 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v7 ) != Number ) return Number L ; v8 = DecodeDPRRegisterClass ( @@a1@@ , @@v13@@ + @@v16@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v8 ) != Number ) return Number L ; v9 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v16@@ + @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v9 ) != Number ) return Number L ; v10 = DecodeDPRRegisterClass ( @@a1@@ , Number * @@v16@@ + @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v11@@ , v10 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v17@@ ) ; return @@v11@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v16", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s32"}, {"n": "v18", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v17", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVMOVSRR", "code": "__int64 __fastcall DecodeVMOVSRR ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; @@v8@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number || @@v11@@ == Number || @@v10@@ == Number ) @@v8@@ = Number ; v2 = DecodeSPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) != Number ) return Number L ; v4 = DecodeSPRRegisterClass ( @@a1@@ , @@v10@@ + Number ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; v5 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; v6 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; v7 = DecodePredicateOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) result = Number L ; else result = @@v8@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVMOVRRS", "code": "__int64 __fastcall DecodeVMOVRRS ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; @@v8@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v12@@ == Number || @@v11@@ == Number || @@v10@@ == Number ) @@v8@@ = Number ; v2 = DecodeGPRRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; v5 = DecodeSPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; v6 = DecodeSPRRegisterClass ( @@a1@@ , @@v10@@ + Number ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; v7 = DecodePredicateOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) result = Number L ; else result = @@v8@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeIT", "code": "__int64 __fastcall DecodeIT ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int @@v3@@ ; unsigned int @@v4@@ ; unsigned int @@v5@@ ; @@v5@@ = Number ; @@v4@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v3@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v4@@ == Number ) { @@v4@@ = Number ; @@v5@@ = Number ; } if ( ! @@v3@@ ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v4@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v3@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2LDRDPreInstruction", "code": "__int64 __fastcall DecodeT2LDRDPreInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; bool @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v7@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = @@v11@@ == Number || @@v9@@ == Number ; @@v12@@ |= ( @@v10@@ << Number ) | ( @@v13@@ << Number ) ; if ( @@v8@@ && ( @@v13@@ == @@v15@@ || @@v13@@ == @@v14@@ ) ) Check ( & @@v7@@ , Number ) ; if ( @@v15@@ == @@v14@@ ) Check ( & @@v7@@ , Number ) ; v2 = DecoderGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; v4 = DecoderGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecoderGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodeT2AddrModeImm8s4 ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v8", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s29"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2STRDPreInstruction", "code": "__int64 __fastcall DecodeT2STRDPreInstruction ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; bool @@v8@@ ; int @@v9@@ ; int @@v10@@ ; int @@v11@@ ; unsigned int @@v12@@ ; unsigned int @@v13@@ ; unsigned int @@v14@@ ; unsigned int @@v15@@ ; @@v7@@ = Number ; @@v15@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v14@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v13@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = @@v11@@ == Number || @@v9@@ == Number ; @@v12@@ |= ( @@v10@@ << Number ) | ( @@v13@@ << Number ) ; if ( @@v8@@ && ( @@v13@@ == @@v15@@ || @@v13@@ == @@v14@@ ) ) Check ( & @@v7@@ , Number ) ; v2 = DecoderGPRRegisterClass ( @@a1@@ , @@v13@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v2 ) != Number ) return Number L ; v4 = DecoderGPRRegisterClass ( @@a1@@ , @@v15@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecoderGPRRegisterClass ( @@a1@@ , @@v14@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodeT2AddrModeImm8s4 ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v8", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s29"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v15", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v14", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeT2Adr", "code": "__int64 __fastcall DecodeT2Adr ( __int64 @@a1@@ , unsigned int @@a2@@ ) { int v3 ; int v4 ; int v5 ; unsigned int v6 ; int @@v7@@ ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v7@@ != ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ) return Number L ; v5 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v6 = ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) << Number ) | v5 ; v3 = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; v4 = SignExtend32 ( ( @@v7@@ << Number ) | ( v3 << Number ) | v6 , Number ) ; MCOperand_CreateImm0 ( @@a1@@ , v4 ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s4"}]} {"name": "DecodeSwap", "code": "__int64 __fastcall DecodeSwap ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( @@v8@@ == Number ) return DecodeCPSInstruction ( @@a1@@ , @@a2@@ ) ; @@v7@@ = Number ; if ( @@v11@@ == @@v9@@ || @@v9@@ == @@v10@@ ) @@v7@@ = Number ; v3 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v3 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v4 ) != Number ) return Number L ; v5 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v5 ) != Number ) return Number L ; v6 = DecodePredicateOperand ( @@a1@@ , @@v8@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v7@@ , v6 ) != Number ) result = Number L ; else result = @@v7@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVCVTD", "code": "__int64 __fastcall DecodeVCVTD ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; @@v5@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( @@v8@@ & Number ) != Number || @@v7@@ != Number ) { if ( ( @@v8@@ & Number ) != Number ) { v3 = DecodeDPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v3 ) != Number ) { result = Number L ; } else { v4 = DecodeDPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) { result = Number L ; } else { MCOperand_CreateImm0 ( @@a1@@ , ( unsigned int ) ( Number - @@v8@@ ) ) ; result = @@v5@@ ; } } } else { result = Number L ; } } else if ( @@v6@@ == Number ) { result = Number L ; } else { MCInst_setOpcode ( @@a1@@ , Number L ) ; result = DecodeNEONModImmInstruction ( @@a1@@ , @@a2@@ ) ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeVCVTQ", "code": "__int64 __fastcall DecodeVCVTQ ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 result ; unsigned int v3 ; unsigned int v4 ; unsigned int @@v5@@ ; int @@v6@@ ; int @@v7@@ ; int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; @@v5@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( @@v8@@ & Number ) != Number || @@v7@@ != Number ) { if ( ( @@v8@@ & Number ) != Number ) { v3 = DecodeQPRRegisterClass ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v3 ) != Number ) { result = Number L ; } else { v4 = DecodeQPRRegisterClass ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) { result = Number L ; } else { MCOperand_CreateImm0 ( @@a1@@ , ( unsigned int ) ( Number - @@v8@@ ) ) ; result = @@v5@@ ; } } } else { result = Number L ; } } else if ( @@v6@@ == Number ) { result = Number L ; } else { MCInst_setOpcode ( @@a1@@ , Number L ) ; result = DecodeNEONModImmInstruction ( @@a1@@ , @@a2@@ ) ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeLDR", "code": "__int64 __fastcall DecodeLDR ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; __int64 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; @@v8@@ = Number ; @@v12@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v11@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v10@@ |= Number * fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( unsigned int ) fieldFromInstruction_4 ( @@a2@@ , Number , Number ) || @@v12@@ == @@v11@@ ) @@v8@@ = Number ; v2 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v11@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v2 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v4 ) != Number ) return Number L ; v5 = DecodeAddrMode7Operand ( @@a1@@ , @@v12@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v5 ) != Number ) return Number L ; v6 = DecodePostIdxReg ( @@a1@@ , @@v10@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v6 ) != Number ) return Number L ; v7 = DecodePredicateOperand ( @@a1@@ , @@v9@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v8@@ , v7 ) != Number ) result = Number L ; else result = @@v8@@ ; return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]} {"name": "DecodeMRRC2", "code": "__int64 __fastcall DecodeMRRC2 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v3 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; @@v5@@ = Number ; @@v10@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v9@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v8@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v7@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; @@v6@@ = fieldFromInstruction_4 ( @@a2@@ , Number , Number ) ; if ( ( @@v8@@ & Number ) == Number ) return Number L ; if ( @@v7@@ == @@v6@@ ) @@v5@@ = Number ; MCOperand_CreateImm0 ( @@a1@@ , @@v8@@ ) ; MCOperand_CreateImm0 ( @@a1@@ , @@v9@@ ) ; v3 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v7@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v3 ) != Number ) return Number L ; v4 = DecodeGPRnopcRegisterClass ( @@a1@@ , @@v6@@ ) ; if ( ( unsigned __int8 ) Check ( & @@v5@@ , v4 ) != Number ) return Number L ; MCOperand_CreateImm0 ( @@a1@@ , @@v10@@ ) ; return @@v5@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s4"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s8"}]}