{"name": "disas_dsp_insn", "code": "__int64 __fastcall disas_dsp_insn ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { __int64 result ; unsigned int v4 ; int @@v6@@ ; int @@v7@@ ; int v8 ; int v9 ; int @@v10@@ ; unsigned int @@v11@@ ; unsigned int @@v12@@ ; if ( ( @@a3@@ & Number ) == Number ) { @@v10@@ = @@a3@@ & Number ; v8 = ( unsigned __int8 ) @@a3@@ >> Number ; if ( ( unsigned __int8 ) @@a3@@ >> Number ) return Number L ; @@v11@@ = load_reg ( @@a2@@ , ( unsigned __int16 ) @@a3@@ >> Number ) ; @@v12@@ = load_reg ( @@a2@@ , @@v10@@ ) ; v4 = HIWORD ( @@a3@@ ) & Number ; if ( v4 >= Number ) { if ( ( @@a3@@ & Number ) != Number ) tcg_gen_shri_i32 ( @@v11@@ , @@v11@@ , Number ) ; if ( ( @@a3@@ & Number ) != Number ) tcg_gen_shri_i32 ( @@v12@@ , @@v12@@ , Number ) ; gen_helper_iwmmxt_muladdswl ( cpu_M0 , cpu_M0 , @@v11@@ , @@v12@@ ) ; } else if ( v4 ) { if ( v4 != Number ) return Number L ; gen_helper_iwmmxt_muladdsw ( cpu_M0 , cpu_M0 , @@v11@@ , @@v12@@ ) ; } else { gen_helper_iwmmxt_muladdsl ( cpu_M0 , cpu_M0 , @@v11@@ , @@v12@@ ) ; } tcg_temp_free_i32 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; gen_op_iwmmxt_movq_wRn_M0 ( v8 ) ; result = Number L ; } else if ( ( @@a3@@ & Number ) == Number ) { @@v6@@ = HIWORD ( @@a3@@ ) & Number ; @@v7@@ = ( unsigned __int16 ) @@a3@@ >> Number ; v9 = @@a3@@ & Number ; if ( ( @@a3@@ & Number ) != Number ) { result = Number L ; } else { if ( ( @@a3@@ & Number ) != Number ) { iwmmxt_load_reg ( cpu_V0 , v9 ) ; tcg_gen_trunc_i64_i32 ( cpu_R [ @@v7@@ ] , cpu_V0 ) ; tcg_gen_shri_i64 ( cpu_V0 , cpu_V0 , Number L ) ; tcg_gen_trunc_i64_i32 ( cpu_R [ @@v6@@ ] , cpu_V0 ) ; tcg_gen_andi_i32 ( cpu_R [ @@v6@@ ] , cpu_R [ @@v6@@ ] , Number ) ; } else { tcg_gen_concat_i32_i64 ( cpu_V0 , cpu_R [ ( unsigned __int16 ) @@a3@@ >> Number ] , cpu_R [ @@v6@@ ] ) ; iwmmxt_store_reg ( cpu_V0 , v9 ) ; } result = Number L ; } } else { result = Number L ; } return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v12", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}]}
{"name": "tcg_gen_andi_i32", "code": "unsigned __int64 __fastcall tcg_gen_andi_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { if ( @@a3@@ == Number ) { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } else { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_and_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } } else { tcg_gen_movi_i32 ( @@a1@@ , Number ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "tcg_gen_shri_i32", "code": "unsigned __int64 __fastcall tcg_gen_shri_i32 ( int @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i32 ( @@a3@@ ) ; tcg_gen_shr_i32 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } else { tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "tcg_gen_shri_i64", "code": "unsigned __int64 __fastcall tcg_gen_shri_i64 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned int @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a3@@ ) { @@v4@@ = tcg_const_i64 ( @@a3@@ ) ; tcg_gen_shr_i64 ( @@a1@@ , @@a2@@ , @@v4@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } else { tcg_gen_mov_i64 ( @@a1@@ , @@a2@@ ) ; } return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "tcg_gen_trunc_i64_i32", "code": "unsigned __int64 __fastcall tcg_gen_trunc_i64_i32 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_mov_i32 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "tcg_gen_concat_i32_i64", "code": "unsigned __int64 __fastcall tcg_gen_concat_i32_i64 ( int @@a1@@ , int @@a2@@ , int @@a3@@ ) { unsigned int @@v5@@ ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v5@@ , @@a3@@ ) ; tcg_gen_shli_i64 ( @@v5@@ , @@v5@@ , Number L ) ; tcg_gen_extu_i32_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_or_i64 ( @@a1@@ , @@a1@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_helper_iwmmxt_muladdsl", "code": "unsigned __int64 __fastcall gen_helper_iwmmxt_muladdsl ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_iwmmxt_muladdsl , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_helper_iwmmxt_muladdsw", "code": "unsigned __int64 __fastcall gen_helper_iwmmxt_muladdsw ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_iwmmxt_muladdsw , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_helper_iwmmxt_muladdswl", "code": "unsigned __int64 __fastcall gen_helper_iwmmxt_muladdswl ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = @@a2@@ ; @@v5@@ [ Number ] = @@a3@@ ; @@v5@@ [ Number ] = @@a4@@ ; tcg_gen_helperN ( ( __int64 ) & helper_iwmmxt_muladdswl , Number , Number , @@a1@@ , Number , ( __int64 ) @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "load_reg", "code": "__int64 __fastcall load_reg ( _DWORD * @@a1@@ , int @@a2@@ ) { unsigned int @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_DWORD"}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}]} {"name": "store_reg", "code": "unsigned __int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; if ( @@a2@@ == Number ) { tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; tcg_temp_free_i32 ( @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "iwmmxt_load_reg", "code": "unsigned __int64 __fastcall iwmmxt_load_reg ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ld_i64 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "iwmmxt_store_reg", "code": "unsigned __int64 __fastcall iwmmxt_store_reg ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_st_i64 ( @@a1@@ , cpu_env , Number * ( @@a2@@ + Number L ) ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_iwmmxt_movq_wRn_M0", "code": "unsigned __int64 __fastcall gen_op_iwmmxt_movq_wRn_M0 ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; iwmmxt_store_reg ( cpu_M0 , @@a1@@ ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "disas_coproc_insn", "code": "__int64 __fastcall disas_coproc_insn ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { __int64 @@result@@ ; int @@v5@@ ; @@v5@@ = ( @@a3@@ >> Number ) & Number ; if ( arm_feature ( @@a1@@ , Number ) && ( ( * ( _DWORD * ) ( @@a1@@ + Number ) ^ Number ) & ( Number << @@v5@@ ) ) != Number ) return Number L ; if ( @@v5@@ == Number ) return disas_cp15_insn ( @@a1@@ , @@a2@@ , @@a3@@ ) ; if ( @@v5@@ == Number ) { if ( arm_feature ( @@a1@@ , Number ) ) return disas_cp_insn ( @@a1@@ , @@a2@@ , @@a3@@ ) ; if ( ( @@a3@@ & Number ) != Number ) @@result@@ = disas_cp14_read ( @@a1@@ , ( __int64 ) @@a2@@ , @@a3@@ ) ; else @@result@@ = disas_cp14_write ( @@a1@@ , @@a2@@ , @@a3@@ ) ; } else { if ( @@v5@@ > Number ) { if ( ( unsigned int ) ( @@v5@@ - Number ) <= Number ) return disas_vfp_insn ( @@a1@@ , @@a2@@ , @@a3@@ ) ; return disas_cp_insn ( @@a1@@ , @@a2@@ , @@a3@@ ) ; } if ( arm_feature ( @@a1@@ , Number ) ) { @@result@@ = disas_iwmmxt_insn ( @@a1@@ , @@a2@@ , @@a3@@ ) ; } else if ( arm_feature ( @@a1@@ , Number ) ) { @@result@@ = disas_dsp_insn ( @@a1@@ , @@a2@@ , @@a3@@ ) ; } else { @@result@@ = Number L ; } } return @@result@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "result", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}, {"n": "v5", "t": {"T": 1, "n": "int", "s": 4}, "location": "s12"}]}