{"name": "tcg_gen_ld_i32", "code": "unsigned __int64 __fastcall tcg_gen_ld_i32 ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
{"name": "tcg_gen_ldst_op_i32", "code": "unsigned __int64 __fastcall tcg_gen_ldst_op_i32 ( __int16 @@a1@@ , int @@a2@@ , int @@a3@@ , __int64 @@a4@@ ) { _WORD * v4 ; _QWORD * v5 ; _QWORD * v6 ; _QWORD * v7 ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; v4 = ( _WORD * ) gen_opc_ptr ; gen_opc_ptr += Number L ; * v4 = @@a1@@ ; v5 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v5 = @@a2@@ ; v6 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v6 = @@a3@@ ; v7 = ( _QWORD * ) gen_opparam_ptr ; gen_opparam_ptr += Number L ; * v7 = @@a4@@ ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int16", "s": 2}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_icount_start", "code": "unsigned __int64 gen_icount_start ( ) { unsigned int @@v1@@ ; unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; if ( use_icount ) { icount_label = gen_new_label ( ) ; @@v1@@ = tcg_temp_local_new_i32 ( ) ; tcg_gen_ld_i32 ( @@v1@@ , cpu_env , Number L ) ; icount_arg = gen_opparam_ptr + Number L ; tcg_gen_subi_i32 ( @@v1@@ , @@v1@@ , Number ) ; tcg_gen_brcondi_i32 ( Number , @@v1@@ , Number , icount_label ) ; tcg_gen_st16_i32 ( @@v1@@ , cpu_env , Number L ) ; tcg_temp_free_i32 ( @@v1@@ ) ; } return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "v1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_store_DT0_fpr", "code": "unsigned __int64 __fastcall gen_op_store_DT0_fpr ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( cpu_fpr [ @@a1@@ ] , cpu_env , Number L ) ; tcg_gen_ld_i32 ( cpu_fpr [ @@a1@@ + Number ] , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_store_QT0_fpr", "code": "unsigned __int64 __fastcall gen_op_store_QT0_fpr ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_ld_i32 ( cpu_fpr [ @@a1@@ ] , cpu_env , Number L ) ; tcg_gen_ld_i32 ( cpu_fpr [ @@a1@@ + Number ] , cpu_env , Number L ) ; tcg_gen_ld_i32 ( cpu_fpr [ @@a1@@ + Number ] , cpu_env , Number L ) ; tcg_gen_ld_i32 ( cpu_fpr [ @@a1@@ + Number ] , cpu_env , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}