{"name": "tcg_gen_extu_i32_i64", "code": "unsigned __int64 __fastcall tcg_gen_extu_i32_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_ext32u_i64 ( @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
{"name": "tcg_gen_ext32u_i64", "code": "unsigned __int64 __fastcall tcg_gen_ext32u_i64 ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_mov_reg_N", "code": "unsigned __int64 __fastcall gen_mov_reg_N ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_extu_i32_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_shri_i64 ( @@a1@@ , @@a1@@ , Number L ) ; tcg_gen_andi_i64 ( @@a1@@ , @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_mov_reg_Z", "code": "unsigned __int64 __fastcall gen_mov_reg_Z ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_extu_i32_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_shri_i64 ( @@a1@@ , @@a1@@ , Number L ) ; tcg_gen_andi_i64 ( @@a1@@ , @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_mov_reg_V", "code": "unsigned __int64 __fastcall gen_mov_reg_V ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_extu_i32_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_shri_i64 ( @@a1@@ , @@a1@@ , Number L ) ; tcg_gen_andi_i64 ( @@a1@@ , @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_mov_reg_C", "code": "unsigned __int64 __fastcall gen_mov_reg_C ( int @@a1@@ , int @@a2@@ ) { unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; tcg_gen_extu_i32_i64 ( @@a1@@ , @@a2@@ ) ; tcg_gen_shri_i64 ( @@a1@@ , @@a1@@ , Number L ) ; tcg_gen_andi_i64 ( @@a1@@ , @@a1@@ , Number L ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_addx_int", "code": "unsigned __int64 __fastcall gen_op_addx_int ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; switch ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { case Number : case Number : if ( @@a5@@ ) gen_op_add_cc ( @@a2@@ , @@a3@@ , @@a4@@ ) ; else tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : case Number : @@v9@@ = gen_add32_carry32 ( ) ; goto LABEL_8 ; case Number : case Number : case Number : @@v9@@ = gen_sub32_carry32 ( ) ; goto LABEL_8 ; default : @@v9@@ = tcg_temp_new_i32 ( ) ; gen_helper_compute_C_icc ( @@v9@@ ) ; LABEL_8 : @@v10@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v10@@ , @@v9@@ ) ; tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; tcg_gen_add_i64 ( @@a2@@ , @@a2@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; if ( @@a5@@ ) { tcg_gen_mov_i64 ( cpu_cc_src , @@a3@@ ) ; tcg_gen_mov_i64 ( cpu_cc_src2 , @@a4@@ ) ; tcg_gen_mov_i64 ( cpu_cc_dst , @@a2@@ ) ; tcg_gen_movi_i32 ( cpu_cc_op , Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_subx_int", "code": "unsigned __int64 __fastcall gen_op_subx_int ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; switch ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { case Number : case Number : if ( @@a5@@ ) gen_op_sub_cc ( @@a2@@ , @@a3@@ , @@a4@@ ) ; else tcg_gen_sub_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : case Number : @@v9@@ = gen_add32_carry32 ( ) ; goto LABEL_8 ; case Number : case Number : case Number : @@v9@@ = gen_sub32_carry32 ( ) ; goto LABEL_8 ; default : @@v9@@ = tcg_temp_new_i32 ( ) ; gen_helper_compute_C_icc ( @@v9@@ ) ; LABEL_8 : @@v10@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v10@@ , @@v9@@ ) ; tcg_gen_sub_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; tcg_gen_sub_i64 ( @@a2@@ , @@a2@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; if ( @@a5@@ ) { tcg_gen_mov_i64 ( cpu_cc_src , @@a3@@ ) ; tcg_gen_mov_i64 ( cpu_cc_src2 , @@a4@@ ) ; tcg_gen_mov_i64 ( cpu_cc_dst , @@a2@@ ) ; tcg_gen_movi_i32 ( cpu_cc_op , Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_multiply", "code": "unsigned __int64 __fastcall gen_op_multiply ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { unsigned int @@v7@@ ; unsigned int @@v8@@ ; unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; @@v7@@ = tcg_temp_new_i32 ( ) ; @@v8@@ = tcg_temp_new_i32 ( ) ; tcg_gen_trunc_i64_i32 ( @@v7@@ , @@a2@@ ) ; tcg_gen_trunc_i64_i32 ( @@v8@@ , @@a3@@ ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; @@v10@@ = tcg_temp_new_i64 ( ) ; if ( @@a4@@ ) { tcg_gen_ext_i32_i64 ( @@v9@@ , @@v8@@ ) ; tcg_gen_ext_i32_i64 ( @@v10@@ , @@v7@@ ) ; } else { tcg_gen_extu_i32_i64 ( @@v9@@ , @@v8@@ ) ; tcg_gen_extu_i32_i64 ( @@v10@@ , @@v7@@ ) ; } tcg_gen_mul_i64 ( @@v10@@ , @@v9@@ , @@v10@@ ) ; tcg_gen_shri_i64 ( @@v9@@ , @@v10@@ , Number L ) ; tcg_gen_mov_i64 ( cpu_tmp0 , @@v9@@ ) ; tcg_temp_free_i64 ( @@v9@@ ) ; tcg_gen_andi_i64 ( cpu_y , cpu_tmp0 , Number ) ; tcg_gen_mov_i64 ( @@a1@@ , @@v10@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; tcg_temp_free_i32 ( @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}