{"name": "gen_helper_compute_C_icc", "code": "unsigned __int64 __fastcall gen_helper_compute_C_icc ( int @@a1@@ ) { unsigned __int64 @@v2@@ ; @@v2@@ = __readfsqword ( Number ) ; tcg_gen_helperN ( ( __int64 ) & helper_compute_C_icc , Number , Number , @@a1@@ , Number , Number L ) ; return __readfsqword ( Number ) ^ @@v2@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "v2", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
{"name": "tcg_gen_helperN", "code": "unsigned __int64 __fastcall tcg_gen_helperN ( __int64 @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ , __int64 @@a4@@ , unsigned int @@a5@@ , __int64 @@a6@@ ) { unsigned int @@v11@@ ; unsigned __int64 @@v12@@ ; @@v12@@ = __readfsqword ( Number ) ; @@v11@@ = tcg_const_i64 ( @@a1@@ ) ; tcg_gen_callN ( & tcg_ctx , @@v11@@ , @@a2@@ , @@a3@@ , @@a4@@ , @@a5@@ , @@a6@@ ) ; tcg_temp_free_i64 ( @@v11@@ ) ; return __readfsqword ( Number ) ^ @@v12@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r80"}, {"n": "v11", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v12", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_addx_int", "code": "unsigned __int64 __fastcall gen_op_addx_int ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; switch ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { case Number : case Number : if ( @@a5@@ ) gen_op_add_cc ( @@a2@@ , @@a3@@ , @@a4@@ ) ; else tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : case Number : @@v9@@ = gen_add32_carry32 ( ) ; goto LABEL_8 ; case Number : case Number : case Number : @@v9@@ = gen_sub32_carry32 ( ) ; goto LABEL_8 ; default : @@v9@@ = tcg_temp_new_i32 ( ) ; gen_helper_compute_C_icc ( @@v9@@ ) ; LABEL_8 : @@v10@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v10@@ , @@v9@@ ) ; tcg_gen_add_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; tcg_gen_add_i64 ( @@a2@@ , @@a2@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; if ( @@a5@@ ) { tcg_gen_mov_i64 ( cpu_cc_src , @@a3@@ ) ; tcg_gen_mov_i64 ( cpu_cc_src2 , @@a4@@ ) ; tcg_gen_mov_i64 ( cpu_cc_dst , @@a2@@ ) ; tcg_gen_movi_i32 ( cpu_cc_op , Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]} {"name": "gen_op_subx_int", "code": "unsigned __int64 __fastcall gen_op_subx_int ( __int64 @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ , int @@a5@@ ) { unsigned int @@v9@@ ; unsigned int @@v10@@ ; unsigned __int64 @@v11@@ ; @@v11@@ = __readfsqword ( Number ) ; switch ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { case Number : case Number : if ( @@a5@@ ) gen_op_sub_cc ( @@a2@@ , @@a3@@ , @@a4@@ ) ; else tcg_gen_sub_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; return __readfsqword ( Number ) ^ @@v11@@ ; case Number : case Number : case Number : @@v9@@ = gen_add32_carry32 ( ) ; goto LABEL_8 ; case Number : case Number : case Number : @@v9@@ = gen_sub32_carry32 ( ) ; goto LABEL_8 ; default : @@v9@@ = tcg_temp_new_i32 ( ) ; gen_helper_compute_C_icc ( @@v9@@ ) ; LABEL_8 : @@v10@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v10@@ , @@v9@@ ) ; tcg_gen_sub_i64 ( @@a2@@ , @@a3@@ , @@a4@@ ) ; tcg_gen_sub_i64 ( @@a2@@ , @@a2@@ , @@v10@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i64 ( @@v10@@ ) ; if ( @@a5@@ ) { tcg_gen_mov_i64 ( cpu_cc_src , @@a3@@ ) ; tcg_gen_mov_i64 ( cpu_cc_src2 , @@a4@@ ) ; tcg_gen_mov_i64 ( cpu_cc_dst , @@a2@@ ) ; tcg_gen_movi_i32 ( cpu_cc_op , Number ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } return __readfsqword ( Number ) ^ @@v11@@ ; } }", "source": [{"n": "a3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "v10", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v9", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}