Jacob Savir
Jacob Savir is a Professor in the Department of Electrical and Computer Engineering at the New Jersey Institute of Technology and an IEEE Fellow. He is credited with developing two approaches to detecting Transition Faults (a type of Fault model) that might occur during the manufacturing of semiconductor chips, viz., the Skewed-Load Transition Test (Launch-off-shift at-speed test) and the Broad-side delay test (Launch on Capture at-speed test). Education. Savir completed his B.Sc. and M.Sc. in Electrical Engineering from Technion – Israel Institute of Technology in 1968 and 1974 respectively. He then obtained his  MS in Statistics and PhD in Electrical Engineering from Stanford University in 1976 and 1978 respectively. He worked as a researcher at IBM for nearly two decades after his PhD (1978-1996). Research contributions to DFT. In 1992, Savir wrote the seminal paper on Skewed-Load Transition Test better known in the Design for testing industry as Launch-off-shift at-speed test. In 1994, he co-authored the paper on Broad-side delay test.