Assertion: interrupt | /r/HasProperty | pending
Facets:
Source sentences:
text: If several interrupt sources of equal priority are pending, the interrupt on the IRQ line with the lowest number is considered first.
text: So even if an ISR ends, and your interrupt is pending, it still has to wait for one more instruction before it is serviced.
text: Similarly, a handling scheme referred to as “tail-chaining” specifies that if an interrupt is pending while the ISR for another, higher-priority another interrupt completes, the processor will immediately begin the ISR for the next interrupt, without restoring its previous state.
text: When no interrupts are pending, the line is in HIGH state.
text: Use the ddi_intr_get_pending(9F) function to check whether an interrupt is pending.
text: Figure 8 illustrates a case where the interrupt is pending and then later unmasked.
text: So even if an ISR ends, and your interrupt is pending, it still has to wait for one more instruction before it is serviced.