Assertion: fixed length instruction | /r/HasProperty | 32 bit
Facets:
value: commonly
type: TEMPORAL
value: typically
type: DEGREE
Source sentences:
text: sacrifice code density and use longer fixed-width instructions, typically 32 bit, such as the MIPS and DLX and ARM.
text: Most RISC architectures have fixed-length instructions (commonly 32 bits) and a simple encoding, which simplifies fetch, decode, and issue logic considerably.