Assertion: interrupt | /r/HasProperty | executed
Facets:
Source sentences:
text: Should the device be allowed to raise an interrupt while another interrupt service routine is already being executed
text: When this interrupt is executed, the processor saves the content of the PC register into the stack and branches to 003CH address.
text: When this interrupt is executed, the processor saves the content of the PC register into the stack and branches to 0034H address.
text: When this interrupt is executed, the processor saves the content of the PC register into the stack and branches to 002CH address.
text: NVIC also provides implementation schemes for handling interrupts that occur when other interrupts are being executed or when the CPU is in the process of restoring its previous state and resuming its suspended process.