Assertion: latch's input | /r/CapableOf | change the output
Facets:
Source sentences:
text: Even though a control line is now required, the SR latch is not synchronous, because the inputs can change the output if the enable line is held high at length.
text: Although a control line is necessary, the latch is not synchronous due to the inputs which can alter the output even in the middle of an enable pulse.
text: Even though a control line is now required, the SR latch is not synchronous, because the inputs can change the output even in the middle of an enable pulse.
text: Even though a control line is now required, the SR latch is not synchronous, because the inputs can change the output even in the middle of an enable pulse i.e if the input keep changing when the Enable pin is HIGH the output will keep on changing until the Enable pin goes to low.