Assertion: flop's input | /r/HasProperty | connected by not gate
Facets:
Source sentences:
text: Its construction is also similar to the SR flip-flop except the inputs are connected by NOT Gate.
text: In case of a 3 – bit synchronous counter, the inputs to the third flip flop is connected to an AND gate that is fed by the outputs of first and second flip flops (Q1 and Q2)