Assertion: flop's input | /r/HasProperty | active
Facets:
value: at a low logic level
type: OTHER
Source sentences:
text: 5.3.1 is called a level triggered D Type flip-flop because whether the D input is active or not depends on the logic level of the clock input.
text: From the previous truth table it can be seen that the CLEAR (CLR) and PRESET inputs are active at a low logic level and put on the Q output of the Flip-Flop, a high logic level regardless of the state of the clock and / or the state of the J and K inputs.