Assertion: flop's output | /r/HasProperty | logic
Facets:
value: currently
type: TEMPORAL
value: high
type: DEGREE
Source sentences:
text: Similarly if a D input is at logic 0 the output of the left hand NAND gate of the pair will be Logic 0 and the right hand gate output will be logic 1, which will clear the Q output of the flip-flop.
text: This is equivalent to what happens when you provide a logic-high input to a T flip-flop: if the output is currently logic high, it changes to logic low; if it’s currently logic low, it changes to logic high.