Assertion: fet's input impedance | /r/AtLocation | figure
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Source sentences:
text: The higher input impedance of the JFET under reverse gate bias conditions can be seen by connecting a microammeter in series with the gate-source voltage (V GG ), as shown in figure 3-49.
text: The higher input impedance of the JFET under reverse gate bias conditions can be seen by connecting a microammeter in series with the gate-source voltage (VGG), as shown in figure 3-49.