Assertion: flop's output | /r/HasAspect | time
Facets:
Source sentences:
text: Although this circuit is an improvement on the clocked SR flip-flop it still suffers from timing problems called “race” if the output Q changes state before the timing pulse of the clock input has time to go
text: The condition of RACE arises if the output Q changes its state before the timing pulse of the clock input has time to go in OFF state.