Assertion: cpu | /r/CapableOf | write data
Facets:
value: to memory
type: TRANSITIVE-OBJECT
value: in ram
type: LOCATION
value: likewise
type: DEGREE
value: to the memory location
type: TRANSITIVE-OBJECT
value: from mdr
type: OTHER
Source sentences:
text: When the CPU wants to read or write data in RAM, it outputs an address to that data.
text: Central processing units read data from memory and write data to memory.
text: When the CPU wants to read or write some data in RAM, it outputs an address to that data.
text: When the CPU wants to read or write data in RAM, it outputs an address to that data.
text: Whe writing to memory, the CPU writes data from MDR to the memory location whose address is stored in MAR
text: When the CPU wants to read or write data in RAM, it outputs an address to that data.
text: A CPU performs three basic operations on data: It reads data, It manipulates data, and it writes data.
text: A CPU performs three basic operations on data: It reads data, It manipulates data, and it writes data.
text: Likewise, it writes data to memory by providing the addresses of the destination cells together with a write signal.
text: When the CPU writes data to the main memory, it sends a signal to the write command line.
text: Central processing units read data from memory and write data to memory.
text: Central processing units read data from memory and write data to memory.