Assertion: circuit's element | /r/CapableOf | use timing models
Facets:
value: with subcircuit models
type: OTHER
Source sentences:
text: Mixed-mode simulation is handled on three levels; (a) with primitive digital elements that use timing models and the built-in 12 or 16 state digital logic simulator, (b) with subcircuit models that use the actual transistor topology of the integrated circuit, and finally, (c) with In-line Boolean logic expressions.