  We present Syntroids, a case study for the automatic synthesis of hardware
from a temporal logic specification. Syntroids is a space shooter arcade game
realized on an FPGA, where the control flow architecture has been completely
specified in Temporal Stream Logic (TSL) and implemented using reactive
synthesis. TSL is a recently introduced temporal logic that separates control
and data. This leads to scalable synthesis, because the cost of the synthesis
process is independent of the complexity of the handled data.
  In this case study, we report on our experience with the TSL-based
development of the Syntroids game and on the implementation quality obtained
with synthesis in comparison to manual programming. We also discuss solved and
open challenges with respect to currently available synthesis tools.
