  In order to protect intellectual property against untrusted foundry, many
logic-locking schemes have been developed. The main idea of logic locking is to
insert a key-controlled block into a circuit to make the circuit function
incorrectly without right keys. However, in the case that the algorithm
implemented by the circuit is naturally fault-tolerant or self-correcting,
existing logic-locking schemes do not affect the system performance much even
if wrong keys are used. One example is low-density parity-check (LDPC)
error-correcting decoder, which has broad applications in digital
communications and storage. This paper proposes two algorithmic-level
obfuscation methods for LDPC decoders. By modifying the decoding process and
locking the stopping criterion, our new designs substantially degrade the
decoder throughput and/or error-correcting performance when the wrong key is
used. Besides, our designs are also resistant to the SAT, AppSAT and removal
attacks. For an example LDPC decoder, our proposed methods reduce the
throughput to less than 1/3 and/or increase the decoder error rate by at least
two orders of magnitude with only 0.33% area overhead.
