  This paper details the FPGA implementation methodology for Convolutional
Spiking Neural Networks (CSNN) and applies this methodology to low-power
radioisotope identification using high-resolution data. Power consumption of 75
mW has been achieved on an FPGA implementation of a CSNN, with an inference
accuracy of 90.62% on a synthetic dataset. The chip validation method is
presented. Prototyping was accelerated by evaluating SNN parameters using
SpiNNaker neuromorphic platform.
