  Negative Biased Temperature Instability (NBTI)-induced aging is one of the
critical reliability threats in nano-scale devices. This paper makes the first
attempt to study the NBTI aging in the on-chip weight memories of deep neural
network (DNN) hardware accelerators, subjected to complex DNN workloads. We
propose DNN-Life, a specialized aging analysis and mitigation framework for
DNNs, which jointly exploits hardware- and software-level knowledge to improve
the lifetime of a DNN weight memory with reduced energy overhead. At the
software-level, we analyze the effects of different DNN quantization methods on
the distribution of the bits of weight values. Based on the insights gained
from this analysis, we propose a micro-architecture that employs low-cost
memory-write (and read) transducers to achieve an optimal duty-cycle at run
time in the weight memory cells, thereby balancing their aging. As a result,
our DNN-Life framework enables efficient aging mitigation of weight memory of
the given DNN hardware at minimal energy overhead during the inference process.
