  Spiking Neural Networks (SNNs) are a promising paradigm for efficient
event-driven processing of spatio-temporally sparse data streams. SNNs have
inspired the design and can take advantage of the emerging class of
neuromorphic processors like Intel Loihi. These novel hardware architectures
expose a variety of constraints that affect firmware, compiler and algorithm
development alike. To enable rapid and flexible development of SNN algorithms
on Loihi, we developed NxTF: a programming interface derived from Keras and
compiler optimized for mapping deep convolutional SNNs to the multi-core Intel
Loihi architecture. We evaluate NxTF on DNNs trained directly on spikes as well
as models converted from traditional DNNs, processing both sparse event-based
and dense frame-based data sets. Further, we assess the effectiveness of the
compiler to distribute models across a large number of cores and to compress
models by exploiting Loihi's weight sharing features. Finally, we evaluate
model accuracy, energy and time to solution compared to other architectures.
The compiler achieves near optimal resource utilization of 80% across 16 Loihi
chips for a 28-layer, 4M parameter MobileNet model with input size 128x128. In
addition, we report the lowest error rate of 8.52% for the CIFAR-10 dataset on
neuromorphic hardware, using an off-the-shelf MobileNet.
