Developing for Sipeed Tang Nano FPGA Board on my Manjaro Linux machine
Tags: fpga, sipeed, sipeedtangnano, gowin
Published: 2021-06-16 17:51:20

---
title: Developing for Sipeed Tang Nano FPGA Board on my Manjaro Linux machine
published: true
description: A development diary for the Sipeed Tang Nano FPGA Board part 1
tags: FPGA, Sipeed, SipeedTangNano, Gowin
cover_image: https://media-cdn.seeedstudio.com/media/catalog/product/cache/b2267b506d4e4594666ef83a79896a9a/_/_/__20191018174526.jpg
---


## Introduction
From the view point of a electronics hobbyist and maker, all the FPGA development environments I've tried so far has been heavily stuck in the stone age. Or at least it feels like that when compared to much more user and hobbyist friendly devices such as Arduinos, ESP32s etc. Not only do they have a thriving community, the tooling itself is free to use and does not require any license.

This is not so much so in the world of FPGAs. However, the new-ish [Sipeed Tang Nano](https://www.seeedstudio.com/Sipeed-Tang-Nano-FPGA-board-powered-by-GW1N-1-FPGA-p-4304.html) is at least _very_ cheap so I decided go give it a go. It features a GW1N-LV1QN48C6/I5 with 1152 LUT4s, 1 PLL, and a total of 72Kbit SRAM. Gowin is a young chinese manufacturer of FPGAs. I also got the [TFT screen](https://www.seeedstudio.com/5-Inch-Display-for-Sipeed-Tang-Nanno-p-4301.html) to go along with it.

For all my daily work I use Manjaro Linux, but this diary should be applicable to all Linux distros. :)


## Resources
Lets first get the tedious documentation out of the way. This is where I fetched all the documentation I could find:

Some useful github repos:
https://github.com/sipeed/Tang-Nano-Doc
https://github.com/sipeed/Tang-Nano-examples

Sipeed wiki:
https://tangnano.sipeed.com/en/

The IDE can be downloaded here (currently named "云源软件 for linux(V1.9.7.06Beta,综合器仅含GowinSynthesis)"):
http://www.gowinsemi.com.cn/faq.aspx
Direct link: http://cdn.gowinsemi.com.cn/Gowin_V1.9.7.06Beta_GowinSynthesis-only_linux.tar.gz

There are various documents and tools hosted here:
https://dl.sipeed.com/shareURL/TANG/Nano
Though the site is very slow and not user friendly, so you could instead get them from my repo :)
https://github.com/Tubbles/sipeed-docs


## License
Unfortunately, their IDE requires a license. In my experience the node locked ("Local Only") is the easiest one to set up, especially on a Linux machine, as opposed to a floating license ("Shared type"), which requires a floating license server to be configured and running. The Sipeed documentation states that the intended way to get the IDE running is to use their license that they obtained from Gowin and spoof a local MAC address in order to fool the license check. This is probably a license violation, and not at all user friendly. I did not bother with that approach, although one might find success in following eg. [this tutorial](https://www.question-defense.com/2012/11/26/linux-create-fake-ethernet-interface) to add a dummy network interface, and not muck up the computer configuration.

A simpler way is to [apply for a license directly with Gowin](https://www.gowinsemi.com/en/support/license/). The computer MAC address can be found with `ip link show` and has the format `12:34:56:78:9a:bc`. It took 24 hours before I got a reply back from Gowin with the license. This is, in my opinion, the easier route, although they seem to have an eager sales department, given the number of email replies they sent me.


## IDE
After obtaining the license, I started the IDE and pointed to the downloaded license file. When trying to run the IDE I had to point to the libraries distributed with their Programmer tool, using this command: `LD_LIBRARY_PATH=Programmer/bin IDE/bin/gw_ide` This worked, and to my amazement they have done away with the Synplify synthesizer! I think this is a good step towards freeing up the world of FPGA development.

## Conclusion
An IDE up and running concludes this first part of my Sipeed dev diary. My goal is to make this FPGA into a tiny graphics card interfacing the TFT screen. Let me know any FPGAs you actually think are maker friendly :)