Design the Scheduler using Timer Array Unit and Interrupt
Published: 2023-11-15 10:02:26

Hello Readers,
I'm Sana, and I'm a Junior Software Engineer with Luxoft India. I'm happy to share this post, in which I relate my previous experience with Design the scheduler using timer array unit and interrupt.

**Introduction**
Here in this Article, we have designed the scheduler to run at a 5ms, 10ms, 100ms rate based on project requirements. Which is provide sync and process the data application and MCAL to provide designed output.
Scheduler use to do scheduling the tasks. Here we are using Non Pre-emptive O.S means task execute based on FIFO (First In First Out), so which task is queue it will start and complete it job later next time will execute.
It is responsible for ensuring that all tasks are executed in a timely manner. If the scheduler is not implemented correctly, it can lead to system instability or even failure. CPU Scheduling is a process that allows one process to use the CPU while another process is delayed due to unavailability of any resources such as I/O etc, thus making full use of the CPU. The purpose of CPU Scheduling is to make the system more efficient, faster, and fairer. The scheduler will always choose the task with the highest priority that is ready to run.

**Hardware and Software setup**

- Micro Controller : 
Renesas MCU : RL78 / F12 series - R5F109GC- 48PINS

- Equipment being used:
 1. Renesas Evolution Board 
 2. E2 Lite Debugger
 3. Cable
 4. CRO

**Operational Modes:**

![Image description](https://dev-to-uploads.s3.amazonaws.com/uploads/articles/ej218zr0gyz39c5rhfet.png)

- OFF Mode:
In OFF State the  ECU will transition from the ON Mode to the OFF Mode
when IGN_VOLTAGE < 5-VDC

- ON Mode:
In ON State the  ECU will transition from the OFF Mode to the ON Mode 
when IGN_VOLTAGE > 5-VDC. 

- IDLE Mode:
When Ignition Voltage is 5-VDC > IGN_VOLTAGE < 10-VDC and user is not switching (not pressing any switch) Heater or Ventilation mode can be consider as IDLE Mode.
It will default to the IDLE sub- mode when in the OPERATIONAL Mode.
In Idle Mode,  ECU is in RUN condition , However all the outputs are disable.

- Normal Operation Mode :
It transits from IDLE Mode to Normal Mode when 10-VDC > IGN_VOLTAGE < 15-VDC

- Heat Mode:
The ECU will transition from the IDLE Mode to HEAT Mode when Heat Mode Switch is pressed while ECU in Normal Operation Mode.
The ECU will transition from the VENT Mode to HEAT Mode when Heat Mode Switch is pressed while ECU in Normal Operation Mode.

- Vent (Blower) Mode:
The ECU will transition from the IDLE Mode to Vent Mode when Vent Mode Switch is pressed while ECU in Normal Operation Mode.
The ECU will transition from the HEAT Mode to VENT Mode when VENT Mode Switch is pressed while ECU in Normal Operation Mode

- Degraded Mode :
It transits from NORMAL HEAT or VENT Mode state to the DEGRADED HEAT state when IGN_VOLTAGE < 8.5-VDC.
It transits from the NORMAL HEAT or VENT Mode state to the DEGRADED HEAT state when IGN_VOLTAGE > 16.5-VDC.


![Image description](https://dev-to-uploads.s3.amazonaws.com/uploads/articles/bneaji7w6cbbptdtj0o8.png)

- Fault State:
When user disconnect the Seat Cushion HMAT / Seat Back HMAT or BLOWER, then within 10-msec of Normal operation mode will transitioning to the FAULT state.
The ECU shall disable HEATER or BLOWER Functionality within 10-msec transitioning to the FAULT state from Normal operation mode.
The ECU shall set HEAT_IND or VENT_IND to INACTIVE within 16-sec of transitioning to the FAULT state.

- Fault Protection:
The ECU shall be capable of operating after a fault is removed without incurring any physical damage or functional degradation.

**I/O Port configuration**

In this project we are using  RL78/F12 microcontrollers are provided with digital I/O ports, which enable variety of control operations. These ports have several alternate functions
I/O port configuration is the process of setting up the I/O ports on a microcontroller to control external devices. This can be done in software.
In our Project as per the requirement we made I/O Configuration for all the Ports, based on the input received from the customer in the form of excel(I/O Mapping)

![Image description](https://dev-to-uploads.s3.amazonaws.com/uploads/articles/45ztiwzcf48cy7fekvsb.png)


**Timer configuration**
In this project, We have used Total 8 channel, 16bits Timer to achieve different functionality such as schedulers.
Timers are a common peripheral in microcontrollers. They can be used for a variety of purposes, such as generating interrupts, controlling peripherals, and implementing timekeeping.
Renesas controllers, timers are configured using a set of registers. These registers control the timer's mode, period, and compare value.

![Image description](https://dev-to-uploads.s3.amazonaws.com/uploads/articles/2waypxmyetapfdlyrklr.png)

**Interrupt Configuration**
Interrupt configuration is essential for the Renesas scheduler. The scheduler is responsible for managing the execution of tasks in a multi-tasking system.
 When an interrupt occurs, the scheduler will automatically call the registered interrupt handler. The interrupt handler can then perform any necessary processing and then return control to the scheduler.

![Image description](https://dev-to-uploads.s3.amazonaws.com/uploads/articles/9zysgqz53cbivbx62yi1.png)

**Validation of Scheduler**
In this picture we can see if we Apply the break point to each ISR. If the breakpoint is hit, it will stop the program execution and allow to step through the code in the ISR.  




![Image description](https://dev-to-uploads.s3.amazonaws.com/uploads/articles/e2ri5qmt5i5qx42jwohd.png)

**Conclusion**
This essay has presented a design for a scheduler using the timers array unit and interrupts at rate 5ms, 10ms, 100ms in Renesas control. The design has been validated using both the CS+ IDE and CRO, demonstrating its correctness and reliability. The scheduler offers several potential benefits, such as improved performance and reliability. Future work could focus on developing a more general-purpose scheduler that can be used on a wider range of Renesas microcontrollers.