ARM EMBEDDED SYSTEM AND ARM PROCESSOR FUNDAMENTALS - PART 3
Published: 2024-02-15 10:39:39

Hello Readers,
My name is Sana, and I’m working at Luxoft India as a Junior Software Developer. Luxoft has given me several opportunities to work on numerous projects, which has stimulated me to discuss the crucial strategies concerned in ARM Embedded system. Here we will speak about the in-detail ARM Embedded system part 3.

**Introduction**
The ARM processor core is a key component of most successful 32-bit embedded systems. ARM cores are used in mobile phones, organizers, and a multitude of everyday portable consumer devices.
The first ARM1 prototype was designed in 1985. Over 1 billion ARM processors had been delivered worldwide by the end of 2001. The ARM Company bases their success on a simple and powerful original design, which continues to improve today through the constant technical innovation. In fact, the ARM core is not a single core, but a whole family of designs sharing similar design principle and a common instruction set.
In this Article we discuss initially an overview of ARM design philosophy, an example of embedded device and its typical hardware and software technologies that surrounded an ARM processor. Then we discuss a brief description of ARM core model with its registers, mode and pipeline.


**ARM Design Philosophy**

There are many special features that have driven the ARM Processor design.
They are as follow:

- Power consumption

- Code density

- Price

- Size

- Debug technology

- Core processor

The above listed parameters for the ARM designs philosophy is clearly illustrated below.

Portable embedded systems require battery power. The ARM processor has been designed to reduce power consumption. It is important for applications such as mobile phones and personal digital assistants.

Embedded systems are price sensitive
And use slow and low-cost memory devices. For high volume Application to get substantial savings essential for high-volume applications like digital cameras, every cent has to be accounted for in the design.

And, reduce the area of embedded processor; smaller the area used by the embedded processor, reduced cost of the design and manufacturing for the entire product.

ARM has equipped its processors with hardware-level debugging mechanisms to provide software engineers with a clear view of code execution, streamlining problem identification and resolution.

The integrated debugging tools within ARM processors empower software engineers to delve deeper into code behavior during execution, fostering a more efficient and streamlined debugging workflow.

The ARM core is not a pure RISC architecture because of the ARM core adopts the RISC philosophy. This flexibility arguably forms its core strength, allowing it to excel in real-world applications


**Operation:**

- Data items are set in the register file called as storage bank made up of 32-bit registers. Since the ARM core is a 32-bit processor, most of the instruction treat the register as holding signed or unsigned 32- bit values. The sign extends hardware transform signed 8-bit or 16-bit numbers to 32-bit values as they are read from memory and arranged in register.

- ARM instruction typically have two source register i.e., Rn and Rm, and Single result or destination register Rd. Source operands are read from register file using internal buses A and B respectively. The ALU (arithmetic logic unit) or MAC (multiply-accumulate unit) takes the register values Rn and Rm from the A and B buses and evaluates a result.

- Data processing instruction write the result to Rd directly to the register file. Load and Store instructions use ALU to generate an address to be hold in the address register and broadcast on the address bus.

- One important feature of the ARM is that register Rm alternately can be preprocessed in barrel shifter before it enters the ALU. Together barrel shifter and ALU is used to calculate a wide range of expression and addresses.

- After passing through the functional elements, the result in the Rd is written back to register file using the result bus.
For Load and Store instruction the incrementer updates the address register before the core reads or writes next register value from or to next sequential memory location. The processor continues executing instruction until an exception or interrupt changes normal execution flow.

**Embedded System Software**

![Image description](https://dev-to-uploads.s3.amazonaws.com/uploads/articles/kza61a6wefkb6wavot5a.png)

To derive an embedded system the software is needed. Figure shows the block diagram of typical software components required to control an embedded device. It mainly consists of four typical software components. Each software component in the stack uses a high level of abstraction to individual the code from the hardware device.
The first code To ensure a smooth transition to the operating system, the board first executes target-specific initialization code, which establishes a baseline hardware configuration.
An infrastructure to control application is being provided by the operating system. The operating system also handle hardware system resources. Many embedded system do not have a full operating system but a simple task scheduler that is either event or poll driven.
Device drivers act as a bridge, offering a unified software interface for interacting with the various peripherals attached to the hardware. Applications, such as a diary app on a mobile phone, carry out specific tasks that fulfill the device's intended purpose. The operating system acts as a coordinating the execution of multiple applications that may be running concurrently on a single device. Software components can reside in either ROM (firmware) for permanent storage, like the initialization code, or RAM for temporary execution.

**Conclusion**

The embedded device is mainly controlled by the ARM processor. Different version of ARM processor are available to suit the desire operating characteristics. An ARM Processor comprises a core and Peripheral. The core is an execution engine that processes instruction and manipulates data. The peripheral are the surrounding components that interface it with a bus, such as memory management and caches.