high resolution mash 2-2 sigma delta interface for capacitive accelerometers
This paper describes the design of fourth order MASH ?? interface for MEMS capacitive accelerometers which is capable of converting change in differential capacitance to a digital output. It employs a switched capacitor (SC) charge amplifier as front end block with open loop gain of 120dB and total integrated noise of 4.5V from dc to 10 kHz and a switched capacitor 2-2 multi stage noise shaping (MASH) sigma delta modulator as a back end block. Circuit simulations show that the interface system can achieve SNDR of 100dB in the signal band which is equivalent to capacitive resolution of 10aF for nominal capacitance ranging from 1pF to 10pF.
mash capacitance measurement