Analytical approach to layout generation of datapath cells
This paper addresses the problem of layout automation of datapath cells. It presents an analytical approach to transistor placement under full custom design style and demonstrates that it can be applied to practical datapath designs. The presented approach is based on a mathematical model which employs a mixed integer linear programming technique. The placement algorithm adopts the custom design techniques commonly used by datapath layout designers in generating hand-crafted designs. An important aspect of the presented method is the efficient management of the complexity of the underlying mathematical model which makes it applicable to real designs. The authors implemented the presented datapath design technique as an experimental software tool running in the industrial environment. The generated layout results are competitive with manual designs provided by experienced layout designers.
datapath synthesis integrated circuit layout automation layout synthesis and optimization module generation