Design and design methods for unified multiplier and inverter and its application for HECC
This paper describes two novel architectures for a unified multiplier and inverter (UMI) in GF(2m): the UMI merges multiplier and inverter into one unified data-path. As such, the area of the data-path is reduced. We present two options for hyperelliptic curve cryptography (HECC) using UMIs: an FPGA-based high-performance implementation (Type-I) and an ASIC-based lightweight implementation (Type-II). The use of a UMI combined with affine coordinates brings a smaller data-path, smaller memory and faster scalar multiplication. Both implementations use curves defined by h(x)=x  and f(x)=x5+f3x3+x2+f0 f ( x ) = x 5 + f 3 x 3 + x 2 + f 0 . The high throughput version uses 2316 slices and 2016 bits of block RAM on a Xilinx Virtex-II FPGA, and finishes one scalar multiplication in 311 ? s . The lightweight version uses only 14.5kGates, and one scalar multiplication takes 450ms.
hyperelliptic curve cryptography modular multiplication inversion