Challenges of integration of high-? dielectric with IIIV materials (Invited Paper)
This paper gives a brief overview of some of the challenges and approaches of integration of high dielectric constant (high-?) dielectrics with compound semiconductor materials for future high performance low power logic applications. Reviewed themes include interface passivation layer, atomic layer deposition self-cleaning effects and characterization of dielectric/IIIV interfaces.
atomic layer deposition iiiv semiconductors surface passivation field effect transistors