efficient message routing in mega-micro-computer networks
With rapidly developing microprocessor technology, we can anticipate an entire microcomputer being contained on a single, low-cost LSI chip. It will be technically and economically feasible to interconnect thousands or millions of these microcomputers to form a very large and powerful machinea Mega-Micro-Computer (MMC). This paper defines a system of interlocking buses allowing dense message flow within an MMC. Each microcomputer shares two buses; each bus is shared by sixteen computers. There is a simple algorithm for optimal routing of messages. Data activity on each bus is analytically determined as a function of network size and the spatial distribution of messages between nodes. MMCs are about equally efficient whether connected by buses or by Pierce rings. For equal line costs, an MMC can allow 200 times denser message flow than a million computer network structured like Illiac IV.
efficiency message routing computer network computation network microprocessor technologies microcomputer cost interconnect paper systems flow sharing algorithm optimality data activation functional size spatial distributed structure