Algebraic model for the counter register behaviour
We present an algebraic model based on Milner's SCCS for a specific structure of computer memory, namely the counter register. In this paper a concrete structure of the counter register is. to be considered in order to achieve both the counting-down and the counting-up operations. Following the structural. point of view, the target models are based on the behaviour of the internal components of the counter register, as follows: the T flip-flops, based on JK flip-flops, which are consequently based on the SR flip-flops. For each of these hardware components we define two different specifications and, both formally and automatically, prove that those specifications are equivalent. For the automatic verification of the target equivalences we use here the CWB-NC platform.
counter register sccs process algebra bisimulation equivalence digital circuits