data path tradeoffs using mabal
This paper describes a set of novel tradeoff experiments using MABAL, a Module And Bus ALlocation program. MABAL uses a simple heuristic algorithm to concurrently perform functional unit allocation, register allocation, interconnect allocation and module binding, while minimising overall cost. MABAL was used to produce over 3000 RTL designs from a specification which had been previously scheduled. Tradeoffs between buses and multiplexers and between data steering logic and functional logic were investigated. The results indicate data path tradeoffs are sensitive to the characteristics of the module library used, and illustrate the difficulty of integrating module generation or logic synthesis with high-level synthesis. This tradeoff study has also highlighted MABAL's capabilities and is unlike any other reported in the literature.
data paper experience module allocation heuristic algorithm functional register allocation interconnect binding cost design scheduling multiplexing logic sensitive libraries generation logic synthesis capabilities high level synthesis