Novel technique for estimating metal semiconductor field effect transitor parasitics
A novel technique is developed for extracting the gate resistance, parasitic inductances, and pad capacitances for metal semiconductor field effect transistor devices. The parameters are extracted from two sets of S-parameter measurements: cold measurements and pinch-off measurements. The proposed technique gives rise to reliable results and it is insensitive to the unavoidable measurement errors over any frequency range. The technique is tested on hypothetical data and applied to S-parameter measurements of a few metal semiconductor field effect transistor devices on the same wafer to provide a unique solution. (C) 2003 Wiley Periodicals, Inc.
mes field effect transistor modeling characterization extrinsic parasitics optimization