a new synthesis technique for multilevel combinational circuits
A conceptually simple method for multilevel synthesis of combinational functions is proposed. The method can take advantage of the availability of different gate types, including XOR, with the synthesis decisions being easily correlated to the topology of the circuit obtained. A function is synthesized using a cascade of mapping stages, which transform the function into one that is trivial to implement, called the goal function. The goal function---usually simple---is selected at the outset, then used to guide the definition of the transformations to be implemented by the mapping stages. The resulting circuits are well suited for CMOS implementations and are shown to be easily and/or robustly testable for stuck-open faults. Finally, from a sample of small functions, preliminary results indicate that the resulting circuits are of comparable size to those obtained by conventional minimization techniques. Further work is needed to compare these results to those of existing multilevel synthesis algorithms.
synthesis combinational circuit combinational circuits method functional availability types topologies mappings transformation implementation definition fault sampling size minimal algorithm testing