Secured flipped scan-chain model for crypto-architecture
Scan chains are exploited to develop attacks on cryptographic hardware and steal intellectual properties from the chip. This paper proposes a secured strategy to test designs by inserting a certain number of inverters between randomly selected scan cells. The security of the scheme has been analyzed. Two detailed case studies of RC4 stream cipher and AES block cipher have been presented to show that the proposed strategy prevents existing scan-based attacks in the literature. The elegance of the, scheme lies in its less hardware overhead.
stream hardware overhead index terms-block ciphers design_for_testability scan_based_test scan-chain-based attacks security margin ciphers.