A New On-chip Signal Generator for Charge-Based Capacitance Measurement Circuit
In this paper, a new on-chip signal generator for charge-based capacitance measurement (CBCM) circuit is proposed. As compared to conventional circuits that use two input off-chip clock signals or on-chip delay cells, the proposed circuit uses an I/Q splitter and an AND function to obtain 1/2 and 1/8 duty cycle signals, hence reduces the potential mismatch between these two clock signals. The proposed circuit makes it possible to use higher input frequency in measurement. As a result, smaller capacitance can be measured using the same measurement facilities without the loss of accuracy. Implemented in a standard 180nm CMOS process, the proposed signal generator only occupies 40?m??18?m while consuming less than 60?W at an input frequency of 100MHz. Simulation and measurement results suggest that the CBCM measuring circuits with proposed signal generator achieves the same accuracy as compared to conventional circuits while the requirement of measurement facilities can be considerably relaxed.
signal generator capacitance measurement cmos circuits cmos technology device characterization