On the reduction of thermal and flicker noise in ENG signal recording amplifiers
Because of the extremely low amplitude of the input signal, the design of electro-neuro-graph (ENG) amplifiers involves a special care for flicker and thermal noise reduction. The task becomes really challenging in the case of implantable electronics, because power consumption is restricted to few hundreds mu W. In this work, two different circuit techniques aimed to reduce flicker and thermal noise, in ultra-low noise amplifiers for implantable medical devices, are demonstrated. The circuit design, and measurement results are presented, in both cases showing an excellent performance, and noise to power consumption trade-off. In the first circuit, a very simple low-pass Gm-C chopper amplifier is used for flicker noise cancellation. It consumes only 28 mW, with a measured input referred noise and offset of 2 nV/root Hz, and 2.5 mu V, respectively. In the second circuit, a ultra-low noise amplifier, a energy-efficient DC-DC down-converter, and low voltage design techniques are combined, for the reduction of thermal noise with a minimum power consumption. Measured input referred noise in this case was 5.5 nV/root Hz at only 380 mu W power consumption. Both circuits were fabricated in a 1.5 mu m technology.
analog design techniques cmos low-power low-noise