Low-power MicroVrms noise neural spike detector for implantable interface microsystem device
An ultra-low-power and low-noise detector based on NEO is implemented using standard CMOS process. The NEO detector circuit CMOS-based is realised using sub-threshold technique. We study the noise of NEO circuit and obtain the MicroVrms noise result. We test the chip of NEO detector about the current consumption, noise, and detecting function.
ultra-low-power sub-threshold biopotential detector neo algorithms low noise