variation-aware application scheduling and power management for chip multiprocessors
Within-die process variation causes individual cores in a ChipMultiprocessor (CMP) to differ substantially in both static powerconsumed and maximum frequency supported. In this environment,ignoring variation effects whenscheduling applications or when managing power withDynamic Voltage and Frequency Scaling (DVFS) is suboptimal. This paper proposes variation-aware algorithms for applicationscheduling and power management. One such power managementalgorithm, called {\em LinOpt}, uses linear programmingto find the best voltage and frequency levels for each of thecores in the CMP --- maximizing throughput at a given power budget.In a 20-core CMP, the combination of variation-awareapplication scheduling and {\em LinOpt} increases the averagethroughput by 12--17\\% and reduces the average $ED^2$ by 30--38\\%--- all relative to using variation-awarescheduling together with a simple extension to Intel's Foxtonpower management algorithm.
variation applications application scheduling scheduling power management power management chip multiprocessors process variation core environments effect scale paper algorithm throughput budget combinational extensibility relation