Logic-level analysis of fault attacks and a cost-effective countermeasure design
This article analyzes the internal mechanism of fault attacks on microcontrollers and proposes a cost-effective hardware and software countermeasure design policy. Reliable branch operations are essential to DFA-resistant hardware. Our method is based on a logical fault attack simulation to find the minimum set of signals that contribute to faults in the branch operations and is also based on applying partially redundant logic.
fault attack hardware security