applying autonomic principles for workload management in multi-core systems on chip
This paper explores various possibilities for autonomic enhancements to a multi-core network processor system on chip. Based on the autonomic system on chip paradigm, it is shown how monitors can be added to quantify the operating state of a typical processor core, whereupon a learning classifier system evaluator can determine appropriate actions to be performed in order to optimize the frequency and task distribution across the system. A hardware prototype is used to demonstrate the feasibility of autonomic concepts for dynamic component parameterization and task management at run time.
autonomic multi-core system-on-chip