Comparative study of meta-heuristic 3D floorplanning algorithms
Comparison of five floorplanning solutions for 3D chips in terms of temperature and wirelength. We employ heuristics and evolutionary algorithms; all have been extensively tested. Solutions obtained exhibit great improvements compared with the original 3D chip floorplan. We finally explore the multi-objective problem, considering heat dissipation and wire length. Both single and multi objective are non dominated in different regions of the Pareto front.
floorplan module placement meta-heuristic search