exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers
A new split accumulator architecture to be used in direct digital frequency synthesizers (DDFS) systems is presented. This new design eliminates the need of adders on the section of the accumulator that is not used to address the phase to amplitude mapping block thus reducing area, constraints in implementation, and up to 82\% in power consumption compared to standard designs.
direct digital frequency synthesizer ddfs numerically controlled oscillator low power phase accumulator nco