parameterized system design
Continued growth in chip capacity has led to new methodologies stressing reuse, not only of pre-designed processing components, but even of entire pre-designed architectures. To be used across a variety of applications, such architectures must be heavily parameterized, so they can adapt to those applications' differing constraints by trading off power, performance and size. We describe several parameterized system design issues, and provide results showing how a single architecture with easily configurable parameters can support a wide range of tradeoffs.
system design capacities methodology reuse process component architecture applications constraint power performance size configurability support intellectual property estimation system-on-a-chip cache system parameters low power on-chip bus