context-aware tlb preloading for interference reduction in embedded multi-tasked systems
Rapid system responsiveness and execution time predictability are of significant importance for a large class of real-time embedded systems. Multi-tasking leads to interference in the shared processor resources such as caches and TLBs, which in turn results in not only deteriorated performance but also, and for some applications even more importantly, highly suboptimal worst-case execution time (WCET) estimates due to the interference unpredictability. We present a methodology for task-aware D-TLB interference reduction and preloading through an application-specific task's state introspection at context-switch time for embedded multitasking. The proposed technique addresses the problem through a synergistic cooperation between the compiler, for an application-specific analysis of the task's context, and the OS, for a run-time introspection of the context and an efficient identification of TLB entries of current (live) and of "near-future" usage.
real-time multi-processing tlb management