length-matching routing for high-speed printed circuit boards
As the clock frequencies used in industrial applications increase,the timing requirements imposed on routing problems becometighter. So, it becomes important to route the nets within tight minimumand maximum length bounds. Although the problem of routingnets to satisfy maximum length constraints is a well-studiedproblem, there exists no sophisticated algorithm in the literaturethat ensures that minimum length constraints are also satisfied. Inthis paper, we propose a novel algorithm that effectively incorporatesthe min-max length constraints into the routing problem. Ourapproach is to use a Lagrangian relaxation framework to allocateextra routing resources around nets simultaneously during routingthem. We also propose a graph model that ensures that all theallocated routing resources can be used effectively for extendinglengths. Our routing algorithm automatically prioritizes resourceallocation for shorter nets, and length minimization for longer netsso that all nets can satisfy their min-max length constraints. Ourexperiments demonstrate that this algorithm is effective even in thecases where length constraints are tight, and the layout is dense.
routing circuits clock use industrial applications timing requirements minimal constraint algorithm paper effect resource graph models routing algorithm demonstrate layout  framework  matching