A parallel approach to direct analog-to-residue conversion
A novel design of a direct analog-to-residue converter is presented in this paper. The design makes use of two successive approximation analog-to-digital (A/D) converters, a few module adders and a small look-up table. One of the digital-to-analog converters is modified to generate outputs which are weighted by a constant factor, and one of the comparators is replaced by a difference amplifier. The look-up table needed is a very small percentage of the entire chip area and is shown to be only 840 bytes for a 36-bit residue number system converter. (C) 1999 Elsevier Science B.V. All rights reserved.
analog-to-residue converter parallel processing rns modulo adder