High temperature pulsed-gate robustness testing of SiC power MOSFETs
Pulsed-gate switching test of SiC power MOSFETs is presented in this paper. Electric field simulations are also presented at the SiC/SiO2 interface for different test conditions. SiC/Oxide interface reliability is assessed under much more realistic conditions for power electronic application. Simulations indicate some really interesting aspects of electric field distribution near/inside the oxide region. Simulations clearly justify the difference in VTH under HTGB and pulsed-gate bias stress.
robustness sic power mosfets sic/sio2 interface gate-oxide reliability wide bandgap