rf cmos circuit optimizing procedure and synthesis tool
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications described at high-level of abstraction, fabrication dependent technology parameters and un-sized circuit topologies. The output is a sized net list, which meets the user constraints.The synthesis environment considers user-defined performance parameters into account, and it relies on a genetic algorithm based heuristic method to search for a solution in a large design-space. The synthesis tool determines a solution set of design parameters such that the circuit satisfies the overall design constraints.
rf analog genetic algorithm electronics cad