a new march sequence to fit ddr sdram test in burst mode
This work is focused on DDR SDRAM test based on data word burst-oriented access. Existent March algorithms are not efficient to detect static unlinked faults (as Coupling and Address Decoder faults) in burst-mode operation. We propose to modify the March X algorithm to overcome its weakness. The proposed algorithm can reduce the total test time over 30\% by using burst-mode data access in the DDR SDRAM test. The new algorithm has a length of (6 + BL)N, were BL is the burst-length used in data access. Results show that the proposed method detects errors produced by address decoder faults in word-oriented memories using burst mode operation, which is characteristic of DDR SDRAMs. We also propose to implement the new March algorithm into built-in self-test (BIST) modules for external memory testing.
ddr sdram march algorithms memory test built-in self test system on chip