Analysis, design, and implementation of a high-efficiency full-wave rectifier in standard CMOS technology
In this paper we present analysis, design, and implementation of a high-efficiency active full-wave rectifier in standard CMOS technology. The rectifier takes advantage of the dynamic voltage control of its separated n-well regions, where the main rectifying PMOS elements have been implemented in order to eliminate latch-up and body effect. To minimize rectifier dropout and improve AC-DC power conversion efficiency (PCE), all the MOSFET switching elements have been pushed into deep triode region to minimize their resistance along the main current path during conduction. A prototype rectifier was implemented in the AMI 0.5-mu m 3M/2P n-well CMOS process. An input sinusoid of 5 V peak at 0.5 MHz produced 4.36 V DC output across a 1 k Omega parallel to 1 mu F load, resulting in a measured PCE of 84.8%.
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