An Ultra Low Power Baseband Transceiver IC for Wireless Body Area Network in 0.18-mu m CMOS Technology
This paper investigates the efficient design of the PHY layer architecture for wireless body area networks (WBAN), which targets on ultra-low power consumption with reliable quality of service (QoS). A low cost baseband transceiver specification and a data processing flow are proposed with a comparatively low-complexity control state machine. A multifunctional digital timing synchronization scheme is also proposed, which can achieve packet synchronization and data recovery. The proposed baseband transceiver is fabricated in an 0.18-mu m CMOS process. With a 1.1 V supply and 4 MHz system clock, this baseband chip only consumes 34 mu W in transmitter (TX) mode and 39.6 mu W in receiver (RX) mode. To demonstrate and to optimize the reliability of the proposed design, the dedicated bit-error-rate and packet-error-rate analysis is reported.
low power wireless body area network (wban) digital circuit design wireless communication