Systolic architectures for inversion/division using AB2 circuits in GF(2m)
The current paper presents a new AB2 algorithm based on the MSB-first scheme using a standard basis representation of Galois fields, GF(2m). Thereafter, parallel-in parallel-out and serial-in serial-out systolic realizations for computing AB2 and inversion/division in GF(2m) are proposed on the basis of the new algorithm. The resulting architectures have a low hardware complexity and small latency when compared to conventional approaches. Furthermore, since the proposed architectures incorporate simplicity, regularity, modularity, and pipelinability, they are well suited to VLSI, produce a maximum throughput performance, and can also be utilized as the basic architecture for a cryptoprocessor.
inversion division finite fields ab2 multiplication