integrated circuit optimization by means of evolutionary multi-objective optimization
The design of resource efficient integrated circuits (ICs) requires solving a minimization problem which consists of more than one objective given as measures of the available resources. This multi-objective optimization problem (MOP) can be solved on the smallest unit of the IC, the standard cells, to improve the performance of the entire circuit. In this work, transistor sizing of an IC is approached via a multi-objective approach which includes the use of multi-objective evolutionary algorithms (MOEAs). We compare the performance of two MOEAs on a four-dimensional MOP of a particular standard cell. The results indicate that evolutionary strategies are suitable for the treatment of such problems and advantageous against other rather classical methods.
multi-objective optimization circuit design cmos standard cells