Implementation of a Self-Motivated Arbitration Scheme for the Multilayer AHB Busmatrix
The multilayer advanced high-performance bus (ML-AHB) busmatrix employs slave-side arbitration. Slave-side arbitration is different from master-side arbitration in terms of request and grant signals since, in the former, the master merely starts a burst transaction and waits for the slave response to proceed to the next transfer. Therefore, in the former, the unit of arbitration can be a transaction or a transfer. However, the ML-AHB busmatrix of ARM offers only transfer-based fixed-priority and round-robin arbitration schemes. In this paper, we propose the design and implementation of a flexible arbiter for the ML-AHB busmatrix to support three priority policies-fixed priority, round robin, and dynamic priority-and three data multiplexing modes-transfer, transaction, and desired transfer length. In total, there are nine possible arbitration schemes. The proposed arbiter, which is self-motivated (SM), selects one of the nine possible arbitration schemes based upon the priority-level notifications and the desired transfer length from the masters so that arbitration leads to the maximum performance. Experimental results show that, although the area overhead of the proposed SM arbitration scheme is 9%-25% larger than those of the other arbitration schemes, our arbiter improves the throughput by 14%-62% compared to other schemes.
slave-side arbitration multilayer ahb (ml-ahb) busmatrix on-chip bus self-motivated (sm) arbitration scheme system-on-a-chip (soc)