Program efficiency and high temperature retention of SiN/high-K based memories
This paper presents an experimental and simulation study of the program efficiency and retention of SANOS memory cells. We analyzed the experimental curves of the available cells by a physics based model that includes drift-diffusion transport of carriers in the nitride conduction band. We evidenced how the gate stack dimensions impact the program efficiency; in particular, thicker Si3N4 layers allow for faster programming. However, the Si3N4 thickness hardly influence the high temperature retention, since charge loss due to thermal emission dominates. Good agreement of the model with a wide set of experiments makes us confident on the validity of the interpretation of data which is suggested by the modeling results.
program efficiency modeling sanos/tanos memories