A Radix-16 Combined Complex Division/Square Root Unit with Operand Prescaling
We present a novel design of a radix-16 combined unit for complex division and square root in fixed-point format. A new digit-recurrence algorithm with two-step operand prescaling is developed for complex square root to avoid postscaling of the result. A combined recurrence algorithm is generalized and a scalable hardware architecture is proposed. Designs with different operand precision are implemented in Altera Stratix-II FPGA and cost and performance are evaluated and compared with reference designs of complex division or square root implemented combined or separately. The results show advantages of the proposed combined design in cost and performance.
complex division operand prescaling digit-recurrence complex square root postscaling combined design field-programmable gate array (fpga) radix-16 algorithms