Design of mixed-signal systems for testability
Significant differences in fault models and test methodologies used for analog and digital circuits make a common test for a mixed-signal device difficult. A divide and conquer strategy partitions the circuit into three types of blocks: analog, digital logic and memory. The test and design for testability methods for each type of block exist but assume a direct access to the block under test. Thus, an additional design for testability structure using boundary scan and mixed-signal test bus is incorporated for effective test application. With this design, separate specialized tests are applied to analog and digital parts, as well as to interconnects. The area overhead of the test access structure is generally small as it is shown to be inversely proportional to the square root of the block area. While the partitioned architecture provides a reasonable test solution, weakness remains in the test of block interfaces. Research on unified analogdigital tests is recommended. Delay tests and current measurement tests may provide possible solutions.
mixed-signal systems testing design for testability boundary scan analog test bus system on a chip vlsi