A versatile Nyquist-rate A/D converter with 16-18 bit performance for sensor readout applications
This work presents an ADC core for sensor readout applications. To achieve a high resolution combined with Nyquist-rate A/D conversion, it employs the extended counting technique (IEEE Trans. Circuits Syst. I, 42(11) (1995) 904). By making the number of counting steps programmable, the circuit allows to trade conversion speed for accuracy. In its nominal (lowest-accuracy) mode a conversion requires 71 clock cycles and achieves 16-bit performance in a conversion time of 50 mu s. In the slowest, highest-accuracy mode it achieves 18-bit performance in a conversion time of 365 mu s. To achieve this in a CMOS process that only provides nonlinear capacitors, a nonlinearity correction is investigated. It is shown that this can be approximated by inverting the voltage to charge relationship of the capacitors at the output of the converter. This was implemented as a simple third-order correction, which can easily be done in software. If this correction is omitted, the DNL of the convertor is nearly unchanged but its INL is affected. The circuit's power consumption is 5 mW. The silicon area including all control and reconstruction logic is 1.3 mm(2). (c) 2005 Elsevier B.V. All rights reserved.
analog-to-digital conversion switched-capacitor circuits