an iterative algorithm for placement and assignment of integrated circuits
In [1] a physical design automation system with a unified approach to physical layout techniques was presented. This method has been extended so that it now is an iterated, assignment placement algorithm which improves the placements reported last year. The problems to be addressed in this paper are those of assignment, placement, and spanning. Assignment is the process of assigning logical elements to integrated circuit chips. Placement is the process of placing integrated circuits on a board. Spanning is the process of converting a set of points which must be connected, to a wire list specifying the manner of connection. There are a number of criteria used to span. In this application, we have the option to use either Kruskal's spanning algorithm [2] or a chaining spanner [3]. The goal of these two processes is to increase the routability of the resulting board, which is often measured by the overall length of wire required (Manhattan distance).
iter algorithm place placement assignment integrated circuit integrability circuits physical design physical automation systems layout method paper process point connection use applications spanner distance