programming at the processor-memory-switch level
Users of networks of heterogeneous processors are concerned with allocating specialized resources to tasks of medium to large size. They need to create processes, which are instances of tasks, allocate these processes to processors, and specify the communication patterns between processes. These activities constitute Processor-Memory-Switch (PMS) Level Programming , in contrast with traditional programming activities, which take place at the Instruction Set Processor (ISP) Level . In this paper we describe the use of PMS-level programming in computation-intensive, real-time applications, e.g., vision, robotics, and vehicular control, that require efficient concurrent execution of multiple tasks, e.g., sensor data collection, obstacle recognition, and global path planning, devoted to specific pieces of the application. At CMU we are developing languages and tools for this new style of programming, and in this paper we describe their status.
program processor process use network heterogeneity resource size communication pattern activation place paper real-time applications vision robotics control efficiency concurrency sensor data collection recognition global path planning language tools computation memorialized switch