efficient description of the design space of analog circuits
In this paper we present a method for determining the feasible set of analog design problems and we propose an efficient method for their verification. The verification method presented relies on the formulation of the analog circuit design problem as a convex optimization problem in both the design variables and the performance specifications. Since the design is convex not only in the design variables but also in the specification parameters, we observe that the feasible sets are convex and points at the boundary can be found by solving a single convex optimization problem. We also show that feasible sets can be very well approximated with a polyhedron and therefore defined by a finite set of points. The implication of the latter is that new verifications do not need to be run for every new instantiation of a synthesized analog cell.
analog circuits verification optimization convex programming geometric program synthesis