A complete platform and toolset for system implementation on fine-grain reconfigurable hardware
In this paper a complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts: the fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platform. It is the first such complete academic system. The novel energy efficient FPGA architecture was designed and simulated in STM 0.18?m CMOS technology. The detailed design and circuit characteristics of the Configurable Logic Block as well as the interconnection network are determined and evaluated for energy, delay and area. Concerning the tool flow, each tool can operate as a standalone program as well as part of a complete design framework, composed by existing and new tools.
low power fpga interconnect architecture energy-efficient clb architecture graphical user interface