Achieving spilling-friendly register file assignment for highly distributed register files
Distributed register file architectures divide registers into multiple sets, and it follows that the register files could be small. This can increase the frequency of spilling if register allocation encounters high register pressure, which will reduce the performance. That is, there is extra spilling to handle the pressure and results in performance decline. One of the factors that can produce high pressure is improper register file assignment. Register file assignment is a phase that assigns virtual registers to suitable register files and avoids communication costs. To reduce spilling in the phase of register file assignment, this paper proposes the SPIlling-FRiendly (SPIFR) method, which attempts to improve spilling by estimating the spilling cost from two aspects: assignment and spilling. We used MiBench and EEMBC benchmarks in experiments performed with the Open64-based compiler and a cycle-accurate instruction set simulator. The MiBench experimental results show that the SPIFR method improved the average cycle counts of the benchmarks by 6.0%. For the kernels of the benchmarks, the method improved the average cycle counts by 20.5% and reduced the average spilling ratio by 19.0%. The results on the EEMBC benchmarks indicate that the method improved the cycle counts with the average speedup of 7.0%, the speedup average of the kernel functions was 11.3%, and the average reduction in the spilling ratio was 11.7%, respectively. We conclude that the SPIFR method can reduce spilling and increase the performance.
spilling register file assignment register allocation dsp vliw