systematic protection mechanism design
This work describes an attempt to systematically design a hardware resource protection mechanism when given the requirements of a particular language as a target. The design process is formalized as a structured walk through the multidimensional computer design space towards a hypothetical class of optimal machines. Each step in this walk involves a change in the distribution of work between the compiler and run-time system but no change in the source language semantics. The starting point for this walk is the result of a semantic analysis of the language to be implemented; typically, this produces a very high level machine where the compiler, if any, is trivial. The walk ends when no changes result in a net improvement. This does not guarantee that the result is even locally optimal, since the changes tried depend on the ingenuity and persistence of the designer. This design approach has been used to arrive at a practical, general purpose protection mechanism oriented towards the needs of the Ada language (preliminary version). This architecture was evaluated by comparing it with the PDP-11/45. For the purpose of this comparison, the protection mechanism was incorporated into a partially specified PDP-11 like instruction set. The number of bits making up the processor state and the number of operations involved in address computation were evaluated. On this basis, the result appears to be competitive and worth further investigation.
systems protection mechanical design design hardware resource requirements language design process structure computation design space class optimality change distributed compilation semantic point semantic analysis persistence practical general version architecture comparisons instruction processor operability addressing competition timing