A contribution to fast telecommunication system conception: Application to a DS-SS tracking stage improvement
This paper presents an improvement of the synchronization and tracking stages of a direct sequence spread spectrum (DS-SS) communication system to reduce the acquisition time. We propose a multi-branches solution, implanted in a virtual prototype for a home automation application. The virtual prototype is based on the VHDL-AMS high-level language and the most significant physical parameters will be transferred at a high level. Finally, acquisition time simulations are compared to other classic methods and synthesis results dedicated to a real FPGA prototype are also presented.
virtual prototype wireless ds-ss transceiver multi-branches synchronization stage vhdl-ams language fpga implementation