GPH: A group-based partitioning scheme for reducing total power consumption of parallel buses
Two main sources for power dissipation in parallel buses are data transitions on each wire and coupling between adjacent wires. So far, many techniques have been proposed for reducing the self and coupling powers. Most of these methods utilize one (or more) control bit(s) to manage the behavior of data transitions on the parallel bus. In this paper, we propose a new coding scheme, referred to as GPH, to reduce power dissipation of these control bits. GPH coding scheme employs partitioned Bus Invert and Odd Even Bus-Invert coding techniques. This method benefits from Particle Swarm Optimization (PSO) algorithm to efficiently partition the bus. In order to reduce self and coupling powers of the control bits, it finds partitions with similar transition behaviors and groups them together. One extra control bit is added to each group of partitions. Properly managing number of transitions on control bits of each partition and that of each group, GPH reduces total power consumption, including coupling power. It also locates control bits of each partition such that total power consumption is minimized. We evaluate the efficiency of the proposed method for coding data and address buses under various hardware platforms. Experimental results show 43% average power saving in coded data compared to the original one. We also show the prominence of our coding scheme over previously proposed techniques.
partitioning parallel bus coupling power pso power reduction partitioned encoding