An iterative modular multiplication algorithm
An iterative modular multiplication algorithm designed for efficient implementation on a processor with limited capacity such as an 8-bit microcontroller is proposed. It is a generalization of Chiou and Yang's algorithm and can be implemented in software without excessive bit shifting. A proof of correctness of the proposed algorithm is given together with a run-time analysis. (C) 2002 Elsevier Science Ltd. All rights reserved.
modular multiplication digital arithmetic