VLSI implementation of low-power high-quality color interpolation processor for CCD camera
This paper presents a color interpolation technique for a single-chip charge-coupled device with color-filter-array format. We propose edge-direction weighting and the local gain approach to reconstruct missing color components. Simulations show that the proposed method can achieve better quality-complexity, tradeoff than other algorithms. For real-time implementation, a cost-effective architecture consisting of a pipeline schedule is designed based on our new algorithm. With the time-sharing method, the VLSI architecture can interpolate various colors using a common computational kernel, reducing the circuit complexity. The prototype of the color interpolation processor has been successfully verified with a field-programmable gate array device. the chip only uses about 10K gates and two line buffers.
interpolation camera charge-coupled device (ccd) color filter array (cfa) field programmable gate array (fpga)