SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture
Discussion of chip-level fault tolerance of SpiNNakers design. The implemented software improves fault tolerance by providing diagnostics and reconfiguration. Exploration of communication-level fault tolerance and its effects on system scalability. Wide range of experiments showing that SpiNNaker is highly resilient to failures.
68m15 94c12 68m10 68r10