Common-case computation: A high-level energy and performance optimization technique
This paper proposes a novel circuit design methodology, called common-case computation (CCC)-based design, and new design automation algorithms for optimizing energy consumption and performance. The proposed techniques are applicable in conjunction with any high-level design methodology, where a structural register-transfer level (RTL) description and its corresponding scheduled behavioral (cycle-accurate functional) description are available. It is a well-known fact that in behavioral descriptions of hardware circuits (and also in software programs), a small set of computations often account for most of the computational complexity. However, in the hardware implementations (structural RTL or lower level), the common cases and the remaining computations are typically treated alike. This paper shows that identifying and exploiting common cases during the design process can lead to implementations that are much more efficient in terms of energy consumption and performance. We propose a new high-level design methodology with the following steps: 1) extraction of common-case detection and execution behaviors from the scheduled description; 2) simplification of the common-case behaviors in a stand-alone manner; 3) synthesis of common-case detection circuits and common-case execution circuits from the common-case behaviors; and 4) composing the original design with the common-case circuits to result in an optimized design. We demonstrate that the optimized designs reduce energy consumption by up to 59.8%, and simultaneously improve performance by up to 76.6%, compared with designs derived without special regard for common cases. The simultaneous improvements in energy and performance result in energy-delay product improvements of up to 90.6%.
common case high-level synthesis low-power design power optimization register transfer level