UFS: a global trade-off strategy for loop unrolling for VLIW architectures
Embedded systems are increasingly expected to provide good performance at low cost. As the characteristics of compiled code can have an impact on the overall cost of an embedded system, a compilation strategy must be cost aware as well as achieve high performance. As one major factor for system cost is memory size, code size becomes an important issue in code generation. Thus, cost-effective optimization strategies that are able to perform a good trade-off between code size and performance improvement are needed. In this paper, we propose a novel method based on Integer Linear Programming for computing efficient unroll factors for collections of loop nests with control over code size and side-effects of the transformation. We define a notion of trade-off between code size and performance. Experiments on the Philips Trimedia show that our method achieves excellent trade-offs. Copyright (c) 2006 John Wiley & Sons, Ltd.
loop unrolling iterative compilation code optimization feedback directed compilation instruction level parallelism