The stretched network: Properties, routing, and performance
In this paper, we study a class of interconnection networks for multiprocessors, called the Stretched-G network, which is based on a base graph G by replacing each edge of the base network with an array of processors. Two interesting features of the proposed topology are its area-efficient VLSI layout and superior scalability over the underlying base network while preserving most of its desirable properties. We conduct a general study on the topological properties of stretched networks. We first obtain their basic topological parameters and derive some embedding results. We then present optimal routing and broadcasting algorithms for such networks. We also present a unified approach to obtain the topological properties and VLSI layout of an arbitrary stretched network based on the properties of the corresponding base network G. We compare an incarnation of the stretched graph concept, namely the Stretched-Hypercube, with its equivalent hypercube and star graph from the topological and performance aspects of view. We also provide the reader with preliminary information and proper references about a wraparound variant of the stretched network called the necklace-network.
stretched networks interconnection networks vlsi layout topological properties hypercubes star graphs necklace networks performance analysis