Design and implementation of a protocol offload engine for TCP/IP and remote direct memory access based on hardware/software coprocessing
This paper presents the design and implementation of a protocol offload engine that processes TCP/IP and remote direct memory access (RDMA) protocols by means of hardware/software coprocessing. In the offload engine, time-consuming operations such as TCP/IP header generation are implemented as hardware to improve performance. The software performs control operations and RDMA header generation. In the experiments and analyses, it is proved that the hardware can provide satisfactory performance to process all operations at speeds of over 1Gbps. Our engine can offload most protocol processing overheads  up to 95% to 100%  from the host CPU. Finally, although the embedded processors operate with a 300MHz clock that is seven times slower than the clock of the host CPU, our engine shows maximum bandwidths of 673Mbps for TCP/IP and 551Mbps for RDMA on a gigabit Ethernet network.
protocol offloading remote direct memory access hardware/software coprocessing embedded system tcp/ip offload engine