Timeless discretization of magnetization slope-in the modeling of ferromagnetic hysteresis
A new methodology is presented to assure numerically reliable integration of the magnetization slope in the Jiles-Atherton model of ferromagnetic core hysteresis. Two hardware description language (HDL) implementations of the technique are presented: one in SystemC and the other in very-high-speed integrated circuit (VHSIC) HDL (VHDL) analog and mixed signal (AMS). The new model uses timeless discretization of the magnetization slope equation and provides superior accuracy and numerical stability especially at the discontinuity points that occur in hysteresis. Numerical integration of the magnetization slope is carried out by the model itself rather than by the underlying analog solver. The robustness of the model is demonstrated by practical simulations of examples involving both major and minor hysteresis loops.
ferromagnetic hysteresis hardware description languages (hdls) systemc very-high-speed integrated circuit (vhsic) hdl (vhdl) analog and mixed signal (ams) computer-aided design mixed-domain systems mixed-signal systems