A superheterodyne receiver front-end with on-chip automatically Q-tuned notch filters
A superheterodyne receiver front-end with on-chip automatically Q-tuned notch filters is proposed. The front-end includes a differential LNA and a Gilbert down-converter, where each block is coupled with an on-chip image-rejection notch filter to get high image-rejection ratio. Each notch filter is formed by one on-chip LC network and one negative-resistance cross-coupled pair to compensate for the loss of the LC network. The current through the cross-coupled pairs is automatically adjusted by an automatic Q tuning circuit so that the loss of the notch filter is perfectly compensated to achieve a deepest notch. The automatic Q tuning circuit is an analog digital mixed signal circuit, and successive approximation register algorithm is used to search for the optimum current value. The superheterodyne receiver front-end has been implemented in 0.18 mu m CMOS. Experimental results show that the circuit could achieve an image rejection ratio of 75 dB with 105 MHz IF Frequency. The LNA draws 5.86 mA current, and the down-converter draws 1.27 mA current while two image-rejection filters and the master VCO totally draw 363 mu A current, all from a 1.8 V power supply.
superheterodyne receiver q-tuning notch filter cmos rf