A functional vMOS circuit for implementing cellular-automaton picture-processing devices
This paper proposes a design of cell circuits for implementing cellular-automaton devices that perform morphological picture processing. To produce the complex cell functions required for the morphological processing, we present the idea of using the silicon functional device, v-MOS FET. We designed sample cell circuits for several morphological processings, and simulated their operation to show the expected cell operation. We also designed a sample cellular-automaton circuit using the proposed cell circuits, and demonstrated in simulation its example processing (noise cleaning and edge extraction in an Image). A low dissipation of about 20 mu W per cell circuit can be expected at 1 MHz operation; therefore, 10(5) or more cells that operate in parallel can be integrated into an LSI. (C) 1998 Elsevier Science Ltd. All rights reserved.
picture processing v-mos fet cellular automaton