Circuit simplification for the symbolic analysis of analog integrated circuits
This paper presents a circuit simplification method for the symbolic analysis of a linear or linearized (small-signal) analog circuit. Its goal is to generate simplified signal flow graphs describing the circuit's behavior in well-defined frequency intervals. These frequency subranges are automatically constructed based on numerical calculation of the system's poles and zeroes. The circuit reduction has been implemented using graph manipulation techniques. The order in which these manipulations are applied is based on a tradeoff between the error and the level of simplification they introduce. The technique can be used to symbolically localize poles and zeroes and inspect their observability. This allows generating symbolic expressions for poles and zeroes, which in optimal conditions lead to simple, interpretable expressions. The technique can also be used as preprocessor to simplify a circuit before analyzing it with standard approximate symbolic analysis techniques. In that case, it helps overcoming the time and memory constraints related to those techniques. Experimental results show the effectiveness of the approach.
symbolic analysis circuit model reduction pole-zero extraction