An all-digital self-calibrated delay-line based temperature sensor for VLSI thermal sensing and management
A self-calibration method for multiple delay-line based temperature sensors. The self-calibration removes sensitivities to process and voltage supply variations. The sensors were verified experimentally on 65nm, 60nm FPGAs, 65nm and 0.13m ICs. One calibration block calibrates as many sensors, requiring additional NC registers. The runtime thermal profiles of the four microprocessor cores were obtained.
self-calibration delay lines digital temperature sensor field programmable gate arrays power management thermal management