power optimization for universal hash function data path using divide-and-concatenate technique
We present an architecture level low power design technique called divide-and-concatenate for universal hash functions based on the following observations: (i) the power consumption of a w-bit array multiplier and associated universal hash data path decreases as O(w 4 ) if its clock rate remains constant. (ii) two universal hash functions are equivalent if they have the same collision probability property. In the proposed approach we divide a w-bit data path (with collision probability 2 - w) into two/four w/2-bit data paths (each with collision probability 2 -w /2) and concatenate their results to construct an equivalent w-bit data path (with a collision probability 2 -w ). A popular low power technique that uses parallel data paths saves 62.10\% dynamic power consumption incurring 102\% area overhead. In contrast, the divide-and-concatenate technique saves 55.44\% dynamic power consumption with only 16\% area overhead.
power optimization universal hash function divide-and-concatenate