The design and optimization methodology of a low-distortion sub-?W ? W sample-and-hold stage for weak bio-currents
Current sample-and-hold (SHI) stage is important for reducing the signal distortion of bio-medical current detectors. Previous SHIs achieve high linearity only with high power consumption. This paper introduces a low-distortion switched-current (SI) sample-and-hold stage for high-performance current sampling of weak currents, by applying constant charge injection on a weakly inverted MOS transistor. The paper also introduces a methodology to design and optimize the SHI for a target signal-to-noise-distortion ratio (SNDR). A sample SHI is designed according to the methodology in a 0.35 ? m CMOS process. Silicon measurements verify that the fabricated SHI meets the design targets, and can achieve above 58dB SNDR and above 68dB spurious-free dynamic range (SFDR) at the sampling rate of 2kS/s for a 100nA input current up to 1kHz. The power consumption of the SHI is only 0.7 ? W .
switched-current circuits current sample/hold micro-power analog circuits circuit optimization