green transistors to green architectures
This talk will highlight different generations of energy-efficient device architectures that enable aggressive supply voltage reduction. First, we will discuss the impact of the introduction of a new gate stack with high-K dielectrics and the use of multigate control structures. Next, we will show that incorporation of ultra-high mobility compound (III-V) semiconductors along with corresponding changes in the device channel structure enables supply voltage reduction to below 500mV. Further reduction in the supply voltage to below 250mV range can be achieved through abrupt turn-on exploiting the phenomena of inter-band tunneling in novel vertical transistor architectures. The second part of this talk will focus on new challenges and opportunities in designing circuits and architectures using these emerging device architectures
transistor design performance