A new IDDT test approach and its efficiency in covering resistive opens in SRAM arrays
Novel dynamic supply current approaches are presented in order to unveil resistive open defects. The probability of open defect distribution in SRAMs was estimated. The efficiency of presented approaches in covering open defects is verified on a 4096-bit SRAM array. The effect of the leakage current on the power supply voltage, and efficiency is investigated.
sram arrays open defects dynamic supply current test six transistor sram cell delta iddt