optimized generation of vhdl mutants for injection of transition errors
Fault injection in VHDL descriptions has become an efficient solution to analyze at an early stage of the design the potential faulty behaviors of a complex digital circuit. Such injections may use either saboteurs or mutants. In this paper, the focus is placed on "controlled generation" of mutants, which means that the generation of mutants is (1) done for precise fault/error models related to faults occurring in the field and (2) optimized for synthesis onto emulation hardware. Several approaches are proposed to inject transition errors in FSMs or RT-level control flowcharts. These approaches are compared and the results show the impact of the mutant generation on the result efficiency.
optimized generation vhdl mutants errors vhdl descriptions faulty behaviors complex digital circuit controlled generation error models emulation hardware fsm rt-level control flowcharts hardware description languages fault emulation transition errors injection fault diagnosis logic cad finite state machines fault tolerant computing fault models