CORDIC-based direct digital frequency synthesizer: Comparison with a ROM-based architecture in FPGA implementation
This paper describes a CORDIC-hased direct digital frequency synthesizer in comparison with a ROM-based architecture. To optimize the hardware design parameters, we perform numerical analysis of the quantization effects for ROM and CORDIC-based architectures, The hardware costs of them are estimated in FPGA. which shows that the CORDIC-based architecture becomes better than the ROM-based when the required accuracy is 9 bits or more.
fpga cordic ddfs (direct digital frequency synthesizer) sine generation