Cellular Automata and Power Consumption
Cellular Automata (CAs) are a computational tool for modeling complex phenomena. CAs can be simulated exactly by computers and algorithms based on CAs are ideally suited for hardware implementation, clue to their discreteness and their simple, regular and modular structure with local interconnections. On the other hand, power dissipation is recognized as a critical parameter in modern VLSI design field. As a result, the study of the undergoing relationship between CA algorithms and the corresponding power consumption could he considered as a matter of importance for their VLSI design analysis with many promising aspects. In this paper, different point of views on power consumption and CAs will be presented. First of all, a power estimation model for combinational logic circuits using CA and focused on glitching estimation is presented in order to elucidate the application of CA model to VLSI power dissipation measurements. The presented simulation results prove the robustness of the aforementioned model. On the other hand, the power consumption of CA based logic circuits and namely of 1-d CAs rules logic circuits is investigated in details. More specifically, CMOS power consumption estimation measurements for the entireness of 1-d CAs rules as well as entropy variation measurements were conducted for various study cases and different initial conditions.
cellular automata power estimation cmos power consumption estimation entropy variation "green" circuit design