high level techniques for power-grid noise immunity
Power-grid networks are very important aspects of large scale integrated systems. In the modern deep sub-micron era these networks are prone to many sources of noise hence making the voltage supply uctuate. This Vdd-Ground noise can have detrimental effect on design quality. This paper presents a unique strategy of achieving noise immunity through voltage scheduling in Data Flow Graphs (DFGs). A dynamic programming based approach is applied to obtain noise immunity by imposing a grid on the voltage axis. We also present a unique way of including resource binding information into the algorithm. Experimental results indicated that considerable amount of Vdd-noise immunity is achieved for the selected benchmarks.
high-level noise-immune optimization