Variation in process conditions of porogen-based low-k films: A method to improve performance without changing existing process steps in a sub-100nm Cu damascene integration route
This article describes less explored solutions to improve interconnect performance without changing established steps (etch, strip, clean, CMP) in a sub-100nm integration route. Process conditions of the porogen-based low-k are adjusted by (1) varying the curing time (2) adding a thermal anneal step prior to CuO reduction or (3) depositing a capping layer on top of the low-k after curing. The low-k material examined in this study is Aurora ELK HM (k?2.5). The integration process was robust against these variations, showing good electrical yield for all process splits. RC-product was improved when using a shorter curing time and when an anneal step prior to CuO reduction was performed. The use of a thicker capping layer decreased capacitance, showing an improved protection against damage.
low-k cure time anneal capping layer porogen process variation