A 1 V second order sigma-delta modulator
A second order switched capacitor sigma-delta modulator operating at a supply voltage of 1 V is presented. This low supply voltage restricts the gate overdrive voltage available for switching transistors. The design relies on the elimination of critical switches by using a modified switched op amp for the integrator and novel switched half-supply and reference voltage generators. The design has been carried out in a fully differential configuration in order to minimize errors arising from charge injection and clock-feedthrough effects. The converter has been implemented using a conventional 0.8 mum double-poly double-metal CMOS process, having a nominal threshold voltage of 0.75 V. Test results, showing more than 9 bits of resolution with an oversampling ratio of 64, are also presented.
sigma-delta modulation low voltage cmos circuits sc circuits