A simulation based analysis of cycle time distribution, and throughput in semiconductor backend manufacturing
This paper presents a preliminary analysis of the relationship between selected input and output variables in semiconductor backend manufacturing system, using a data driven discrete event simulation model. This study is of interest and importance for a better understanding of the controllable input variables in an effort to reduce factory cycle time and distribution. Our analysis quantifies the effect of varying the input variables of lot release controls, heuristic machine dispatching rules, elimination of selected processes, material handling time, set-up time, and machine up time on selected output variables of throughput, cycle time and cycle time spread. Simulation model of a semiconductor site based in Singapore is used as the base case and the effects are quantified against the base model. (C) 2001 Elsevier Science B.V. All rights reserved.
simulation cycle time distribution throughput 98 percentile cycle time lot release scheduling semiconductor manufacturing