Methodology for ensuring high reliability of VLSI systems
As the complexity and density of VLSI systems increase, the logical test of systems based on stuck-at fault model is not sufficient to guarantee the high reliability of the system. Recently, a new test approach based on current monitoring, called I-ddq test, becomes very important since it can overcome limitations of the conventional logic test. In this work, intra-gate bridge fault is defined and analyzed, and a theorem for full detection of the intra-gate bridge faults is presented. The proposed algorithm can be used effectively for testing highly reliable systems such as ATM switches and electronic equipments of automobiles and airplanes.
reliability current monitoring bridge faults