Algorithmic methodologies for FPGA-based vision
This paper proposes a strategy for the design of computer vision on Field Programmable Gate Arrays (FPGAs). We show that there are certain advantages to the approach of designing an algorithm to specifically suit hardware rather than attempting to replicate the behavior of software implementations in hardware. We justify this approach through the analysis of two case studies. In the first case study, we present FPGA implementations of two corner detectors. We make a number of observations which point to the advantages of an FPGA-tailored algorithm. In the second case study, we investigate the feasibility of this approach by designing a proof-of-concept face detection algorithm that was designed specifically for an FPGA. We show that this design allows for high detection speed on a low-cost FPGA device, although the same algorithm would not be considered in software. Finally, we conclude that FPGAs offer special opportunities for specialized algorithms that are infeasible in software.
fpga hardware parallel processing embedded systems