A Novel Low Voltage Low Power High Linearity Self-biasing Current-reuse Up-conversion Mixer
In this paper, a new complementary metal oxide semiconductor (CMOS) low-voltage low-power current-reuse up-conversion mixer using Chartered \(0.18\,\upmu \hbox {m}\) CMOS process for radio frequency transmitter applications is presented. A novel self-biasing current-reuse (SBCR) technique is adopted to achieve more ideal conversion gain (CG) and third-order intermodulation intercept point \((\hbox {IIP}_{3})\) in the transconductance stage with minimal additional power consumption, which perfects the mixer than conventional Gilbert mixer. As the new SBCR technique employed in the mixer, the post-layout simulation results demonstrate that the SBCR-mixer features about 13dB CG with 0dBm local oscillator (LO) power and port-to-port isolation better than 84dB, while noise figure is 15.66dB. The \(\hbox {IIP}_{3}\) and 1dB compression point of the mixer are 7.78dBm and \(-\)3.76dBm at 1.41mW power consumption from a 1V supply voltage. The chip area is only \(0.70 \times \,0.72\,\hbox {mm}^{2}\) even including test pads.
low voltage low power self-biasing current-reuse mixer cmos radio frequency