performance measurements on hep - a pipelined mimd computer
A pipelined implementation of MIMD operation is embodied in the HEP computer. This architectural concept should be carefully evaluated now that such a computer is available commercially. This paper studies the degree of utilization of pipelines in the MIMD environment. A detailed analysis of two extreme cases indicates that pipeline utilization is quite high. Although no direct comparisons are made with other computers, the low pipeline idle time in this machine indicates that this architectural technique may be more beneficial in an MIMD machine than in either SISD or SIMD machines.
performance measurement pipeline computation implementation embodied architecture concept paper environments analysis direct timing