On the relation between the throughput gain with slot reuse and the number of address bits in the dual bus configuration Part 1: Maximum throughput
in slotted, dual bus systems, M stations are connected to two unidirectional buses in a linear order and transmissions. use slots passing through the stations. If a slot is used by a station i to transmit to a station j, j > i, then the slot can be reused by a station k, k greater than or equal to j. In order to enable full slot reuse, with one bit delay at the stations, addresses must contain M - 2 bits. In view of this overhead we compute the maximum throughput gain, in terms of the total number of stations transmissions, when addresses are M - 2 - gamma bits long, 0 less than or equal to y less than or equal to M - 2 - [log(M - 1)]. The results show that for y > 0 and for M : 100 the throughput loss due to the partial slot reuse is up to 13%. However, when addresses are shortened, stations can sometimes transmit more information bits in a given number of bits passing on the bus despite the reduced number of transmissions. For example, for M = 100 and a payload of 20 bytes, stations can transmit up to 77% more information bits than in the case of full slot reuse. The computation of the throughput gain is based on dynamic programming with pseudo-polynomial complexity O(M + y(3)).
slot reuse dual bus maximum throughput dynamic programming destination release