Simple super-matrix processor: Implementation and performance evaluation
Proposing simple matrix processors for data-parallel applications. Extending the scalar ISA by vector and matrix instruction sets. Describing two microarchitectures for simple matrix processors: SMP and SSMP. Implementing our proposed SMP and SSMP using VHDL. Evaluating the performance of SMP and SSMP on vector/matrix kernels.
performance evaluation data-parallel applications fpga implementation vector/matrix processing