architecture implementation using the machine description language lisa
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design implementation. The LISA processor design platform LPDP based on machine descriptions in the LISA language provides one common environment for these design phases. Required software tools for architecture exploration and application development can be generated from one sole specification. This paper focuses on the implementation phase and the generation of synthesizable HDL code from a LISA model. The derivation of the architectural structure, decoder and even approaches for the implementation of the data path are presented. Moreover, the synthesis results of a generated and a handwritten implementation of a low-power DVB-T post processing unit are compared.
architecture implementation language lisa developer applications instruction processor process design exploration software tools systems verification platform environments application development generation paper synthesis code model structure decode data vhdl verilog systemc asip low power