strategies for structuring two level memories in a paging environment
The strategies for effective structuring of data and program code in a two level, directly addressable paged memory system are presented along with the experience gained from deriving and implementing appropriate algorithms in one time-shared system. The experience indicated that a reduction in the paging rate can result through the addition of a slower second-level bulk memory thus leading to improved performance. While improved techniques for structuring these memories coupled with faster and / or cheaper bulk memories offer further improvements in performance, reduction in the paging overhead might offset some of these performance advantages.
strategies structure memorialized paging environments effect data code memory system systems experience algorithm reduction performance sharing timing