Surfing: a robust form of wave pipelining using self-timed circuit techniques
This paper presents surfing, a novel variation of wave pipelining. In previous wave pipelined designs, timing uncertainty grows monotonically as data propagates through gates and other logic elements. Our designs propagate a timing pulse along with the data values, and our logic elements have delays that decrease in the presence of the pulse. This produces a surfing effect wherein events are bound in close proximity to the timing pulse. This produces a robust variant of wave-pipelining where timing dispersion is bounded regardless of the length of the pipeline. We demonstrate our approach with the design of a simple proof-of-concept chip.
timing wave-pipelining asynchronous circuits domino logic dynamical systems