fault simulation of digital logic utilizing a small host machine
This paper describes a simulation system for use in the generation of test programs for logic networks. This system was designed and implemented by Telpar, Inc. specifically for use in providing a commercial service for the generation of digital test programs. The simulator described here was originally written in the fall of 1970, and has been in constant use since. There have been more or less continuous improvements, but the basic system has remained unchanged since its original implementation.
fault simulation digitize logic paper systems use generation test program network implementation continuation