energy-efficient renaming with register versioning
We propose an energy-efficient implementation of register renaming mechanism for high-performance superscalar microprocessors. We use version numbers to identify various instances of each architectural register. This enables the use of an unified register file to hold the current instances of an architectural register and its committed value in a shadow bitcells and to simplify register renaming and register management. Across the SPEC 2000 benchmarks, the proposed mechanism comes within 6\% of the performance of a traditional out-of-order design. An average savings of 20\% on the energy spent in renaming, register management and instruction commitment is realized compared to a traditional design.
register renaming microprocessor