pseudo-exhaustive word-oriented dram testing
This paper presents a new methodology for RAM testing based on the PS(n,k) q-ary fault model (q=2/sup w/) which includes most classical fault models for SRAMs and DRAMs. According to this fault model, the contents of any w-bit memory word of a memory with n words, or ability to change this contents, is influenced by the contents of any other k-1 words of the memory. The proposed methodology uses a pseudo-exhaustive technique based on Reed-Solomon codes, which can be efficiently applied to a word-oriented RAMs, assuming small values of k. The methodology ensures the detection of any number of disjoint (not linked) k-coupling faults, whereby the involved k words may be located anywhere in the memory; i.e., no assumptions have to be made on the physical topology of the cells in the memory cell array because of the systematic structure of the proposed tests, they are well suited for BIST implementations.
word-oriented dram testing fault model pseudo-exhaustive technique reed-solomon codes memory cell array bist implementations fault diagnosis rs codes dram chips built-in self test integrated circuit testing