A fuzzy RISC processor
In this paper, we describe application-specific extensions for fuzzy processing to a general purpose processor, The application-specific instruction set extensions were defined and evaluated using hardward/software codesign techniques. Based on this approach, we have extended the MIPS instruction set architecture with only a few new instructions to significantly speed up fuzzy computation with no increase of the professor cycle time and with only minor increase in chip area. The processor is implemented using a reconfigurable processor core which was designed as a starting point for application-specific processor designs to be used in embedded applications. Performance is presented for three representative applications of varying complexity.
fuzzy processing application-specific instruction set reconfigurable processor core fuzzy systems hardware/software codesign subword parallelism