Power Mapping of Integrated Circuits Using AC-Based Thermography
Post-silicon power validation is an important step in integrated circuit design and fabrication flow. It involves runtime power characterization of a fabricated chip under realistic loadings. The most versatile procedure for post-silicon power characterization involves capturing the thermal emissions from the back of the die and inverting the captured images to get power estimates. This process faces two major challenges: the spatial heat diffusion effect, which blurs the underlying power map, and measurement noise in the thermal imaging system. In this paper, we propose to use ac-based thermography, where ac excitation signals are applied to the chip instead of dc excitation signals, to improve post-silicon power mapping. We show that using ac excitation reduces the impact of flicker noise and spatial heat diffusion, which translates to significant improvements in power mapping accuracy. We perform a number of experiments using a test chip that can be programmed to control spatial and temporal power consumption. We use the test chip to analyze the noise in our thermal imaging system, and to quantify the improvements in power mapping attained from the proposed ac-based methodology. We elucidate the impact of the ac excitation frequency on both the signal-to-noise ratio and power mapping accuracy. We also demonstrate the basic applicability of our technique on a dual-core processor.
power mapping infrared imaging post silicon validation