POWER REDUCTION IN ADVANCED EMBEDDED IPC PROCESSORS
Nowadays, embedded systems are found in a wide range of pervasive devices (e.g., smart phones, PDAs. or digital cameras). These devices contain large cache memories. whose power consumption can reach about 50% of the total spent energy. front which leakage energy is the predominant fraction in current technologies. This paper proposes a technique to reduce leakage energy consumption in data caches on embedded systems, which is based on the fact that most stored bits take a logical value of zero. The proposed technique has been evaluated on a model of a contemporary high-end ARM embedded microprocessor executing a set of standard embedded benchmarks. and used in a number of pervasive devices (i.e. Nokia N95. FITC TN II. Qualcomm MSM7200, Sony Ericsson W series. Nintendo DS, iPod, Lego NXT). Experimental results show that leakage energy savings reach about 80% with no IPC loss.
cache memory leakage energy embedded architecture pervasive processors low power