analog circuit test based on a digital signature
Production verification of analog circuit specifications is a challenging task requiring expensive test equipment and time consuming procedures. This paper presents a method for low cost on-chip parameter verification based on the analysis of a digital signature. A 65 nm CMOS on-chip monitor is proposed and validated in practice. The monitor composes two signals ( x ( t ), y ( t )) and divides the X-Y plane with nonlinear boundaries in order to generate a digital code for every analog ( x, y ) location. A digital signature is obtained using the digital code and its time duration. A metric defining a discrepancy factor is used to verify circuit parameters. The method is applied to detect possible deviations in the natural frequency of a Biquad filter. Simulated and experimental results show the possibilities of the proposal.
monitoring specification verification nonlinear zone boundary mixed-signal test