combined architecture and hardening techniques exploration for reliable embedded system design
This paper proposes an approach for hardening embedded systems that combines the identification of the most convenient architecture and the set of application-level fault management techniques, fulfilling reliability requirements and maximizing performance. A Design Space Exploration approach is proposed; it extends existing solutions by taking into account different heterogeneous computing resources, thus enriching the traditional scenario of the fixed a-priori architecture. Experimental results on synthetic examples and a real case-study are reported to show the benefits of the approach extended to the architectural resources.
design space exploration reliability-aware system-level design reliability-oriented techniques