A power-efficient 2-dimensional on-chip eye-opening monitor for Gbps serial links
This paper investigates the drawbacks of widely used rectangular eye-opening monitors (EOMs) and proposes a new power-efficient half hexagon EOM for Gbps serial links. The proposed EOM outperforms rectangular EOMs by providing a better control of data jitter at the edge of data eyes and by eliminating unnecessary errors flagged by rectangular EOMs. The effectiveness of the proposed EOM is evaluated using a serial link implemented in IBM 130 nm 1.2 V CMOS technology. For purpose of comparison, rectangular EOMs with the same data link are also designed and evaluated. The data links are analyzed using Spectre from Cadence Design Systems with BSIM 4 device models. Simulation results demonstrate that the proposed EOM provides a better detection of the violation of the minimum eye-opening mask over temperature range -20 to 80 degrees C and at all process corners as compared with rectangular EOM, with 50 % reduction in power and silicon consumption.
eye-opening monitors gbps serial links inter-symbol interference