system partitioning to maximize sleep time
Abstract: Partitioning of a system to maximize exploitable sleep time for low-power synthesis is discussed. The motivation is to deactivate the memory refresh circuitry, apply power down or disable the clock signals during the inactive periods of operation of circuit elements, and thus minimize the power consumption. Since it is impractical to have a separate set of control signals for each circuit element (otherwise, the control itself would consume a lot of power), it is advisable to partition a circuit based on the activity patterns of its elements so that the partitions can be switched into sleep mode for long periods of time. In this paper, we formulate this partitioning problem and show that it is NP-hard. We present Geo-Part, a geometric partitioning heuristic for this problem. An efficient implementation of Geo-Part using segment tree data structure is discussed. Experimental results are encouraging.
systems system partitioning partition timing abstraction exploitable sleep time low-power synthesis synthesis motivation activation memorialized memory refresh circuitry circuits power clock signaling power consumption control pattern paper partitioning problem geo-part geometric partitioning heuristic heuristics efficiency implementation segmentation segment tree data structure tree data structures experimentation circuit optimisation integrated circuit design low power logic partitioning logic cad circuit cad vlsi