Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm
This paper presents a simulation-based analog circuit synthesis methodology. Simulation-based approach is preferred so that the synthesizer, SACSES, is topology independent and requires minimal user effort. We argue that both the simulator and the search algorithm have to be optimized for analog circuit synthesis. In this regard, instead of using a commercially available simulator, an accelerated simulator, SPASE, is implemented. Various acceleration mechanisms for DC, AC and noise simulation are discussed. For example, it is shown that taking the previous DC solution as the starting point of the next DC analysis more than halves the number of iteration required for convergence. A modified version of self-adaptive evolutionary strategies, which incorporates the Metropolis criterion in the selection mechanism, is used as the search algorithm. Smooth penalty mechanisms for biasing constraints are proposed and embedded in the algorithm. Usefulness of the tool is validated by three synthesis examples.
evolutionary strategies analog circuit synthesis penalty mechanisms normalization functions