Switched-loop filter for automatically frequency-calibrated phase-locked loops
A novel switched-loop filter, which can significantly reduce ripples on voltage controlled oscillator (VCO) control line, is proposed for phase-locked loops (PLL) with an automatic frequency calibration technique. Complementary bootstrapped transmission gates are utilized and rearranged clocks are generated to improve the performance of loop filter. Based on the SMIC 65nm RF CMOS process, the proposed switched-loop filter applicable to 0.8V to 6GHz PLL with automatic frequency calibration technique is designed. Transistor level simulation results in SPECTRE show that using the proposed switched-loop filter, ripples at VCO control line are reduced down to 2mV and the phase noise of PLL is ?136.4dBc/Hz at 1MHz offset. Compared with the PLL using conventional loop filter, the control voltage ripples and the phase noise are improved by 98.8% and 29.7dB, respectively.
switched-loop filter ripples pll