A parallel transparent BIST method for embedded memory arrays by tolerating redundant operations
In this paper. the authors propose a new transparent built-in self-test method to test in parallel multiple embedded memory arrays with various sizes. First, a new transparent test interface is designed to perform testing in the normal mode and to cope with test interrupts in a real-time manner. The circular scan test interface facilitates the processes of both test pattern generation and signature analysis. By tolerating redundant read/write/shift operations, we develop a new march algorithm called TRSMarch to achieve the goals of low hardware overhead, short test time, and high fault coverage. It can be proved that TRSMach can detect all stuck-at faults, all transition faults, and each coupling fault occurring in different words. For each coupling fault occurring in the same word, depending on the coupling ope and effect, it can be detected or its detection probability can be high as more transparent processes are executed. TRSMarch can be easily extended to deal with more faults such as single-cell read destructive faults and read destructive coupling faults.
transparent test test interrupt march operations memory fault model memory test