Integrated time-to-digital converters based on interpolation
The main features of two time-to-digital converters based on interpolation are presented, together with some measurement results. The first converter is based on digital delay line interpolators and has been implemented in a 1.2 mu m CMOS process. It has a single-shot resolution of 1 ns (sigma-value) and a nonlinearity less than +/-50 ps in the measurement range 5 to 500 ns. The power consumption of the circuit is 15 mW. The second time digitizer has analog interpolators based on time-to-voltage conversion and has been implemented in a 1.2 mu m BICMOS process. It has a single-shot resolution of 50 ps and a nonlinearity less than 150 ps in the measurement range 1 to 300 ns. The power consumption of this circuit is 200 mW.
time-to-digital converter interpolation delay line time-to-voltage conversion time measurement