architectural exploration for datapaths with memory hierarchy
In this paper, we present a new design-space exploration algorithm, the architecture explorer (AE), for analyzing performance/cost tradeoffs in memory-intensive applications. AE evaluates FU, bus, and memory cost for a series of performance constraints to produce a performance/cost tradeoff curve. Unlike previous approaches, AE handles both hierarchical and non-hierarchical memory architectures with various speeds of memory.
architecture explorer architecture explorer datapaths memory hierarchy design-space exploration algorithm performance/cost tradeoffs memory-intensive applications memory cost performance constraints memory architecture memory architecture hardware description languages high level synthesis functional units memory architectures architectural exploration design automation