Shared hardware, high throughput implementation of 2D 44 and 88 integer transform for H.264/AVC high-profile coders ?
Two-dimensional discrete cosine transforms are used in the core transformations in all profiles of the H.264/Advanced video coding (AVC) standard. In this paper, implementing the resource sharing of high throughput 44 and 88 forward and inverse integer transforms for high definition H.264 is presented. It is shown that the 44 forward/inverse transform can be obtained from 88 forward/inverse transform using selective data input and data arrangement at intermediate stages. Fast 88 forward and inverse transform is implemented using matrix decomposition and matrix operation such as Kronecker product and direct sum. The proposed implementation does not require any transpose memory and has a dual clocked pipeline structure. Compared with existing designs, the gate count is reduced by 27.7% in the proposed design. The maximum operating frequency of the proposed system is approx. 1.3GHz, while the throughput is 7G and 18.7G pixels/s for 44 and 88 forward integer transforms, respectively. The proposed design can be used for real time H.264/AVC high definition processing owing to its high throughput and low hardware cost.
integer transform h.264/avc resource sharing dct dual clock architecture idct low cost