Pre-order Deficit Round Robin: a new scheduling algorithm for packet-switched networks ?
In recent years, many packet fair queueing algorithms have been proposed to approximate generalized processor sharing (GPS). Most of them provide a low end-to-end delay bound and ensure that all connections share the link in a fair manner. However, scalability and simplicity are two significant issues in practice. Deficit Round Robin (DRR) requires only O(1) work to process a packet and is simple enough to be implemented in hardware. However, its large latency and unfair behavior are not tolerated. In this work, a new scheme, Pre-order Deficit Round Robin, is described, which overcomes the problems of DRR. A limited number, Z, of priority queues are placed behind the DRR structure to reorder the transmission sequence to approximate packet by packet generalized processor sharing (PGPS). We provide an analysis on latency and fairness, which shows our scheme as a better alternative to DRR. In most cases PDRR has a per-packet time complexity of O(1), and in other specific cases. Simulation results are also provided to further illustrate its average behavior.
deficit round robin fair queueing packet scheduling