scheduling-based code size reduction in processors with indirect addressing mode
DSPs are typically equipped with indirect addressing modes with auto-increment and auto-decrement, which provide efficient address arithmetic calculations. Such an addressing mode is maximally utilized by careful placement of variables in storage, thereby reducing the amount of address arithmetic instructions. Finding proper placement of variables in storage is called storage assignment problem and the result highly depends on the access sequence of variables. This paper suggests statement scheduling as a compiler optimization step to generate a better access sequence. Experimental results show 3.6\% improvement on the average over naive storage assignment.
scheduling code code size reduction size reduction processor indirect addressing mode addressing efficiency placement variability storage instruction storage assignment assignment access sequence paper experimentation code generation - compiler optimization