On-chip structures for timing measurement and test
This paper describes time comparison circuits to test on-chip timing parameters to accuracies of better than 10 ps in a 0.6? process. Three methods of time measurement are described. The first uses parallel MUTEXs with a tapped delay line and is analogous to a flash A/D converter. The second is similar to a successive approximation method, and requires less hardware for high accuracy conversion. A third technique uses MUTEX'S to amplify small time differences to a measurable size. We also describe a method of testing set-up and hold times, using uncorrelated signals with known statistics, and selecting the conditions to be tested on-chip.
time measurement set-up time on-chip test timing margins