Unified data path allocation and BIST intrusion ?
This paper deals with an approach to the automatic synthesis of self-testable data paths. A self-testable data path contains some test registers that increase its area. Classical approaches synthesizing minimum area data paths and then adding minimum number of test registers to it do not lead to data paths with minimum global area. Testability consideration during synthesis makes design search more efficient and hence can possibly find self-testable data paths with minimum area. We present a model to evaluate the testability of data paths that is used when data path allocation is being done. Moreover, we propose some heuristics that guide the design space search during allocation, to save exploration time. When each allocation decision has to be made, an implementation alternative is chosen according to the area and testability increments that the alternative produces, so that the area is only increased when the testability gain is worth it.
high-level synthesis for testability synthesis for bist automatic synthesis of testable data paths allocation of testable data paths