A study on the Pt electrode etching for 0.15 ?m technologies
We have developed a high temperature Pt etching by using a titanium (Ti) mask layer in oxygen (O2)-containing plasma. The high temperature Pt etching technique has been employed to fabricate a stacked capacitor with a critical dimension (CD) of 0.15 ?m. Due to reactive ion etching (RIE) lag, the Pt etch rate decreased drastically below the CD of 0.20 ?m and, thus, the storage node electrode with the CD of 0.15 ?m could not be fabricated. Accordingly, we have proposed novel techniques to surmount the above difficulties.
pt etching cd rie lag