Characterizing, modeling, and analyzing soft error propagation in asynchronous and synchronous digital circuits
Analysis of soft error propagation in asynchronous and synchronous digital designs. Modeling electrical and logical masking at gate level by utilizing MDG and GP sets. Identification of soft error propagation critical inputs sequences. Faster, efficient, and more accurate estimation of the soft error rate (SER).
soft errors asynchronous mdg ser higher abstraction level segp-finder