Investigation of the electrical behavior of an asymmetric MOSFET
In this study a possible approach for improving breakdown voltage while maintaining fT for a MOSFET, is presented. In a conventional MOSFET process with LDD the S/D is implanted with a large tilt angle, which gives an asymmetry due to the shadowing effect by the gate. This asymmetry results in a longer drain-LDD region, which in combination with a lower LDD dose, could reduce the electrical field near the drain pinch-off region. A simulation study for different LDD doses and angles has been performed. It is shown that there exist an optimum range of LDD doses where the asymmetric device has higher figure-of-merit, concerning breakdown voltage and cut-off frequency, than the symmetric MOSFET structure.
asymmetric mosfet ldd tilted implantation