Asymmetric digital subscriber line access multiplexerarchitecture design and implementation
In this paper, we propose the system architecture and implementation of a medium-size Digital Subscriber Line Access Multiplexer (DSLAM). When designing a DSLAM system, the UNI signaling capability, the ATM layer OAM function, the VPI/VCI translation, and the cell multiplexing should be considered. A novel backplane architecture is designed for traffic concentration in the DSLAM, which provides a platform for function integration of other access technologies. On each circuit board, FPGA is designed to provide cell header translation, buffering, and routing functions, thus fast prototyping can be achieved. An experimental Asymmetric Digital Subscriber Line-based access network is setup to perform the integration test and some results are shown in this paper.
asymmetric digital subscriber line digital subscriber line access multiplexer multiplexer atm