A 3-A CMOS low-dropout regulator with adaptive Miller compensation
A 3-A CMOS low-dropout regulator (LDO) is presented by utilizing adaptive Miller compensation (AMC) technique, which provides high stability, as well as fast line and load transient responses. The proposed LDO has been fabricated in a standard 0.5 mu m CMOS technology, and the die area is small as 1330 mu m x 1330 mu m with the area-efficient waffle layout for power transistors. Both load and line regulation are less than +/- 0.1%. And the output voltage can recover within 80 mu s for full load changes. The power-supply rejection ratio (PSRR) at 20 KHz is -30 dB. Moreover, it is stable enough with a ceramic capacitor small to 2.2 mu F, and the added series resistance is not needed.
low-dropout regulator adaptive miller compensation loop-gain stability waffle power transistors