automated design of tunable impedance matching networks for reconfigurable wireless applications
In this paper, we develop a generalized automated design methodology for tunable impedance matching networks in reconfigurable wireless systems. The method simultaneously determines the fixed and tunable/switchable circuit element values in an arbitrary-order canonical filter for a general set of performance constraints over a discrete or continuous set of operating frequencies and source/load impedances. To solve the filter design problem, we combine deterministic nonlinear constrained optimization using Sequential Quadratic Programming with a systematic constraint relaxation approach to facilitate convergence. Using the proposed methodology, we successfully generate three different reconfigurable impedance matching networks with performance requirements that would be difficult to realize using manual design techniques.
impedance matching network analog synthesis tunable filter