Real-time fault-tolerance with hot-standby topology for conditional sum adder
We have designed a fault tolerant CSA using dynamic reconfiguration. The design has inbuilt online fault detection and reconfiguration capability. Test complexity is minimized and is independent of the size of the CSA. The method is area efficient with respect to TMR and other conventional techniques. The design is cascadable making it possible to increase number of bits of the CSA.
hot-standby conditional sum adder fault tolerant defect avoidance dynamic recovery graceful degradation