compiler optimization of memory-resident value communication between speculative threads
Efficient inter-thread value communication is essential for improving performance in Thread-Level Speculation (TLS). Although several mechanisms for improving value communication using hardware support have been proposed, there is relatively little work onexploiting the potential of compiler optimization.Building on recent research on compiler optimization of scalar value communication between speculative threads, we propose compiler techniques for the optimization of memory-resident values.In TLS, data dependences through memory-resident values aretracked by the underlying hardware and preserved by reexecutingany speculative thread that violates a dependence; however, reexecution incurs a large performance penalty and should be usedonly to resolve data dependences that are infrequent. In contrast,value communication for frequently-occurring data dependencesmust be very efficient.In this paper, we propose using the compiler to first identifyfrequently-occurring memory-resident data dependences, then insert synchronization for communicating values to preserve thesedependences. We find that by synchronizing frequently-occurringdata dependences we can significantly improve the efficiency ofparallel execution. A comparison between compiler-inserted andhardware-inserted memory synchronization reveals that the two techniques are complementary, with each technique benefitting different benchmarks.
compilation optimality value value communication speculating thread efficiency performance thread-level speculation hardware support research data dependencies paper synchronization comparisons memorialized benchmark values - compiler optimization