placement and routing program for master-slice lsi's
A block placement program and a routing program for inter-block connection of master-slice LSI's are described. The placement program reduces the total expected wire length, by iterative improvements of block placement and gate assignment to blocks. The routing program employs Lee's algorithm basically, and modifications have been made to increase wirability and reduce computer time. The results of applying these programs to several types of LSI's are presented.
placement routing program blocking connection iter assignment algorithm computation timing types slice