0.8?W 12-bit SAR ADC sensors interface for RFID applications
The design and first measuring results of an ultra-low power 12 bit successive-approximation ADC for autonomous multi-sensor systems are presented. The comparator and the DAC are optmised for low power consumption. The power consumption is 0.52?W from a 1.2V supply with a sample clock of 3.125kHz and 0.85?W at 6.25kHz. This gives 136pJ per conversion or 66fJ per conversion step. As per authors knowledge, 66fJ per conversion step is the best reported so far. The ADC was realised in the NXP CMOS 0.14?m technology; the area was 0.35mm2. Only four metal layers were used in order to allow 3D integration of the sensors.
rfid application low power sar adc ultra-low power latched comparator