Analysis of the noise characteristics of CMOS current conveyors
The definition of the current conveyor is reviewed and a multiple-output second generation current conveyor (CCII) is shown to combine the different generations of current conveyors presently existing. Next, noise sources are introduced, and a general noise model for the current conveyor is described. This model is used for the analysis of selected examples of current conveyor based operational amplifier configurations and the noise performance of these configurations is compared. Finally, the noise model is developed for a CMOS current conveyor implementation, and approaches to an optimization of the noise performance are discussed. It is concluded that a class AB implementation can yield a lower noise output for the same dynamic range than a class A implementation. For both the class A implementation and the class AB implementation it is essential to design low noise current mirrors and current sources, and with the class AB design, the current mirror and current source noise can be reduced by using small values of bias current without compromising the maximum available output current.
noise current conveyors current mode circuits