Low-power wake-up receiver with subthreshold CMOS circuits for wireless sensor networks
We developed a wake-up receiver comprised of subthreshold CMOS circuits. The proposed receiver includes an envelope detector, a high-gain baseband amplifier, a clock and data recovery (CDR) circuit, and a wake-up signal recognition circuit. The drain nonlinearity in the subthreshold region effectively detects the baseband signal with a microwave carrier. The offset cancellation method with a biasing circuit operated by the subthreshold produces a high gain of more than 100 dB for the baseband amplifier. A pulse-width modulation (PWM) CDR drastically reduces the power consumption of the receiver. A 2.4-GHz detector, a high-gain amplifier and a PWM clock recovery circuit were designed and fabricated with 0.18-mu m CMOS process with one poly and six metal layers. The fabricated detector and high-gain amplifier achieved a sensitivity of -47.2 dBm while consuming only 6.8 mu W from a 1.5 V supply. The fabricated clock recovery circuit operated successfully up to 500 kbps.
wake-up receiver envelope detector clock and data recovery high-gain amplifier subthreshold operation