F LASH A TTENTION : Fast and Memory-Efﬁcient Exact Attention with IO-Awareness
Abstract
Transformers are slow and memory-hungry on long sequences, since the time and memory complexity of self-attention are quadratic in sequence length.
Approximate attention methods have attempted to address this problem by trading off model quality to reduce the compute complexity, but often do not achieve wall-clock speedup.
We argue that a missing principle is making attention algorithms IO-aware — accounting for reads and writes between levels of GPU memory.
We propose
F LASH A TTENTION , an IO-aware exact attention algorithm that uses tiling to reduce the number of memory reads/writes between GPU high bandwidth memory (HBM) and GPU on-chip SRAM.
We analyze the IO complexity of F LASH A TTENTION , showing that it requires fewer HBM accesses than standard attention, and is optimal for a range of SRAM sizes.
We also extend F LASH A TTENTION to block-sparse attention, yielding an approximate attention algorithm
that is faster than any existing approximate attention method.
F LASH A TTENTION trains Transformers faster than existing baselines: 15% end-to-end wall-clock speedup on BERT-large (seq. length 512) compared to the MLPerf 1.1 training speed record, 3 × speedup on GPT-2 (seq.
length 1K), and 2.4 × speedup on long-range arena (seq.
length 1K-4K).
F LASH A TTENTION and block-sparse F LASH A TTENTION enable longer context in Transformers, yielding higher quality models (0.7 better perplexity on GPT-2 and 6.4 points of lift on long-document classiﬁcation) and entirely new capabilities: the ﬁrst Transformers to achieve better-than
-chance performance on the Path-X challenge (seq.
length 16K, 61.4% accuracy) and Path-256 (seq.
length 64K, 63.1% accuracy).
Introduction
Transformer models [86] have emerged as the most widely used architecture in applications such as natural language processing and image classiﬁcation.
Transformers have grown larger [5] and deeper [87], but equipping them with longer context remains difﬁcult [83], since the self-attention module at their heart has time and memory complexity quadratic in sequence length.
An important question is whether making attention faster and more memory-efﬁcient can help Transformer models address their runtime and memory challenges for long sequences.
Many approximate attention methods have aimed to reduce the compute and memory requirements of attention.
These methods range from sparse-approximation [53, 77] to low-rank approximation [13, 52, 88], and their combinations [3, 9, 96].
Although these methods reduce the compute requirements to linear or near-linear in sequence length, many of them do not display wall-clock speedup against standard attention and have not gained wide adoption.
One main reason is that they focus on FLOP reduction (which may not correlate with wall-clock speed) and tend to ignore overheads from memory access (IO).
In this paper, we argue that a missing principle is making attention algorithms IO-aware [1]—that is, carefully accounting for reads and writes to different levels of fast and slow memory (e.g., between fast GPU on-chip SRAM and relatively slow GPU high bandwidth memory, or HBM [47], Figure
FlashAttention
Memory Hierarchy with Bandwidth & Memory Size
Attention on GPTFlashAttention PyTorch
T i m e ( m s )
Matmul
Mask
Softmax
Dropout
Matmul
FusedKernel
Q: N x d
V: N X d
K T : d x N
Q K T : N x N sm (QK T )V: N x d
Outer Loop
Copy Block to SRAM
Copy
O u t e r L oo p
Copy
I nn
e r
L oo p
Compute Block on SRAM
Output to HBM
Inner Loop
I nn e r L oo p
Outer Loop
[Figure]
left).
On modern GPUs, compute speed has out-paced memory speed [64–66], and most operations in Transformers are bottlenecked by memory accesses [45].
IO-aware algorithms have been critical for similar memory-bound operations, when reading and writing data can account for a large portion of the runtime—such as database joins [74], image processing [73], numerical linear algebra [4], and more [42, 89].
However, common Python interfaces to deep learning such as PyTorch and Tensorﬂow do not allow ﬁne-grained control of memory access.
We propose F LASH A TTENTION , a new attention algorithm that computes exact attention with far fewer memory accesses.
Our main goal is to avoid reading and writing the attention matrix to and from HBM.
This requires (i) computing the softmax reduction without access to the whole input (ii) not storing the large intermediate attention matrix for the backward pass.
We apply two well-established techniques to address these challenges.
(i)
We restructure the attention computation to split the input into blocks and make several passes over input blocks, thus incrementally performing the softmax reduction (also known as tiling ).
(ii) We store the softmax normalization factor from the forward pass to quickly recompute attention on-chip in the backward pass, which is faster than the standard approach of reading the intermediate attention matrix from HBM.
We implement
F LASH A TTENTION in CUDA to achieve ﬁne-grained control over memory access and fuse all the attention operations into one GPU kernel.
Even with the increased FLOPs due to recomputation, our algorithm both runs faster (up to 7.6x on GPT-2 [70], Figure 1 right) and uses less memory —linear in sequence length—than standard attention, thanks to the massively reduced amount of HBM access.
We analyze the IO complexity [1] of F LASH A TTENTION , proving that it requires 𝑂 ( 𝑁 2 𝑑 2 𝑀 − 1 )
HBM accesses where 𝑑 is the head dimension and 𝑀 is the size of SRAM, as compared to Ω ( 𝑁𝑑 + 𝑁 2 ) of standard attention.
For typical values of 𝑑 and 𝑀 , F LASH A TTENTION requires many times fewer
HBM accesses compared to standard attention (up to 9 × fewer, as shown in Fig. 2).
Moreover, we provide a lower bound, showing that no exact attention algorithm can asymptotically improve on the number of HBM accesses over all SRAM sizes.
We also show that F LASH A TTENTION can serve as a useful primitive for realizing the potential of approximate attention algorithms by overcoming their issues with memory access overhead.
As a proof of concept, we implement block-sparse F LASH A TTENTION , a sparse attention algorithm that is 2-4 × faster than even F LASH A TTENTION , scaling up to sequence length of 64k.
We prove that block-sparse F LASH A TTENTION has better IO complexity than F LASH A TTENTION by a factor proportional to the sparsity ratio.
We discuss further extensions to other operations (attention on multi-GPU, kernel regression, block-sparse matrix multiply) in Section 5.
We open-source
F LASH A TTENTION to make it easier to build on this primitive 1 .
We empirically validate that F LASH A TTENTION speeds up model training and improves model quality by modeling longer context.
We also benchmark the runtime and memory footprint of F LASH A TTENTION and block-sparse F LASH A TTENTION compared to prior attention implementations.
• Faster Model Training.
F LASH A TTENTION trains Transformer models faster in wall-clock time.
We train BERT-large (seq. length 512) 15% faster than the training speed record in MLPerf 1.1 [60], GPT2 (seq.
length 1K)
3 × faster than baseline implementations from HuggingFace [91] and Megatron-LM [80], and long-range arena (seq.
length 1K-4K) 2.4 × faster than baselines.
• Higher Quality Models.
F LASH A TTENTION scales Transformers to longer sequences, which improves their quality and enables new capabilities.
We observe a 0.7 improvement in perplexity on GPT-2 and 6.4 points of lift from modeling longer sequences on long-document classiﬁcation [14].
F LASH A TTENTION enables the ﬁrst Transformer that can achieve better-than-chance performance on the Path-X [83] challenge, solely from using a longer sequence length (16K).
Block-sparse F LASH A TTENTION enables a Transformer to scale to even longer sequences (64K), resulting in the ﬁrst model that can achieve better-than-chance performance on Path-256.
• Benchmarking Attention.
F LASH A TTENTION is up to 3 × faster than the standard attention implementation across common sequence lengths from 128 to 2K and scales up to 64K. Up to sequence length of 512, F LASH A TTENTION is both faster and more memory-efﬁcient than any existing attention method, whereas for sequence length beyond 1K, some approximate attention methods (e.g., Linformer) start to become faster.
On the other hand, block-sparse F LASH A TTENTION is faster than all existing approximate attention methods that we know of.
Background
We provide some background on the performance characteristics of common deep learning operations on modern hardware (GPUs).
We also describe the standard implementation of attention.
2.1 Hardware Performance
We focus here on GPUs.
Performance on other hardware accelerators are similar [48, 50].
GPUMemoryHierarchy.
The GPU memory hierarchy (Fig. 1 left) comprises multiple forms of memory of different sizes and speeds, with smaller memory being faster.
As an example, the A100 GPU has 40-80GB of high bandwidth memory (HBM) with bandwidth 1.5-2.0TB/s and 192KB of on-chip
SRAM per each of 108 streaming multiprocessors with bandwidth estimated around 19TB/s [46, 47].
The on-chip SRAM is an order of magnitude faster than HBM but many orders of magnitude smaller in size.
As compute has gotten faster relative to memory speed [64–66], operations are increasingly bottlenecked by memory (HBM) accesses.
Thus exploiting fast SRAM becomes more important.
Execution Model.
GPUs have a massive number of threads to execute an operation (called a kernel).
Each kernel loads inputs from HBM to registers and SRAM, computes, then writes outputs to HBM.
Performance characteristics.
Depending on the balance of computation and memory accesses, operations can be classiﬁed as either compute-bound or memory-bound.
This is commonly measured by the arithmetic intensity [89], which is the number of arithmetic operations per byte of memory access.
Compute-bound: the time taken by the operation is determined by how many arithmetic operations there are, while time accessing HBM is much smaller.
Typical examples are matrix multiply with large inner dimension
and convolution with large number of channels.
Memory-bound: the time taken by the operation is determined by the number of memory accesses, while time spent in computation is much smaller.
Examples include
most
other operations: elementwise (e
g., activation, dropout), and reduction (e
g., sum, softmax, batch norm, layer norm).
Kernel fusion.
The most common approach to accelerate memory-bound operations is kernel fusion: if there are multiple operations applied to the same input, the input can be loaded once from HBM, instead of multiple times for each operation.
Compilers can automatically fuse many elementwise operations [55, 68, 78].
However, in the context of model training, the intermediate values still need to be written to HBM to save for the backward pass, reducing the effectiveness of naive kernel fusion.
2.2 Standard Attention Implementation
Given input sequences Q , K , V ∈ R 𝑁 × 𝑑 where 𝑁 is the sequence length and 𝑑 is the head dimension, we want to compute the attention output O ∈ R 𝑁 × 𝑑 :
[Equation]
where softmax is applied row-wise.
Standard attention implementations materialize the matrices S and P to HBM, which takes 𝑂 ( 𝑁 2 ) memory.
Often 𝑁 (cid:29) 𝑑
(e.g., for GPT2, 𝑁 = 1024 and 𝑑 = 64 ).
We describe the standard attention implementation in Algorithm 0.
As some or most of the operations are memory-bound (e.g., softmax), the large number of memory accesses translates to slow wall-clock time.
This problem is exacerbated by other elementwise operations applied to the attention matrix, such as masking applied to S or dropout applied to P .
As a result, there have been many attempts to fuse several elementwise operations, such as fusing masking with softmax [80].
In Section 3.2, we will show that the standard attention implementation performs HBM accesses quadratic in the sequence length 𝑁 .
We also compare the number of FLOPs and number of HBM accesses of standard attention and of our method (F LASH A TTENTION ).
Require: Matrices Q , K , V ∈ R 𝑁 × 𝑑 in HBM.
F LASH A TTENTION : Algorithm, Analysis, and Extensions
We show how to compute exact attention with fewer HBM reads/writes and without storing large intermediate matrices for the backward pass.
This yields an attention algorithm that is both memory efﬁcient and faster in wall-clock time.
We analyze its IO complexity, showing that our method requires much fewer HBM accesses compared to standard attention.
We further show that
F LASH A TTENTION can serve as a useful primitive by extending it to handle block-sparse attention.
We focus here on the forward pass for ease of exposition; Appendix B contains details for the backward.
3.1 An Efﬁcient Attention Algorithm With Tiling and Recomputation
Given the inputs Q , K , V ∈ R 𝑁 × 𝑑 in HBM, we aim to compute the attention output O ∈ R 𝑁 × 𝑑 and write it to HBM.
Our goal is to reduce the amount of HBM accesses (to sub-quadratic in 𝑁 ).
We apply two established techniques (tiling, recomputation) to overcome the technical challenge of computing exact attention in sub-quadratic HBM accesses.
We describe this in Algorithm 1.
The main idea is that we split the inputs Q , K , V into blocks, load them from slow HBM to fast SRAM, then compute the attention output with respect to those blocks.
By scaling the output of each block by the right normalization factor before adding them up, we get the correct result at the end.
Tiling.
We compute attention by blocks.
Softmax couples columns of K , so we decompose the large softmax with scaling [53, 62, 69].
For numerical stability, the softmax of vector 𝑥 ∈ R 𝐵 is computed:
𝑚
[Equation]
For vectors 𝑥 ( 1 ) ,𝑥 ( 2 ) ∈
R 𝐵 , we can decompose the softmax of the concatenated 𝑥 = (cid:2) 𝑥 ( 1 ) 𝑥 ( 2 ) (cid:3)
∈ R 2 𝐵 as: 𝑚 ( 𝑥 ) =
𝑚
( (cid:2) 𝑥 ( 1 ) 𝑥 (
[Equation]
) (cid:3) )
=
max
[Equation]
𝑚 ( 𝑥 (
[Equation]
𝑚
[Equation]
𝑥 (
[Equation] [Equation]
Therefore if we keep track of some extra statistics ( 𝑚 ( 𝑥 ) ,ℓ ( 𝑥 ) ), we can compute softmax one block at a time.
2 We thus split the inputs Q , K , V into blocks (Algorithm 1 line 1), compute the softmax values along with extra statistics (Algorithm 1 line 1), and combine the results (Algorithm 1 line 1).
Recomputation.
One of our goals is to not store 𝑂 ( 𝑁 2 ) intermediate values for the backward pass.
The backward pass typically requires the matrices S , P ∈ R 𝑁 × 𝑁 to compute the gradients with respect to Q , K , V .
However, by storing the output O and the softmax normalization statistics ( 𝑚,ℓ ) , we can recompute the attention matrix S and P easily in the backward pass from blocks of Q , K , V in
SRAM.
This can be seen as a form of selective gradient checkpointing [10, 36].
While gradient 2 This style of aggregation is called algebraic aggregation [35].
checkpointing has been suggested to reduce the maximum amount of memory required [69], all implementations (that we know off) have to trade speed for memory.
In contrast, even with more
FLOPs, our recomputation speeds up the backward pass due to reduced HBM accesses (Fig. 2).
The full backward pass description is in Appendix B.
Implementation details: Kernel fusion.
Tiling enables us to implement our algorithm in one CUDA kernel, loading input from HBM, performing all the computation steps (matrix multiply, softmax, optionally masking and dropout, matrix multiply), then write the result back to HBM (masking and dropout in Appendix B).
This avoids repeatedly reading and writing of inputs and outputs from and to HBM.
Require: Matrices Q , K , V ∈ R 𝑁 × in HBM, on-chip SRAM of size
Load Q 𝑖 , O 𝑖 ,ℓ 𝑖 ,𝑚 𝑖 from HBM to on-chip SRAM.
On chip, compute S 𝑖𝑗 =
Q 𝑖 K 𝑇𝑗 ∈ R 𝐵 𝑟 × 𝐵 𝑐 .
On chip, compute ˜ 𝑚
𝑖𝑗 = rowmax ( S 𝑖𝑗 )
∈ R 𝐵 𝑟 , ˜ P
𝑖𝑗 = exp
( S 𝑖𝑗 − ˜ 𝑚 𝑖𝑗 )
∈ R 𝐵 𝑟 × 𝐵 𝑐 (pointwise), ˜ ℓ 𝑖𝑗 = rowsum ( ˜ P 𝑖𝑗 )
∈ R 𝐵 𝑟 .
On chip, compute 𝑚 new 𝑖 = max ( 𝑚 𝑖 , ˜ 𝑚
𝑖𝑗 ) ∈ R 𝐵 𝑟 , ℓ new 𝑖 = 𝑒 𝑚 𝑖 − 𝑚 new 𝑖 ℓ 𝑖 + 𝑒 ˜ 𝑚
𝑖𝑗 − 𝑚 new 𝑖 ˜ ℓ 𝑖𝑗 ∈ R 𝐵 𝑟 .
Write O 𝑖 ← diag ( ℓ new 𝑖 ) − 1 ( diag ( ℓ 𝑖 ) 𝑒 𝑚 𝑖 − 𝑚 new 𝑖 O 𝑖 + 𝑒 ˜ 𝑚
𝑖𝑗 − 𝑚 new 𝑖 ˜ P 𝑖𝑗 V 𝑗 ) to HBM.
Write ℓ 𝑖 ← ℓ new 𝑖 , 𝑚 𝑖 ← 𝑚 new 𝑖 to HBM.
14: end for 15: end for 16:
Return O .
We show F LASH A TTENTION ’s correctness, runtime, and memory requirement (proof in Appendix C).
Theorem 1.
Algorithm 1 returns O = softmax ( QK (cid:62) ) V with 𝑂 ( 𝑁 2 𝑑 ) FLOPs and requires 𝑂 ( 𝑁 ) additional memory beyond inputs and output.
3.2 Analysis: IO Complexity of F LASH A TTENTION
We analyze the IO complexity of F LASH A TTENTION , showing signiﬁcant reduction in HBM accesses compared to standard attention.
We also provide a lower bound, proving that no exact attention algorithm can asymptotically improve on HBM accesses over all SRAM sizes.
Proofs are in Appendix C.
Theorem 2.
Let 𝑁 be the sequence length, 𝑑 be the head dimension, and 𝑀 be size of SRAM with 𝑑 ≤ 𝑀 ≤ 𝑁𝑑 .
Standard attention (Algorithm 0) requires Θ ( 𝑁𝑑 + 𝑁 2 ) HBM accesses, while
F LASH A TTENTION (Algorithm 1) requires Θ ( 𝑁 2 𝑑 2 𝑀 − 1 ) HBM accesses.
For typical values of 𝑑 (64-128) and 𝑀 (around 100KB), 𝑑 2 is many times smaller than 𝑀 , and thus
F LASH A TTENTION requires many times fewer HBM accesses than standard implementation.
This leads to both faster execution and lower memory footprint, which we validate in Section 4.3.
The main idea of the proof is that given the SRAM size of 𝑀 , we can load blocks of K , V of size Θ ( 𝑀 ) each (Algorithm 1 line 1).
For each block of K and V , we iterate over all blocks of Q (Algorithm 1 line 1) to compute the intermediate values, resulting in Θ ( 𝑁𝑑𝑀 − 1 ) passes over Q .
Each pass loads Θ ( 𝑁𝑑 ) elements, which amounts to Θ ( 𝑁 2 𝑑 2 𝑀 − 1 ) HBM accesses.
We similarly prove that the backward pass of standard attention requires Θ ( 𝑁𝑑 + 𝑁 2 ) HBM accesses while the backward pass of F LASH A TTENTION requires Θ ( 𝑁 2 𝑑 2 𝑀 − 1 ) HBM accesses (Appendix B).
We prove a lower-bound: one cannot asymptotically improve on the number of HBM accesses for all values of 𝑀 (the SRAM size) when computing exact attention.
[Figure]
Proposition 3.
Let 𝑁 be the sequence length, 𝑑 be the head dimension, and 𝑀 be size of SRAM with 𝑑 ≤ 𝑀 ≤ 𝑁𝑑 .
There does not exist an algorithm to compute exact attention with 𝑜 ( 𝑁 2 𝑑 2 𝑀 − 1 ) HBM accesses for all 𝑀 in the range [ 𝑑,𝑁𝑑 ] .
The proof relies on the fact that for 𝑀 =
Θ ( 𝑁𝑑 ) any algorithm must perform Ω ( 𝑁 2 𝑑 2 𝑀 − 1 )
=Ω ( 𝑁𝑑 )
HBM accesses.
This type of lower bound over a subrange of 𝑀 is common in the streaming algorithms literature [92].
We leave proving parameterized complexity [29] lower bounds in terms of 𝑀 as exciting future work.
We validate that the number of HBM accesses is the main determining factor of attention run-time.
In Fig.
2 (left), we see that even though F LASH A TTENTION has higher FLOP count compared to standard attention (due to recomputation in the backward pass), it has much fewer HBM accesses, resulting in much faster runtime.
In Fig.
2 (middle), we vary the block size 𝐵 𝑐 of F LASH A TTENTION , which results in different amounts of HBM accesses, and measure the runtime of the forward pass.
As block size increases, the number of HBM accesses decreases (as we make fewer passes over the input), and runtime decreases.
For large enough block size (beyond 256), the runtime is then bottlenecked by other factors (e.g., arithmetic operations).
Moreover, larger block size will not ﬁt into the small SRAM size.
3.3 Extension: Block-Sparse F LASH A TTENTION
We extend F LASH A TTENTION to approximate attention: we propose block-sparse F LASH A TTENTION , whose IO complexity is smaller than F LASH A TTENTION by a factor proportional to the sparsity.
Given inputs Q , K , V ∈ R 𝑁 × 𝑑 and a mask matrix ˜ M ∈ { 0 , 1 } 𝑁 × 𝑁 , we want to compute:
[Equation]
where ( S (cid:12) 𝟙 ˜ M ) 𝑘𝑙 = S 𝑘𝑙 if ˜ M 𝑘𝑙 = 1 and −∞ if M 𝑘𝑙 = 0 .
We require ˜
M to have block form: for some block sizes 𝐵 𝑟 ,𝐵 𝑐 , for all 𝑘,𝑙 ,
˜ M 𝑘,𝑙 =
M 𝑖𝑗 with 𝑖 = (cid:98) 𝑘 / 𝐵 𝑟 (cid:99) ,
𝑗 = (cid:98) 𝑙 / 𝐵 𝑐 (cid:99) for some M ∈ { 0 , 1 } 𝑁 / 𝐵 𝑟 × 𝑁 / 𝐵 𝑐 .
Given a predeﬁned block sparsity mask M ∈ { 0 , 1 } 𝑁 / 𝐵 𝑟 × 𝑁 / 𝐵 𝑐 we can easily adapt Algorithm 1 to only compute the nonzero blocks of the attention matrix.
The algorithm is identical to Algorithm 1, except we skip zero blocks.
We reproduce the algorithm description in Algorithm 5 in Appendix B.
We also analyze the IO complexity of block-sparse F LASH A TTENTION .
Proposition 4.
Let 𝑁 be the sequence length, 𝑑 be the head dimension, and 𝑀 be size of SRAM with 𝑑 ≤ 𝑀 ≤ 𝑁𝑑 .
Block-sparse F LASH A TTENTION (Algorithm 5) requires Θ ( 𝑁𝑑 + 𝑁 2 𝑑 2 𝑀 − 1 𝑠 )
HBM accesses where 𝑠 is the fraction of nonzero blocks in the block-sparsity mask.
We see that applying block-sparsity yields a direct improvement by the sparsity to the larger term in the IO complexity.
For large sequence lengths 𝑁 , 𝑠 is often set to 𝑁 − 1 / 2 [12] or 𝑁 − 1 log 𝑁 [3, 18, 96], resulting in Θ ( 𝑁 √ 𝑁 ) or Θ ( 𝑁 log 𝑁 ) IO complexity.
For downstream experiments, we use the ﬁxed butterﬂy sparsity pattern [18], which has been shown to be able to approximate arbitrary sparsity [17].
In Fig.
2 (right), we validate that as the sparsity increases, the runtime of block-sparse F LASH A TTENTION improves proportionally.
On the LRA benchmark, block-sparse F LASH A TTENTION achieves 2.8 × speedup, while performing on par with standard attention (Section 4).
Experiments
We evaluate the impact of using F LASH A TTENTION to train Transformer models.
We validate two claims about training time and model accuracy, and report attention runtime and memory benchmarks.
• Training Speed.
F LASH A TTENTION outperforms the MLPerf 1.1 [60] speed record for BERT by 15%, and speeds up GPT-2 up to 3 × over HuggingFace [91] and 1 . 8 × over Megatron [80] over standard Transformers.
F LASH A TTENTION speeds up the long-range arena (LRA) benchmark 2.4 × .
• Quality.
F LASH A TTENTION scales Transformers to longer sequences, yielding higher quality.
F LASH A TTENTION trains GPT-2 with context length 4K faster than Megatron trains GPT-2 with context length 1K, while achieving 0.7 better perplexity.
Modeling longer sequences yields 6.
points of lift on two long-document classiﬁcation tasks.
Finally, F LASH A TTENTION yields the ﬁrst Transformer that can achieve better-than-random performance on the challenging Path-X task (sequence length 16K), and block-sparse F LASH A TTENTION yields the ﬁrst sequence model that we know of that can achieve better-than-random performance on Path-256 (sequence length 64K).
• Benchmarking Attention.
We measure the runtime and memory performance of F LASH A TTENTION and block-sparse F LASH A TTENTION based on sequence length.
We conﬁrm that the memory footprint of F LASH A TTENTION scales linearly with seq.
length and is up to 3 × faster than standard attention for common seq.
lengths (up to 2K).
We conﬁrm that runtime of block-sparse F LASH A TTENTION scales linearly in seq.
length and is faster than all existing approximate attention baselines.
Additional experiment details are in Appendix E.
4.1 Faster Models with F LASH A TTENTION BERT.
F LASH A TTENTION yields the fastest single-node BERT training speed that we know of.
We train a BERT-large [24] model with F LASH A TTENTION on Wikipedia.
Table 1 compares our training time to the implementation from Nvidia that set the training speed record for MLPerf 1.1 [60, 63].
Our implementation is 15% faster.
[Table]
F LASH A TTENTION yields faster training times for GPT-2 [70] on the large OpenWebtext dataset [34] than the widely used HuggingFace [91] and Megatron-LM [80] implementations.
Table 2 shows up to 3 × end-to-end speedup compared to Huggingface and 1.7 × speedup compared to Megatron-LM.
F LASH A TTENTION achieves the same perplexity as the other two implementations, as we do not change the model deﬁnition.
Appendix E includes plots of the validation perplexity throughout training, conﬁrming that F LASH A TTENTION is as numerically stable as the baselines and produces the same training / validation curves [Table]
[Table]
Long-range Arena.
We compare vanilla Transformer (with either standard implementation or F LASH A TTENTION ) on the long-range arena (LRA [83]) benchmark.
We measure accuracy, throughput, and training time of all models.
Each task has a different sequence length varying between 1024 and 4096.
We follow the implementation and experimental setting in Tay et al.
[83]and Xiong et al.
3 Table 3 shows that F LASH A TTENTION achieves up 2.4 × speed-up compared to standard attention.
Block-sparse F LASH A TTENTION is faster than all of the approximate attention methods that we have tested.
4.2 Better Models with Longer Sequences
Language Modeling with Long Context.
The runtime and memory-efﬁciency of F LASH A TTENTION allow us to increase the context length of GPT-2 by 4 × while still running faster than the optimized implementation from Megatron-LM.
Table 4 shows that that GPT-2 with
[Table]
F LASH A TTENTION and context length 4K is still 30% faster than GPT-2 from Megatron with context length 1K, while achieving 0.7 better perplexity.
[Table]
Long Document Classiﬁcation.
Training Transformers with longer sequences with F LASH A TTENTION improves performance on the MIMIC-III [49] and ECtHR [6, 7] datasets.
MIMIC-III contains intensive care unit patient discharge summaries, each annotated with multiple labels.
ECtHR contains legal cases from the European Court of Human Rights, each of which is mapped to articles of the Convention of Human Rights that were allegedly violaged.
Both of these datasets contain very long text documents; the average number of tokens in MIMIC is 2,395 tokens, and the longest document contains 14,562 tokens, while the average and longest numbers in ECtHR are 2,197 and 49,392, respectively.
We evaluate lift from increasing the sequence length of a pretrained RoBERTa model [58] (we repeat the positional embeddings, as in Beltagy et al.
Table 5 shows that sequence length 16K outperforms length 512 by 4.3 points on MIMIC, and that length 8K outperforms length 512 by 8.5 points on ECtHR.
The discrepancies may be due to subtle distribution shifts: MIMIC-III contains specialized medical text and thus may be more susceptible to a distribution shift in the document length, whereas ECtHR contains general language.
[Table] [Table]
[Table]
Path-X and Path-256.
The Path-X and Path-256 benchmarks are challenging tasks from the long-range arena benchmark designed to test long context.
The task is to classify whether two points in a black and white 128 × 128 (or 256 × 256) image have a path connecting them, and the images are fed to the transformer one pixel at a time.
In prior work, all transformer models have either run out of memory, or only achieved random performance [83].
There has been a search for alternative architectures that can model such long context [39].
We present here the ﬁrst result of Transformer models being able to solve Path-X and Path-
(Table 6).
We pretrain a transformer on Path-64, and then transfer to Path-X by spatially interpolating the positional embeddings.
F LASH A TTENTION achieves 61.4 accuracy on Path-X. Additionally, block-sparse F LASH A TTENTION enables the
Transformers to scale to sequence length 64K, achieving 63.1 accuracy 4 on Path-256.
[Figure]
u n t
i m e ( m s )
M e m o r y F oo t p r
i n t ( G B )
[Figure]
4.3 Benchmarking Attention
We vary sequence length and measure runtime and memory usage of F LASH A TTENTION and block-sparse F LASH A TTENTION against various attention baselines on one A100 GPU with 40 GB
HBM, with dropout and a padding mask.
We compare against reference implementations for exact attention, approximate attention, and sparse attention.
We report a subset of baselines in the main body; Appendix E contains more baselines and full details.
Runtime.
Figure 3 (left) reports the runtime in milliseconds of the forward + backward pass of F LASH A TTENTION and block-sparse F LASH A TTENTION compared to the baselines in exact, approximate, and sparse attention (exact numbers in Appendix E).
Runtime grows quadratically with sequence length, but F LASH A TTENTION runs signiﬁcantly faster than exact attention baselines, up to 3 × faster than the PyTorch implementation.
The runtimes of many approximate/sparse attention mechanisms grow linearly with sequence length, but F LASH A TTENTION still runs faster than approximate and sparse attention for short sequences due to fewer memory accesses.
The approximate attention runtimes begin to cross over with F LASH A TTENTION at sequences between 512 and 1024.
On the other hand, block-sparse F LASH A TTENTION is faster than all implementations of exact, sparse, and approximate attention that we know of, across all sequence lengths.
Memory Footprint.
Figure 3 (right) shows the memory footprint of F LASH A TTENTION and block-sparse F LASH A TTENTION compared to various exact, approximate, and sparse attention baselines.
F LASH A TTENTION and block-sparse F LASH A TTENTION have the same memory footprint, which grows linearly with sequence length.
F LASH A TTENTION is up to 20 × more memory efﬁcient than exact attention baselines, and is more memory-efﬁcient than the approximate attention baselines.
All other algorithms except for Linformer run out of memory on an A100 GPU before 64K, and F LASH A TTENTION is still 2 × more efﬁcient than Linformer.
Limitations and Future Directions
We discuss limitations of our approach and future directions.
Related work is given in Appendix A.
Compiling to CUDA.
Our current approach to building IO-aware implementations of attention requires writing a new CUDA kernel for each new attention implementation.
This requires writing the attention algorithm in a considerably lower-level language than PyTorch, and requires signiﬁcant engineering effort.
Implementations may also not be transferrable across GPU architectures.
These limitations suggest the need for a method that supports writing attention algorithms in a high-level language (e.g., PyTorch), and compiling to IO-aware implementations in CUDA—similar to efforts such as Halide in image processing [73].
IO-Aware Deep Learning.
We believe that the IO-aware approach can extend beyond attention.
Attention is the most memory-intensive computation in Transformers, but every layer in a deep network touches GPU HBM.
We hope our work inspires IO-aware implementations of additional modules.
We discuss these potential extensions in Appendix D.
Multi-GPU IO-Aware Methods.
Our IO-aware implementation of attention is optimal within constants for computing attention on a single GPU.
However, the attention computation may be par- allelizable across multiple GPUs [75].
Using multiple GPUs adds an additional layer to IO analysis— accounting for data transfer between GPUs.
We hope our work inspires future work in this direction.
Societal Impacts.
As Transformer-based foundation models grow in size and data, our work seeks to understand how to train these large models more efﬁciently.
This may allow a general community with limited access to computational resources to train and understand those foundation models.
Our method is applicable to all Transformer-based models, which have a variety of applications, both positive and negative.
For example, language modeling may make it easier to spread misinformation, while image classiﬁcation models may make automatic surveillance easier.
Alleviating these risks requires addressing application-speciﬁc issues such as privacy, bias, and discrimination.
Acknowledgments
Our implementation uses Apex’s FMHA code ( https://github.com/NVIDIA/apex/tree/ master/apex/contrib/csrc/fmha ) as a starting point.
We thank Young-Jun Ko for the in-depth explanation of his FMHA implementation and for his thoughtful answers to our questions about
CUDA.
We thank Sabri Eyuboglu, Megan Leszczynski, Laurel Orr, Yuhuai Wu, Beidi Chen, and
Xun Huang for their constructive feedback and suggestions on early drafts of the paper.
We thank
Markus Rabe and Charles Staats for helpful discussion of their attention algorithm.
We gratefully acknowledge the support of NIH under No. U54EB020405 (Mobilize), NSF under Nos.
CCF
(Beyond Sparsity), CCF1563078 (Volume to Velocity), and(RTML); ARL under No.
W911NF-21-2-0251 (Interactive Human-AI Teaming);
ONR under
No. N
(Unifying Weak Supervision)
; ONR N00014-20-1-2480: Understanding and Applying Non-Euclidean Geometry in Machine Learning; N000142012275 (NEPTUNE);
NXP, Xilinx, LETI-CEA, Intel, IBM, Microsoft, NEC, Toshiba, TSMC, ARM, Hitachi, BASF,
Accenture, Ericsson, Qualcomm, Analog Devices, Google Cloud, Salesforce, Total, the HAI-GCP & HAI-Azure Cloud Credits for Research program, the Stanford Data Science Initiative (SDSI),
Department of Defense (DoD) through the National Defense Science and Engineering Graduate
Fellowship (NDSEG) Program, and members of the Stanford DAWN project: Facebook, Google and
VMWare.
The U
S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright notation thereon.
Any opinions, ﬁndings, and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reﬂect the views, policies, or endorsements, either expressed or implied, of NIH, ONR, or the U
S. Government.
Atri Rudra’s research is supported by NSF grant CCF-1763481.
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