PATENT DOCUMENT

Publication Number: US-10417971-B2
Application Number: US-201715664982-A
Country: US
Kind Code: B2

Title: Early pixel reset systems and methods

Abstract:
An electronic device includes processors that generate image data. The electronic device also includes an electronic display that displays the image data over a first frame duration by programming a first row of display pixels with the image data. The electronic display also displays the image data over the first frame duration by causing the first row of display pixels to emit light for an emission duration that is based at least in part on a first luminance of the image data. The electronic display further displays the image data over the first frame duration by resetting the first row of pixels before an end of the first frame duration.

Claims:
What is claimed is: 
     
       1. An electronic display, comprising:
 a display panel comprising a plurality of display pixels; 
 a scan driver communicatively coupled to the plurality of display pixels; 
 a data driver communicatively coupled to the plurality of display pixels; and 
 a controller communicatively coupled to the scan driver and the data driver, wherein the controller is configured to:
 instruct the scan driver and the data driver to program a row of the plurality of display pixels based on corresponding image data; 
 instruct the scan driver to turn on the row of the plurality of display pixels at a fixed time after programming the row of the plurality of display pixels; 
 instruct the scan driver to turn off the row of the plurality of display pixels based at least in part on a first luminance of the row of the plurality of display pixels; and 
 instruct the scan driver and the data driver to reset the row of the plurality of display pixels to overwrite previous image data stored in the row of the plurality of display pixels by programming each display pixel in the display pixel row with a reset voltage in response to turning off the display pixel row to reduce hysteresis in the row of the plurality of display pixels. 
 
 
     
     
       2. The electronic display of  claim 1 , wherein, to program the row of the plurality of display pixels, the controller is configured to: instruct the data driver to provide first data signals based at least in part on the first luminance indicated by the corresponding image data; and instruct the scan driver to generate a first scan control signal that instructs each display pixel in the row of the plurality of display pixels to supply one of the first data signals to its storage component. 
     
     
       3. The electronic display of  claim 2 , wherein the storage component comprises a transistor, a capacitor, or both. 
     
     
       4. The electronic display of  claim 2 , wherein, to turn on the row of the plurality of display pixels the controller is configured to instruct the scan driver to output an emission on control signal that instructs each display pixel in the row of the plurality of display pixels to connect a current source programmed based on the image data to its light emitting device. 
     
     
       5. The electronic display of  claim 4 , wherein the light emitting device comprise an organic light emitting diode. 
     
     
       6. The electronic display of  claim 4 , wherein, to turn off the row of the plurality of display pixels the controller is configured to instruct the scan driver to output an emission off control signal that instruct each display pixel in the row of the plurality of display pixels to disconnect a current source programmed based on the image from its light emitting device. 
     
     
       7. The electronic display of  claim 2 , wherein, to reset the row of the plurality of display pixels the controller is configured to instruct the scan driver to generate a second scan control signal that instructs each display pixel in the row of the plurality of display pixels to use a data signal different from the first data signals. 
     
     
       8. A method for operating an electronic display, comprising:
 receiving image data into display driver circuitry of the electronic display; 
 programming a display pixel of the electronic display based on the image data using the display driver circuitry; 
 sending a first signal configured to cause the display pixel to emit light using the display driver circuitry; 
 sending a second signal configured to cause the display pixel to stop emitting light based on a first luminance of the image data using the display driver circuitry; and 
 applying a reset voltage configured to reset the display pixel to overwrite previous image data stored in the display pixel using the display driver circuitry to reduce hysteresis in the display pixel. 
 
     
     
       9. The method of  claim 8 , comprising initializing the display pixel by applying an initial voltage using the display driver circuitry. 
     
     
       10. The method of  claim 8 , comprising determining a duration between the first signal and the second signal based on the first luminance. 
     
     
       11. The method of  claim 8 , comprising programming a different display pixel based on the image data, after causing the display pixel to emit light. 
     
     
       12. The method of  claim 8 , comprising sending a third signal configured to cause a different display pixel to emit light after sending the second signal. 
     
     
       13. The method of  claim 8 , comprising sending a third signal to a different display pixel to stop emitting light, after programming the display pixel. 
     
     
       14. The method of  claim 8 , wherein:
 sending the first signal is associated with a frame of the image data; 
 sending the second signal is associated with the frame of the image data; and 
 sending the first signal occurs before sending the second signal. 
 
     
     
       15. An electronic device comprising:
 one or more processors configured to generate image data; and 
 an electronic display configured to display the image data over a first frame duration at least in part by:
 programming a first row of display pixels with the image data; 
 causing the first row of display pixels to emit light for an emission duration that is based at least in part on a first luminance of the image data; and 
 resetting the first row of display pixels before an end of the first frame duration to overwrite previous image data stored in the first row of display pixels and reduce hysteresis in the first row of display pixels. 
 
 
     
     
       16. The electronic device of  claim 15 , wherein the electronic display is configured to display the image data over the first frame duration at least in part by initializing the first row of display pixels by applying an initial voltage to the first row of display pixels. 
     
     
       17. The electronic device of  claim 15 , wherein the electronic display is configured to display the image data over the first frame duration at least in part by programming a second row of display pixels with the image data, after causing the first row of display pixels to emit light. 
     
     
       18. The electronic device of  claim 15 , wherein the electronic display is configured to display the image data over the first frame duration at least in part by causing the first row of display pixels to stop emitting light after the emission duration. 
     
     
       19. The electronic device of  claim 18 , wherein the electronic display is configured to display the image data over the first frame duration at least in part by causing a second row of display pixels to emit light, after causing the first row of display pixels to stop emitting light after the emission duration. 
     
     
       20. The electronic device of  claim 15 , wherein the electronic display is configured to display the image data over the first frame duration at least in part by causing a second row of display pixels to stop emitting light, after programming the first row of display pixels with the image data.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application claims priority to U.S. Provisional Patent Application No. 62/472,894, filed Mar. 17, 2017, entitled “Early Pixel Reset Systems and Methods,” the contents of which is incorporated by reference in its entirety. 
    
    
     BACKGROUND 
     The present disclosure relates generally to electronic displays and, more particularly, improving response time in the electronic displays. 
     This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present techniques, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art. 
     Electronic devices often use electronic displays to present visual representations of information as text, still images, and/or video by displaying one or more image frames. For example, such electronic devices may include computers, mobile phones, portable media devices, tablets, televisions, virtual-reality headsets, vehicle dashboards, and wearable devices, among many others. To accurately display an image frame, an electronic display may control light emission (e.g., luminance) from its display pixels. However, light emission of a display pixel for displaying an image frame may be affected by light emission of the display pixel for display one or more previous image frame, a phenomenon known as hysteresis. The hysteresis exhibited by the display pixels of the electronic display may result in slow response time of the display pixels, which may affect perceived image quality of the electronic display, for example, by producing ghost images or mura effects. Moreover, for current-driven displays, such as organic light-emitting diode (OLED) displays, the response time may be even slower when displaying low luminance images or during short persistent modes. 
     SUMMARY 
     A summary of certain embodiments disclosed herein is set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of these certain embodiments and that these aspects are not intended to limit the scope of this disclosure. Indeed, this disclosure may encompass a variety of aspects that may not be set forth below. 
     The present disclosure generally relates to electronic displays and, more particularly, to improving response time of electronic displays. Generally, an electronic display may display an image frame by programming display pixels with image data and instructing the display pixels to emit light. The image frame may include a first or target luminance (e.g., brightness) with which to display the image frame. Some electronic displays may achieve the first luminance by controlling the time (e.g., an emission period) the image frame is displayed. That is, the electronic displays may achieve the first luminance by displaying the image frame for a target emission period, which may be a ratio or percentage of a display period of the image frame. For example, if the first luminance of the image frame is 60% of a maximum luminance available of the electronic display, the image frame may be displayed for 60% of the display period of the image frame, resulting in displaying the image frame at the first luminance. As such, the electronic display may first program the display pixels with the image data (of the image frame). At the beginning of the display period of the image frame, the electronic display may not emit light from the display pixels (e.g., for 40% of the display period—a non-emission period), and then emit light (e.g., for the remaining 60% of the display period—the emission period). In this manner, the electronic display may display the image frame at the first luminance. 
     To reduce likelihood of hysteresis affect perceived image quality of a subsequent image frame, the electronic display may reset the display pixels (e.g., a target voltage may be applied to the display pixels) to relax the display pixels by overwriting previous image frame data causing the hysteresis. In particular, the display pixels may emit light after programming the image data for the emission period, and then stop emitting light for the non-emission period (i.e., after the emission period). During the non-emission period, the display pixels may be reset. As image frames are typically displayed row (of display pixels) by row, each row may be sequentially programmed with image data and instructed to emit and then stop emitting light. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Various aspects of this disclosure may be better understood upon reading the following detailed description and upon reference to the drawings in which: 
         FIG. 1  is a block diagram of an electronic device used to display image frames, in accordance with an embodiment of the present disclosure; 
         FIG. 2  is one example of the electronic device of  FIG. 1 , in accordance with an embodiment of the present disclosure; 
         FIG. 3  is another example of the electronic device of  FIG. 1 , in accordance with an embodiment of the present disclosure; 
         FIG. 4  is another example of the electronic device of  FIG. 1 , in accordance with an embodiment of the present disclosure; 
         FIG. 5  is another example of the electronic device of  FIG. 1 , in accordance with an embodiment of the present disclosure; 
         FIG. 6  is a high-level schematic diagram of display driver circuitry of the electronic display of  FIG. 1 , in accordance with an embodiment of the present disclosure; 
         FIG. 7  is a schematic diagram of a display pixel of the electronic display of  FIG. 6 , in accordance with an embodiment of the present disclosure; 
         FIG. 8  is an example timing graph of display pixels displaying two image frames; 
         FIG. 9  is an example graph showing a current-voltage characteristic of a display pixel of  FIG. 8 ; 
         FIG. 10  is an example timing graph of the display pixels of  FIG. 7  displaying two image frames, in accordance with an embodiment of the present disclosure; and 
         FIG. 11  is a flow diagram of a process for resetting the display pixel of  FIG. 7  to improve display response time, in accordance with an embodiment of the present disclosure. 
     
    
    
     DETAILED DESCRIPTION 
     One or more specific embodiments of the present disclosure will be described below. These described embodiments are only examples of the presently disclosed techniques. Additionally, in an effort to provide a concise description of these embodiments, all features of an actual implementation may not be described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers&#39; specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but may nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure. 
     When introducing elements of various embodiments of the present disclosure, the articles “a,” “an,” and “the” are intended to mean that there are one or more of the elements. The terms “including” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements. Additionally, it should be understood that references to “one embodiment,” “an embodiment,” “embodiments,” and “some embodiments” of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the recited features. 
     To reduce hysteresis, display pixels of an electronic display may be reset to relax the display pixels by overwriting previous image frame data causing the hysteresis. To help illustrate, an electronic device  10  including an electronic display  12  is shown in  FIG. 1 . As will be described in more detail below, the electronic device  10  may be any suitable electronic device, such as a computer, a mobile phone, a portable media device, a tablet, a television, a virtual-reality headset, a vehicle dashboard, and the like. Thus, it should be noted that  FIG. 1  is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in the electronic device  10 . 
     In the depicted embodiment, the electronic device  10  includes the electronic display  12 , one or more input devices  14 , one or more input/output (I/O) ports  16 , a processor core complex  18  having one or more processor(s) or processor cores, local memory  20 , a main memory storage device  22 , a network interface  24 , a power source  26 , and image processing circuitry  27 . The various components described in  FIG. 1  may include hardware elements (e.g., circuitry), software elements (e.g., a tangible, non-transitory computer-readable medium storing instructions), or a combination of both hardware and software elements. It should be noted that the various depicted components may be combined into fewer components or separated into additional components. For example, the local memory  20  and the main memory storage device  22  may be included in a single component. Additionally, the image processing circuitry  27  (e.g., a graphics processing unit) may be included in the processor core complex  18 . 
     As depicted, the processor core complex  18  is operably coupled with local memory  20  and the main memory storage device  22 . Thus, the processor core complex  18  may execute instruction stored in local memory  20  and/or the main memory storage device  22  to perform operations, such as generating and/or transmitting image data. As such, the processor core complex  18  may include one or more general purpose microprocessors, one or more application specific processors (ASICs), one or more field programmable logic arrays (FPGAs), or any combination thereof. 
     In addition to executable instructions, the local memory  20  and/or the main memory storage device  22  may store data to be processed by the processor core complex  18 . Thus, in some embodiments, the local memory  20  and/or the main storage device  22  may include one or more tangible, non-transitory, computer-readable mediums. For example, the local memory  20  may include random access memory (RAM) and the main memory storage device  22  may include read only memory (ROM), rewritable non-volatile memory such as flash memory, hard drives, optical discs, and the like. 
     As depicted, the processor core complex  18  is also operably coupled with the network interface  24 . In some embodiments, the network interface  24  may facilitate communicating data with another electronic device and/or a network. For example, the network interface  24  (e.g., a radio frequency system) may enable the electronic device  10  to communicatively couple to a personal area network (PAN), such as a Bluetooth network, a local area network (LAN), such as an 802.11x Wi-Fi network, and/or a wide area network (WAN), such as a 4G or LTE cellular network. 
     Additionally, as depicted, the processor core complex  18  is operably coupled to the power source  26 . In some embodiments, the power source  26  may provide electrical power to one or more component in the electronic device  10 , such as the processor core complex  18  and/or the electronic display  12 . Thus, the power source  26  may include any suitable source of energy, such as a rechargeable lithium polymer (Li-poly) battery and/or an alternating current (AC) power converter. 
     Furthermore, as depicted, the processor core complex  18  is operably coupled with the I/O ports  16 . In some embodiments, the I/O ports  16  may enable the electronic device  10  to interface with other electronic devices. For example, a portable storage device may be connected to an I/O port  16 , thereby enabling the processor core complex  18  to communicate data with the portable storage device. 
     As depicted, the electronic device  10  is also operably coupled with input devices  14 . In some embodiments, the input device  14  may facilitate user interaction with the electronic device  10 , for example, by receiving user inputs. Thus, the input devices  14  may include a button, a keyboard, a mouse, a trackpad, and/or the like. Additionally, in some embodiments, the input devices  14  may include touch-sensing components in the electronic display  12 . In such embodiments, the touch sensing components may receive user inputs by detecting occurrence and/or position of an object touching the surface of the electronic display  12 . 
     In addition to enabling user inputs, the electronic display  12  may include a display panel with one or more display pixels. As described above, the electronic display  12  may control light emission from the display pixels to present visual representations of information, such as a graphical user interface (GUI) of an operating system, an application interface, a still image, or video content, by display image frames based at least in part on corresponding image data. In some embodiments, the electronic display  12  may be a display using light-emitting diodes (LED display), a self-emissive display, such as an organic light-emitting diode (OLED) display, or the like. Additionally, in some embodiments, the electronic display  12  may refresh display of an image and/or an image frame, for example, at 60 Hz (corresponding to refreshing 60 frames per second), 120 Hz (corresponding to refreshing 120 frames per second), and/or 240 Hz (corresponding to refreshing 240 frames per second). 
     As depicted, the electronic display  12  is operably coupled to the processor core complex  18  and the image processing circuitry  27 . In this manner, the electronic display  12  may display image frames based at least in part on image data generated by the processor core complex  18  and/or the image processing circuitry  27 . Additionally or alternatively, the electronic display  12  may display image frames based at least in part on image data received via the network interface  24  and/or the I/O ports  16 . 
     As described above, the electronic device  10  may be any suitable electronic device. To help illustrate, one example of a suitable electronic device  10 , specifically a handheld device  10 A, is shown in  FIG. 2 . In some embodiments, the handheld device  10 A may be a portable phone, a media player, a personal data organizer, a handheld game platform, and/or the like. For example, the handheld device  10 A may be a smart phone, such as any iPhone® model available from Apple Inc. 
     As depicted, the handheld device  10 A includes an enclosure  28  (e.g., housing). In some embodiments, the enclosure  28  may protect interior components from physical damage and/or shield them from electromagnetic interference. Additionally, as depicted, the enclosure  28  surrounds the electronic display  12 . In the depicted embodiment, the electronic display  12  is displaying a graphical user interface (GUI)  30  having an array of icons  32 . By way of example, when an icon  32  is selected either by an input device  14  or a touch-sensing component of the electronic display  12 , an application program may launch. 
     Furthermore, as depicted, input devices  14  extend through the enclosure  28 . As described above, the input devices  14  may enable a user to interact with the handheld device  10 A. For example, the input devices  14  may enable the user to activate or deactivate the handheld device  10 A, navigate a user interface to a home screen, navigate a user interface to a user-configurable application screen, activate a voice-recognition feature, provide volume control, and/or toggle between vibrate and ring modes. As depicted, the I/O ports  16  also open through the enclosure  28 . In some embodiments, the I/O ports  16  may include, for example, an audio jack to connect to external devices. 
     To further illustrate an example of a suitable electronic device  10 , specifically a tablet device  10 B, is shown in  FIG. 3 . For illustrative purposes, the tablet device  10 B may be any iPad® model available from Apple Inc. A further example of a suitable electronic device  10 , specifically a computer  10 C, is shown in  FIG. 4 . For illustrative purposes, the computer  10 C may be any Macbook® or iMac® model available from Apple Inc. Another example of a suitable electronic device  10 , specifically a watch  10 D, is shown in  FIG. 5 . For illustrative purposes, the watch  10 D may be any Apple Watch® model available from Apple Inc. As depicted, the tablet device  10 B, the computer  10 C, and the watch  10 D each also includes an electronic display  12 , input devices  14 , and an enclosure  28 . 
     With the foregoing in mind, a schematic diagram of display driver circuitry  38  of the electronic display  12  is shown in  FIG. 6 . The display driver circuitry  38  may include circuitry, such as one or more integrated circuits, state machines made of discrete logic and other components, and the like, that provide an interface function between, for example, the processor  18  and/or the image processing circuitry  27  and the display  12 . As depicted, the display driver circuitry  38  includes a display panel  40  with multiple display pixels  42  arranged in rows and columns. A set of scan drivers  44  and a set of data drivers  46  are communicatively coupled to the display pixels  42 . As illustrated, one scan driver  44  is communicatively coupled to each row of display pixels  42 , and one data driver  46  is communicatively coupled to each column of display pixels  42 . A scan driver  44  may supply one or more scan signals or control signals (e.g., voltage signals) to a display pixel row to control operation (e.g., programming, writing, and/or emission period) of the row. The scan drivers  44  may be daisy chained together, such that a single control signal may be sent to the set of scan drivers  44  to display an image frame. Timing of the control signal may be controlled by propagation of the control signal through the set of scan drivers  44 . A data driver  46  may supply one or more data signals (e.g., voltage signals) to a display pixel column to program (e.g., write) one or more display pixel in the column. In some embodiments, electrical energy may be stored in a storage component (e.g., capacitor) of a display pixel to control magnitude of current (e.g., via one or more programmable current sources) to facilitate controlling light emission from the display pixel. It should be noted that any suitable arrangement of communicatively coupling scan drivers  44  and data drivers  46  to the display pixels  42  is contemplated (e.g., communicatively coupling one or more scan drivers  44  and/or one or more data drivers  46  to one or more display pixels  42 ). 
     As depicted, a controller  48  is communicatively coupled to the data drivers  46 . The controller  48  may instruct the data drivers  46  to provide one or more data signals to the display pixels  42 . The controller  48  may also instruct the scan drivers  44  to provide one or more control signals to the display pixels  42  (via the data drivers  46 ). While the controller  48  is shown as part of the display panel  40 , it should be understood that the controller  48  may be external to the display panel  40 . Moreover, the controller  48  may be communicatively coupled to the scan drivers  44  and the data drivers  46  in any suitable arrangement (e.g., directly coupling to the scan drivers  44 , directly coupling to the scan drivers  44  and the data drivers  46 , and the like). The controller  48  may include one or more processors  50  and one or more memory devices  52 . In some embodiments, the processor(s)  50  may execute instructions stored in the memory device(s)  52 . Thus, in some embodiments, the processor(s)  50  may be included in the processor core complex  18 , the image processing circuitry  27 , a timing controller (TCON) in the electronic display  12 , and/or a separate processing module. Additionally, in some embodiments, the memory device(s)  52  may be included in the local memory  20 , the main memory storage device  22 , and/or one or more separate tangible, non-transitory, computer readable media. 
     The controller  48  may control the display panel  40  to display an image frame at a first or target luminance or brightness. For example, the controller  48  may receive image data from an image data source that indicates the target luminance of one or more display pixels  42  for displaying an image frame. The controller  48  may display the image frame by controlling (e.g., by using a switching element) magnitude and/or duration (e.g., an emission period) current is supplied to light-emission components (e.g., an OLED) to facilitate achieving the target luminance. 
     That is, the controller  48  may display the image frame for a target emission period, which may be a ratio or percentage of a display period of the image frame. For example, if the target luminance of the image frame is 60% of a maximum luminance available of the electronic display, the controller  48  may switch on the display pixels to emit light for a ratio or percentage (e.g., 60%) of a display period of the image frame that results in displaying the image frame at the target luminance. The controller  48  may switch off light emitting devices of the display pixels to stop emitting light for the remainder (e.g., 40%) of the display period. In this manner, the controller  48  may instruct the display panel  40  to display the image frame at the target luminance. In some embodiments, the controller  48  may also control magnitude of the current supplied to enable light emission to control luminance of the image frame. 
     A more detailed view of a display pixel  42  is shown in  FIG. 7 . The display pixel  42  includes a switching and storage device  60 , such as a first transistor. In alternative embodiments, the first transistor  60  may be any suitable component or components that provide switching and storage functionality (e.g., one or more switches). The first transistor  60  may provide a data voltage  62 , V data , when in a conducting state. The data voltage  62  may be provided by a data signal line coupled to a data driver  46 . The first transistor  60  may operate in a conducting or non-conducting state based on a write enable voltage  64 , V write enable , which may be provided by a scan signal line coupled to a scan driver  44 . In particular, the controller  48  may instruct the scan driver  44  to send the write enable voltage  64  to set the transistor  60  in the conducting state and instruct the data driver  46  to send the data voltage  62  that programs a programmable current source  65  of the display pixel  42  to produce a target current, for example, by selectively connecting to a power supply in a feedback loop. In this manner, the controller  48  may program an output (e.g., color, luminance, and the like) of the display pixel  42  via the first transistor  60 . The controller  48  may also instruct the data driver  46  to send a reset signal or voltage via the data voltage  62  to reset the programmable current source  65 . The reset voltage may be any suitable voltage that resets or relaxes the first transistor  60  and reduces hysteresis by overwriting previous image data stored in the first transistor  60 . In some embodiments, the reset voltage may be associated with default image data supplied by the current source  65 . The default image may be independent of the image data used to display an image frame to sufficiently reset or relax the first transistor  60 . 
     The display pixel  42  includes a switching device  66 , such as a second transistor. In alternative embodiments, the second transistor  66  may be any suitable component or components that provide switching functionality (e.g., a switch). The second transistor  66  may selectively provide current from the programmable current source  65  to light emitting device  70 , such as an organic light emitting diode (OLED). The second transistor  66  may operate in a conducting or non-conducting state based on an emission enable voltage  68 , V emission enable , which may be provided by a scan signal line coupled to a scan driver  44 . When in the conducting state, the second transistor  66  may provide the current from the programmable current source  65  to light emitting device  70 . In particular, the controller  48  may instruct the scan driver  44  to send the emission enable voltage  68  to set the second transistor  66  in the conducting state, thereby electrically coupling the programmable current source  65  to the light emitting device  70 . As described above, the output (e.g., color, luminance, and the like) of the OLED  70  may be controlled based on the magnitude of supplied current and/or duration current is supplied to the OLED  70 . In this manner, the controller  48  may control an output (e.g., color, luminance, and the like) of the OLED  70 . 
     The display pixel  42  also includes an additional switching device  72 , such as a third transistor. In alternative embodiments, the third transistor  72  may be any suitable component or components that provide switching functionality (e.g., a switch). The third transistor  72  may provide an initial voltage  76  (e.g., ground) to the display pixel  42  to initialize the display pixel  42  when in a conducting state. The third transistor  72  may operate in a conducting or non-conducting state based on an initial enable voltage  74 , V initial enable , which may be provided by a scan signal line coupled to a scan driver  44 . While the initial voltage  76  is a ground voltage (e.g., zero voltage) in  FIG. 7 , it should be noted that the initial voltage  76  may be any suitable voltage used to initialize the display pixel  42  to prepare the display pixel  42  to display an image frame. 
     When transitioning between display of successive frames, light emission in display pixels  42  associated with displaying a first frame may lag, negatively impacting light emission in display pixels  42  associated with displaying a subsequent (e.g., second) frame, a phenomenon known as hysteresis. Hysteresis may be caused by a magnitude of a constant current supplied by the current source  65  coupled to the OLED  70  used to display a previous frame affecting a magnitude of a constant current used to display a subsequent frame, thus affecting the luminance of the display pixels  42  when displaying the subsequent frame. Hysteresis may cause slow response time of the display pixels  42  and reduce perceived image quality (e.g., by creating ghost images or mura effects). 
     Moreover, perceivability of the hysteresis effects may increase at lower target luminance (e.g., shorter emission duration) because a ramp rate (e.g., an emission on delay) of a display pixel  42  may be affected by the magnitude of constant current output from the current source  65 . That is, the higher the current output from the current source  65 , the faster the voltage and current across the OLED  70  may ramp, thus reaching a steady state (e.g., target) luminance faster, and vice versa. Because the ramp rate is unaffected by an emission duration, and image data with a lower target luminance is displayed with a shorter emission duration, ramping before reaching the steady state luminance takes a larger portion of the display period of the image frame. 
     To help illustrate, an example timing graph  90  describing operation of display pixels for displaying a first image frame  92  followed by a second image frame  94  is shown in  FIG. 8 . The vertical axis  96  of the graph  90  represents display pixels of each row (e.g., rows 1-10) of a display panel, and the horizontal axis  98  represents time. As illustrated, each row is first programmed with image data during a programming period  100 . Before the programming period  100 , the display pixel row may be instructed to stop emitting light. After the programming period  100 , each row emits light to display the pixels of the row during an emission period  102 . For example, a controller may program display pixel Row 1 from t 0  to t 1 , instruct Row 1 to emit light from t 1  to t 2 , program Row 1 again from t 2  to t 3 , and instruct Row 1 to emit light again from t 3  to t 4 . As illustrated, the controller may sequentially program each subsequent display pixel row (e.g., Row 2) with image data, instruct each subsequent row to emit light, and instruct each subsequent row to stop emitting light. 
     However, when transitioning between frame  92  and frame  94 , light emission in display pixels associated with displaying frame  92  may lag, negatively impacting light emission in display pixels associated with displaying frame  94 .  FIG. 9  is an example graph showing a current-voltage characteristic  110  of a display pixel of  FIG. 8 . The vertical axis  112  of the graph represents current in the display pixel  42  and the horizontal axis  114  represents voltage of a data signal (e.g., associated with image data) provided to the display pixel. The data voltage  116  may illustrate a certain voltage associated with image data for the display pixel to display. An ideal or target current-voltage  118  represents a target current (and thus luminance) the display pixel should display the image data. However, due to hysteresis, an actual current-voltage may vary from the target current-voltage  118 . In particular, a range of current-voltage  120  may illustrate actual current-voltage due to hysteresis (from displaying a previous image frame). A first endpoint  122  of the range  120  may represent a case where the previous image frame is black (e.g., 0% luminance). A second endpoint  124  of the range  120  may represent a case where the previous image frame is white (e.g., 100% luminance). As such, hysteresis from displaying the previous image frame may cause luminance variance from an ideal or target luminance when displaying a subsequent image frame. 
     To reduce likelihood of hysteresis affecting perceived image quality, the controller  48  may reset the display pixels  42  by applying a target (e.g., reset) voltage. Applying the target voltage to the display pixels  42  may relax the display pixels  42  by overwriting previous image frame data, which otherwise may result in hysteresis. The controller  48  may reset the display pixels  42  during a non-emission period of the display pixels  42  (e.g., after the controller  48  instructs the display pixels  42  to stop emitting light). 
     To help illustrate, an example timing graph  130  describing operation of the display pixels  42  for displaying a first image frame  132  followed by a second image frame  134  is shown in  FIG. 10 . The vertical axis  136  of the graph  130  represents display pixels  42  of each row (e.g., rows 1-10) of the display panel  40 , and the horizontal axis  138  represents time. As illustrated, each row is first programmed with image data during a programming period  140 . Before the programming period  140 , the display pixel row may be instructed to stop emitting light. After the programming period  140 , each row emits light to display the pixels  42  of the row during an emission period  142 . After the emission period  142 , the controller  48  instructs each row to stop emitting light and reset during a reset period  144 . For example, the controller  48  may program display pixel Row 1 from t 0  to t 1 , instruct Row 1 to emit light from t 1  to t 2 , instruct Row 1 to stop emitting light and reset Row 1 from t 2  to t 3 , program Row 1 again from t 3  to t 4 , instruct Row 1 to emit light again from t 4  to t 5 , and instruct Row 1 to stop emitting light and reset Row 1 from t 5  to t 6 . 
     In other words, the controller  48  may sequentially program each display pixel row (e.g., Row 2) with image data, instruct each row to emit light, instruct each row to stop emitting light, and instruct each row to reset.  FIG. 10  also illustrates a difference between displaying image frames of different luminance. For example, Row 1 emits light when displaying frame  132  for a time period (i.e., from t 1  to t 2 ) that is greater than that of frame  134  (i.e., from t 4  to t 5 ). Resetting a row of display pixels  42  immediately or shortly after the row stops emitting light may increase relaxation duration, thereby reducing likelihood that hysteresis due to display of a previous frame (e.g., frame  132 ) affects perceived image quality of a subsequent frame (e.g., frame  134 ). 
     In some embodiments, the controller  48  may display an image frame using pulse-width modulation (PWM) as part of dimming control. In particular, the controller  48  may display multiple noncontiguous refresh pixel groups associated with multiple portions of the image frame, resulting in a faster refresh rate. In such cases, the controller  48  may reset the current source  65  after a last refresh pixel group to reduce hysteresis. 
     One embodiment of a process  150  for resetting the display pixel  42  of  FIG. 7  to improve display response time is described in  FIG. 11 . Generally, the process  150  includes receiving image data (process block  152 ), initializing a display pixel row by applying an initial voltage (process block  154 ), programming the display pixel row based on the image data (process block  156 ), instructing the display pixel row to emit light (process block  158 ), instructing the display pixel row to stop emitting light based on a target luminance of the image data (process block  160 ), and resetting the display pixel row by applying a reset voltage (process block  162 ). The process  150  may be implemented by the display driver circuitry  38 . In some embodiments, the process  150  may be implemented by executing instructions stored in a tangible, non-transitory, computer-readable medium, such as the memory device(s)  52 , using a processor, such as the processor(s)  50 . 
     Accordingly, in some embodiments, the controller  48  may receive image data (process block  152 ). For example, the controller  48  may receive content of an image frame from an image data source. In some embodiments, the content may include information related to luminance, color, variety of patterns, amount of contrast, change of image data corresponding to an image frame compared to image data corresponding to a previous frame, and/or the like. The controller  48  may also initialize a display pixel row by applying an initial voltage to the display pixel row (process block  154 ). The initial voltage may be a ground voltage or any other suitable voltage that may be used to initialize the display pixel row. 
     The controller  48  may then program the display pixel row based on the image data (process block  156 ). For example, the controller  48  apply a data voltage based on the image data (e.g., a corresponding pixel row of the image data) to the programmable current source  65  such that it produces a target current expected to result in target luminance. The controller  48  may instruct the display pixel row to emit light (process block  158 ) once the display pixel row has been programmed. In some embodiments, the controller  48  instruct a display pixel row to emit light in response to completing the programming of the display pixel row, thereby fixing when the emission period of the display pixel row begins. 
     The controller  48  may then instruct the display pixel row to stop emitting light based on a target luminance of the image data (process block  160 ). For example, if the target luminance of the image data is 60% of a maximum luminance available of the display panel  40 , the controller  48  may instruct the pixel row to stop emitting light after a ratio or percentage (e.g., 60%) of a display period of the image frame has passed, resulting in displaying the image frame at the target luminance. When the start of the emission period is fixed, the duration current is supplied to the OLED  70  may be controlled by adjusting when the display pixel row stops 
     The controller  48  may reset the display pixel row by applying a reset voltage to the display pixel row (process block  162 ). The reset voltage may be any suitable voltage that resets or relaxes the display pixel row and reduces hysteresis by overwriting previous image data stored in the display pixel row. In some embodiments, the reset voltage may be associated with default image data supplied by the current source  65 . The default image may be independent of the image data used to display an image frame to sufficiently reset or relax the display pixel row. For example, the controller  48  may instruct each display pixel in the display pixel row to use a data signal different from data signals associated with the image frame. In additional or alternative embodiments, the reset voltage may be associated with another data voltage based on the image data (e.g., a non-corresponding pixel row of the image data). 
     Thus, in some embodiments, the controller  48  may reset the display pixel row in response to the display pixel row stopping light emission. In this manner, the display pixel row may be reset immediately or shortly after the emission is stopped, thereby maximizing relaxation duration and, thus, reducing likelihood of hysteresis affecting perceived image quality of subsequent image frames. 
     The process  150  may be used to display image data and reset multiple display pixel rows of the display panel  40 . Because the scan drivers  44  of the display panel  40  may be daisy chained together, such that a single control signal may be sent to the set of scan drivers  44  to display an image frame, the single control signal may be used to perform the process  150 . Timing of the control signal may be controlled by propagation of the control signal through the set of scan drivers  44 . 
     The specific embodiments described above have been shown by way of example, and it should be understood that these embodiments may be susceptible to various modifications and alternative forms. It should be further understood that the claims are not intended to be limited to the particular forms disclosed, but rather to cover all modifications, equivalents, and alternatives falling within the spirit and scope of this disclosure. 
     The techniques presented and claimed herein are referenced and applied to material objects and concrete examples of a practical nature that demonstrably improve the present technical field and, as such, are not abstract, intangible or purely theoretical. Further, if any claims appended to the end of this specification contain one or more elements designated as “means for [perform]ing [a function] . . . ” or “step for [perform]ing [a function] . . . ”, it is intended that such elements are to be interpreted under 35 U.S.C. 112(f). However, for any claims containing elements designated in any other manner, it is intended that such elements are not to be interpreted under 35 U.S.C. 112(f).

Metadata:
Filing Date: 20170731
Publication Date: 20190917
Grant Date: 20190917
Priority Date: 20170317
Inventors: LIN, HUNG SHENG
JANGDA, MOHAMMAD ALI
HWANG, INJAE
ZHANG, RUI
GAO, SHENGKUI
NHO, HYUNWOO
YAO, WEI H.
HAJIROSTAM, MOHAMMAD
Assignee: APPLE INC
CPC Classifications: [{"code": "G09G2310/0251", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/064", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2300/0861", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/0257", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G3/3266", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G2310/0289", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2310/08", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/0257", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/064", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2310/0251", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G3/3291", "inventive": true, "first": true, "tree": "[]"}, {"code": "G09G3/3266", "inventive": true, "first": true, "tree": "[]"}, {"code": "G09G3/3275", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G2300/0861", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G3/3233", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G2300/0861", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G3/3233", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G3/3266", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G3/3291", "inventive": true, "first": true, "tree": "[]"}, {"code": "G09G2310/08", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/064", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/0257", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2310/0251", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2310/0289", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/064", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/0257", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2310/08", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2310/0289", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2310/0251", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2300/0861", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G3/3291", "inventive": true, "first": true, "tree": "[]"}, {"code": "G09G3/3266", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G3/3233", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G3/3233", "inventive": true, "first": true, "tree": "[]"}]
Family ID: 63519512