PATENT DOCUMENT

Publication Number: US-9270509-B1
Application Number: US-201414570762-A
Country: US
Kind Code: B1

Title: Devices and methods for orthogonal frequency division multiplexing signal phase shaping

Abstract:
Methods and devices for “shaping” a slope of the phase component of OFDM data symbols in order to decrease an accumulation of phase error are provided. By way of example, a method includes receiving an incoming data signal via a processor of a transmitter. The method further includes computing one or more roots of a first function representing a phase component of the data signal, computing a second function representing the phase component based on the one or more roots, deriving a periodicity of the phase component based on the second function, and deriving a value of a slope of the phase component based at least in part on the periodicity of the phase component to reduce or eliminate an error of the phase component.

Claims:
What is claimed is: 
     
       1. A method, comprising: receiving an incoming data signal via a processor of a transmitter, wherein the data signal comprises an in-phase (I) component and a quadrature (Q) component; computing one or more roots of a first function representing a phase component of the data signal; computing a second function representing the phase component based at least in part on the one or more roots; deriving a periodicity of the phase component based at least in part on the second function; and adjusting a value of a slope of the phase component based at least in part on the periodicity of the phase component, wherein adjusting the value of the slope comprises reducing or substantially eliminating an error of the phase component; recombining an amplitude component and the phase component into a polar coordinate transmission signal following the adjustment of the value of the slope; and transmitting the polar coordinate transmission signal via the transmitter. 
     
     
       2. The method of  claim 1 , wherein receiving the incoming data signal comprises receiving a Cartesian coordinate representation of the data signal. 
     
     
       3. The method of  claim 1 , wherein receiving the incoming data signal comprises receiving a plurality of orthogonal frequency division multiplexing (OFDM) data symbols. 
     
     
       4. The method of  claim 1 , wherein computing the one or more roots of the first function comprises computing one or more zeroes of the first function in a frequency domain. 
     
     
       5. The method of  claim 1 , wherein adjusting the value of the slope comprises adjusting the value of the slope to be equal to a total number N subcarriers of the data signal divided by 2, and wherein N is greater than 0. 
     
     
       6. The method of  claim 1 , wherein adjusting the value of the slope comprises generating a periodic phase signal component. 
     
     
       7. The method of  claim 1 , wherein adjusting the value of the slope comprises deriving a value of a slope of each of a plurality of orthogonal frequency division multiplexing (OFDM) data symbols. 
     
     
       8. The method of  claim 1 , wherein adjusting the value of the slope comprises adjusting the value of the slope to be equal to a value of approximately 0 to attenuate or substantially annul the slope. 
     
     
       9. The method of  claim 1 , wherein adjusting the value of the slope comprises reducing or substantially eliminating a carrier frequency offset (CFO) as the error. 
     
     
       10. An electronic device, comprising:
 a transmitter, comprising:
 a polar modulator device configured to:
 receive a first signal comprising orthogonal frequency division multiplexing (OFDM) data symbols encoded according to in-phase/quadrature (I/Q) vectors; 
 adjust a slope of a phase component of the first signal based at least in part on a periodicity of the phase component, wherein adjusting the slope of the phase component comprises reducing or substantially eliminating an error of the phase component; 
 combine an amplitude component of the first signal and the phase component into a polar coordinate transmission signal; and 
 
 an amplifier configured to generate an electromagnetic signal based on the polar coordinate transmission signal for transmission. 
 
 
     
     
       11. The electronic device of  claim 10 , wherein the second signal comprises a physical layer convergence procedure (PLCP) protocol data unit (PPDU) frame format comprising approximately 52 subcarriers, and wherein the OFDM data symbols are stored into a first subset of the approximately 52 subcarriers. 
     
     
       12. The electronic device of  claim 11 , wherein a second subset of the approximately 52 subcarriers comprises a preamble of the PPDU frame format, and wherein the preamble comprises a plurality of long legacy training field (L-LTF) symbols and a plurality of short legacy training field (S-LTF) symbols. 
     
     
       13. The electronic device of  claim 12 , wherein the polar modulator device is configured to adjust the slope of the phase component by adjusting a slope of each of the plurality of L-LTF symbols. 
     
     
       14. The electronic device of  claim 10 , wherein the polar modulator device is configured to adjust the slope of the phase component by increasing the periodicity of the phase component. 
     
     
       15. The electronic device of  claim 10 , wherein the polar modulator device is configured to adjust a slope of a phase component of each of the OFDM data symbols. 
     
     
       16. The electronic device of  claim 15 , wherein the polar modulator device is configured to adjust the slope of the phase component of each of the OFDM data symbols to reduce or substantially eliminate an accumulation of phase error components between each of the OFDM data symbols. 
     
     
       17. The electronic device of  claim 10 , wherein the polar modulator device is configured to adjust the value of the slope to reduce or substantially eliminate an offset error engendered between a frequency command word (FCW) and a carrier frequency as the phase error. 
     
     
       18. A method, comprising: receiving an incoming orthogonal frequency division multiplexing (OFDM) signal data signal via a processor of a transmitter; deriving a phase component of the OFDM signal via the processor of an electronic device the transmitter, wherein the OFDM signal comprises N number of subcarriers; deriving a slope M i  of the phase component; adjusting the slope M i  of the phase component based at least in part on a periodicity of the phase component, wherein adjusting the slope M i  comprises reducing or substantially eliminating an error of the phase component; combining the phase component and an amplitude component to generate a polar form OFDM transmission signal; and transmitting the polar form OFDM transmission signal via the transmitter. 
     
     
       19. The method of  claim 18 , wherein deriving the slope of the phase component comprises deriving a slope 
       
         
           
             
               
                 
                   M 
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                 = 
                 
                   
                     N 
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                   ≈ 
                   0 
                 
               
               , 
             
           
         
       
       wherein N comprises a total number of subcarriers of the OFDM signal and i comprises a discrete time interval of the OFDM signal, and wherein the total number of subcarriers is greater than 0. 
     
     
       20. The method of  claim 18 , wherein deriving the phase component of the OFDM signal comprises deriving a phase component of each of a plurality OFDM symbols encoded within the OFDM signal. 
     
     
       21. The method of  claim 18 , wherein deriving the phase component of the OFDM signal comprises deriving a phase component expressed by: 
       
         
           
             
               
                 
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       22. The method of  claim 21 , wherein adjusting the slope of the phase component comprises adjusting the slope to a value 
       
         
           
             
               
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       23. The method of  claim 21 , wherein adjusting the slope of the phase component comprises adjusting the slope to a value 
       
         
           
             
               
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       24. The method of  claim 18 , comprising deriving the amplitude component of the OFDM signal. 
     
     
       25. The method of  claim 18 , wherein deriving the slope of the phase component comprises deriving a periodic phase component error, and wherein the periodic phase component error is expressed by:
   ε r   φ ( T )=φ( T )−φ cmd ( T )=∫ 0   T   f   error ( f   cmd ( t ))· dt≈α·∫   0   T   f   cmd ( t )· dt= 0.

Description:
BACKGROUND 
     The present disclosure relates generally to polar transmitters, and more particularly, to polar transmitters included within electronic devices. 
     This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art. 
     Transmitters and receivers are commonly included in various electronic devices, and particularly, portable electronic devices such as, for example, phones (e.g., mobile and cellular phones, cordless phones, personal assistance devices), computers (e.g., laptops, tablet computers), internet connectivity routers (e.g., Wi-Fi routers or modems), radios, televisions, or any of various other stationary or handheld devices. One type of transmitter, known as a wireless transmitter, may be used to generate a wireless signal to be transmitted by way of an antenna coupled to the transmitter. Specifically, the wireless transmitter is generally used to wirelessly communicate data over a network channel or other medium (e.g., air) to one or more receiving devices. 
     The wireless transmitters may generally include subcomponents such as, for example, an oscillator, a modulator, one or more filters, and a power amplifier. Furthermore certain data modulation techniques that may be implemented by wireless transmitters may include a modulation of in-phase (I)/quadrature (Q) time samples of a signal into amplitude and phase signals. However, because certain wireless transmitters may also utilize phase information to modulate the frequency of one or more oscillators included within the wireless transmitters, the output signal, and, by extension, the information to be transmitted may become distorted. It may be useful to provide more advanced and improved wireless transmitters. 
     SUMMARY 
     A summary of certain embodiments disclosed herein is set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of these certain embodiments and that these aspects are not intended to limit the scope of this disclosure. Indeed, this disclosure may encompass a variety of aspects that may not be set forth below. 
     Various embodiments of the present disclosure may be useful in “shaping” a slope of the phase component of orthogonal frequency division multiplexing (OFDM) data symbols in order to decrease an accumulation of phase error. By way of example, a method includes receiving an incoming data signal via a processor of a transmitter. The method further includes computing one or more roots of a first function representing a phase component of the data signal, computing a second function representing the phase component based on the one or more roots, deriving a periodicity of the phase component based on the second function, and deriving a value of a slope of the phase component based at least in part on the periodicity of the phase component to reduce or eliminate an error of the phase component. 
     Various refinements of the features noted above may exist in relation to various aspects of the present disclosure. Further features may also be incorporated in these various aspects as well. These refinements and additional features may exist individually or in any combination. For instance, various features discussed below in relation to one or more of the illustrated embodiments may be incorporated into any of the above-described aspects of the present disclosure alone or in any combination. The brief summary presented above is intended only to familiarize the reader with certain aspects and contexts of embodiments of the present disclosure without limitation to the claimed subject matter. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The patent or application file contains at least one drawing executed in color. Copies of this patent or patent application publication with color drawing(s) will be provided by the Office upon request and payment of the necessary fee. 
       Various aspects of this disclosure may be better understood upon reading the following detailed description and upon reference to the drawings in which: 
         FIG. 1  is a schematic block diagram of an electronic device including a transceiver, in accordance with an embodiment; 
         FIG. 2  is a perspective view of a notebook computer representing an embodiment of the electronic device of  FIG. 1 ; 
         FIG. 3  is a front view of a hand-held device representing another embodiment of the electronic device of  FIG. 1 ; 
         FIG. 4  is a front view of a desktop computer representing another embodiment of the electronic device of  FIG. 1 ; 
         FIG. 5  is a front view and side view of a wearable electronic device representing another embodiment of the electronic device of  FIG. 1 ; 
         FIG. 6  is a block diagram of the transceiver included within the electronic device of  FIG. 1  including a transmitter, in accordance with an embodiment; 
         FIG. 7  is a block diagram of a polar modulator included as part of the transmitter of  FIG. 6 , in accordance with an embodiment; 
         FIG. 8  is a plot diagram illustrating an example of a periodic phase component signal, in accordance with an embodiment; 
         FIG. 9  is a block diagram of a frequency synthesizer included as part of the transceiver of  FIG. 6 , in accordance with an embodiment; 
         FIG. 10  is a flow diagram illustrating an embodiment of a process useful in “shaping” a slope of the phase component of OFDM data symbols in order to decrease an accumulation of phase error, in accordance with an embodiment; and 
         FIG. 11  is a plot diagram illustrating the performance of a WLAN OFDM data signal as a function of error with a “shaped” phase slope, in accordance with an embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     One or more specific embodiments of the present disclosure will be described below. These described embodiments are only examples of the presently disclosed techniques. Additionally, in an effort to provide a concise description of these embodiments, all features of an actual implementation may not be described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers&#39; specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure. 
     When introducing elements of various embodiments of the present disclosure, the articles “a,” “an,” and “the” are intended to mean that there are one or more of the elements. The terms “comprising,” “including,” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements. Additionally, it should be understood that references to “one embodiment” or “an embodiment” of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the recited features. 
     Embodiments of the present disclosure generally relates to techniques for increasing frequency modulation accuracy in orthogonal frequency division multiplexing (OFDM) polar transmitters. For example, the present techniques may include providing a technique to “shape” the phase of OFDM signal symbols in order to decrease an accumulation of phase error between OFDM symbols that may become apparent due to, for example, the translation of an initial calculated frequency command word (FCW) to the frequency of an oscillator of the OFDM polar transmitter. The present techniques may further include a method to detect the offset between the OFDM polar transmitter and a receiver. For example, the frequency offset may be estimated by finding the phase difference between identical samples of a specific training field for carrier frequency offset estimation. Indeed, the present techniques of preventing phase error accumulation may be particularly useful for transmission standards which apply carrier frequency offset estimation algorithms, which may, for example, be based on phase difference between successive symbols. 
     With the foregoing in mind, a general description of suitable electronic devices that may employ polar transmitters and are useful in “shaping” a slope of the phase component of OFDM data symbols in order to decrease an accumulation of phase error will be provided below. Turning first to  FIG. 1 , an electronic device  10  according to an embodiment of the present disclosure may include, among other things, one or more processor(s)  12 , memory  14 , nonvolatile storage  16 , a display  18  input structures  22 , an input/output (I/O) interface  24 , network interfaces  26 , a transceiver  28 , and a power source  29 . The various functional blocks shown in  FIG. 1  may include hardware elements (including circuitry), software elements (including computer code stored on a computer-readable medium) or a combination of both hardware and software elements. It should be noted that  FIG. 1  is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in electronic device  10 . 
     By way of example, the electronic device  10  may represent a block diagram of the notebook computer depicted in  FIG. 2 , the handheld device depicted in  FIG. 3 , the desktop computer depicted in  FIG. 4 , the wearable electronic device depicted in  FIG. 5 , or similar devices. It should be noted that the processor(s)  12  and/or other data processing circuitry may be generally referred to herein as “data processing circuitry.” Such data processing circuitry may be embodied wholly or in part as software, firmware, hardware, or any combination thereof. Furthermore, the data processing circuitry may be a single contained processing module or may be incorporated wholly or partially within any of the other elements within the electronic device  10 . 
     In the electronic device  10  of  FIG. 1 , the processor(s)  12  and/or other data processing circuitry may be operably coupled with the memory  14  and the nonvolatile memory  16  to perform various algorithms. Such programs or instructions executed by the processor(s)  12  may be stored in any suitable article of manufacture that includes one or more tangible, computer-readable media at least collectively storing the instructions or routines, such as the memory  14  and the nonvolatile storage  16 . The memory  14  and the nonvolatile storage  16  may include any suitable articles of manufacture for storing data and executable instructions, such as random-access memory, read-only memory, rewritable flash memory, hard drives, and optical discs. Also, programs (e.g., an operating system) encoded on such a computer program product may also include instructions that may be executed by the processor(s)  12  to enable the electronic device  10  to provide various functionalities. 
     In certain embodiments, the display  18  may be a liquid crystal display (LCD), which may allow users to view images generated on the electronic device  10 . In some embodiments, the display  18  may include a touch screen, which may allow users to interact with a user interface of the electronic device  10 . Furthermore, it should be appreciated that, in some embodiments, the display  18  may include one or more organic light emitting diode (OLED) displays, or some combination of LCD panels and OLED panels. 
     The input structures  22  of the electronic device  10  may enable a user to interact with the electronic device  10  (e.g., pressing a button to increase or decrease a volume level). The I/O interface  24  may enable electronic device  10  to interface with various other electronic devices, as may the network interfaces  26 . The network interfaces  26  may include, for example, interfaces for a personal area network (PAN), such as a Bluetooth network, for a local area network (LAN) or wireless local area network (WLAN), such as an 802.11x Wi-Fi network, and/or for a wide area network (WAN), such as a 3 rd  generation (3G) cellular network, 4 th  generation (4G) cellular network, or long term evolution (LTE) cellular network. The network interface  26  may also include interfaces for, for example, broadband fixed wireless access networks (WiMAX), mobile broadband Wireless networks (mobile WiMAX), asynchronous digital subscriber lines (e.g., ADSL, VDSL), digital video broadcasting-terrestrial (DVB-T) and its extension DVB Handheld (DVB-H), ultra Wideband (UWB), alternating current (AC) power lines, and so forth. 
     In certain embodiments, to allow the electronic device  10  to communicate over the aforementioned wireless networks (e.g., Wi-Fi, WiMAX, mobile WiMAX, 4G, LTE, and so forth), the electronic device  10  may include a transceiver  28 . The transceiver  28  may include any circuitry that may be useful in both wirelessly receiving and wirelessly transmitting signals (e.g., data signals). Indeed, in some embodiments, as will be further appreciated, the transceiver  28  may include a transmitter and a receiver combined into a single unit, or, in other embodiments, the transceiver  28  may include a transmitter separate from the receiver. For example, as noted above, the transceiver  28  may transmit and receive OFDM signals (e.g., OFDM data symbols) to support data communication in wireless applications such as, for example, PAN networks (e.g., Bluetooth), WLAN networks (e.g., 802.11x Wi-Fi), WAN networks (e.g., 3G, 4G, and LTE cellular networks), WiMAX networks, mobile WiMAX networks, ADSL and VDSL networks, DVB-T and DVB-H networks, UWB networks, and so forth. As used herein, “orthogonal frequency division multiplexing (OFDM)” may refer to modulation technique or scheme in which a transmission channel may be divided into a number of orthogonal subcarriers or subchannels to increase data transmission efficiency. Further, in some embodiments, the transceiver  28  may be integrated as part of the network interfaces  26 . As further illustrated, the electronic device  10  may include a power source  29 . The power source  29  may include any suitable source of power, such as a rechargeable lithium polymer (Li-poly) battery and/or an alternating current (AC) power converter. 
     In certain embodiments, the electronic device  10  may take the form of a computer, a portable electronic device, a wearable electronic device, or other type of electronic device. Such computers may include computers that are generally portable (such as laptop, notebook, and tablet computers) as well as computers that are generally used in one place (such as conventional desktop computers, workstations and/or servers). In certain embodiments, the electronic device  10  in the form of a computer may be a model of a MacBook®, MacBook® Pro, MacBook Air®, iMac®, Mac® mini, or Mac Pro® available from Apple Inc. By way of example, the electronic device  10 , taking the form of a notebook computer  30 A, is illustrated in  FIG. 2  in accordance with one embodiment of the present disclosure. The depicted computer  30 A may include a housing or enclosure  32 , a display  18 , input structures  22 , and ports of an I/O interface  24 . In one embodiment, the input structures  22  (such as a keyboard and/or touchpad) may be used to interact with the computer  30 A, such as to start, control, or operate a GUI or applications running on computer  30 A. For example, a keyboard and/or touchpad may allow a user to navigate a user interface or application interface displayed on display  18 . 
       FIG. 3  depicts a front view of a handheld device  30 B, which represents one embodiment of the electronic device  10 . The handheld device  30 B may represent, for example, a portable phone, a media player, a personal data organizer, a handheld game platform, or any combination of such devices. By way of example, the handheld device  30 B may be a tablet-sized embodiment of the electronic device  10 , which may be, for example, a model of an iPad® available from Apple Inc of Cupertino, Calif. 
     The handheld device  30 B may include an enclosure  36  to protect interior components from physical damage and to shield them from electromagnetic interference. The enclosure  36  may surround the display  18 , which may display indicator icons  39 . The indicator icons  38  may indicate, among other things, a cellular signal strength, Bluetooth connection, and/or battery life. The I/O interfaces  24  may open through the enclosure  36  and may include, for example, an I/O port for a hard wired connection for charging and/or content manipulation using a standard connector and protocol, such as the Lightning connector provided by Apple Inc., a universal service bus (USB), or other similar connector and protocol. 
     User input structures  42 , in combination with the display  18 , may allow a user to control the handheld device  30 B. For example, the input structure  40  may activate or deactivate the handheld device  30 B, the input structure  42  may navigate user interface to a home screen, a user-configurable application screen, and/or activate a voice-recognition feature of the handheld device  30 B, the input structures  42  may provide volume control, or may toggle between vibrate and ring modes. The input structures  42  may also include a microphone may obtain a user&#39;s voice for various voice-related features, and a speaker may enable audio playback and/or certain phone capabilities. The input structures  42  may also include a headphone input may provide a connection to external speakers and/or headphones. 
     Turning to  FIG. 4 , a computer  30 C may represent another embodiment of the electronic device  10  of  FIG. 1 . The computer  30 C may be any computer, such as a desktop computer, a server, or a notebook computer, but may also be a standalone media player or video gaming machine. By way of example, the computer  30 C may be an iMac®, a MacBook®, or other similar device by Apple Inc. It should be noted that the computer  30 C may also represent a personal computer (PC) by another manufacturer. A similar enclosure  36  may be provided to protect and enclose internal components of the computer  30 C such as the dual-layer display  18 . In certain embodiments, a user of the computer  30 C may interact with the computer  30 C using various peripheral input devices, such as the keyboard  22  or mouse  38 , which may connect to the computer  30 C via a wired and/or wireless I/O interface  24 . 
     Similarly,  FIG. 5  depicts a wearable electronic device  30 D representing another embodiment of the electronic device  10  of  FIG. 1  that may be configured to operate using the techniques described herein. By way of example, the wearable electronic device  30 D, which may include a wristband  43 , may be an Apple Watch® by Apple, Inc. However, in other embodiments, the wearable electronic device  30 D may include any wearable electronic device such as, for example, a wearable exercise monitoring device (e.g., pedometer, accelerometer, heart rate monitor), or other device by another manufacturer. The display  18  of the wearable electronic device  30 D may include a touch screen (e.g., LCD, OLED display, active-matrix organic light emitting diode (AMOLED) display, and so forth), which may allow users to interact with a user interface of the wearable electronic device  30 D. 
     In certain embodiments, as previously noted above, each embodiment (e.g., notebook computer  30 A, handheld device  30 B, computer  30 C, and wearable electronic device  30 D) of the electronic device  10  may include a transceiver  28 , which may include an orthogonal frequency division multiplexing (OFDM) polar transmitter (e.g., WLAN OFDM polar transmitter). Indeed, as will be further appreciated, the polar transmitter may include a modulator (e.g., digital signal processor (DSP), coordinate rotation digital computer (CORDIC) processor) that may be used to translate the information of an incoming in-phase/quadrature (I/Q) component signal (e.g., Cartesian coordinate representation of an incoming data signal) into respective polar amplitude and phase signals (e.g., polar coordinate representation of the an incoming data signal). Specifically, as will be further appreciated, the polar modulator of the transmitter may generate a translated polar phase component in which the slope of the phase component may be attenuated and/or substantially annulled to generate a periodic phase component in which any phase error accumulation between the individual OFDM data symbols may be reduced or substantially eliminated. 
     With the foregoing in mind,  FIG. 6  depicts a transmitter  44  that may be included as part of the transceiver  28 . Although not illustrated, it should be appreciated that the transceiver  28  may also include a receiver that may be coupled to the transmitter  44 . As depicted, the transmitter  44  may receive a signal  45  that may be modulated via a polar modulator  46 . In certain embodiments, the transmitter  44  may receive a Cartesian coordinate represented signal  45 , which may include, for example, data symbols encoded according to orthogonal in-phase (I) and quadrature (Q) vectors. Thus, when an I/Q signal is converted into an electromagnetic wave (e.g., radio frequency (RF) signal, microwave signal, millimeter wave signal), the conversion is generally linear as the I/Q maybe frequency band-limited. However, in certain embodiments, the polar modulator  46  may be used to translate the I/Q vector components of the signal  45  into a polar coordinate representation of the signal  45 , in which OFDM data symbols may be encoded according to an amplitude component and a phase component as illustrated. 
     For example, in certain embodiments, the polar modulator  46  may include a digital signal processor (DSP), a coordinate rotation digital computer (CORDIC), or other processing device that may be used to process and preprocess the individual Cartesian represented data symbols (e.g., OFDM symbols) into polar coordinate amplitude and phase components. 
     As further depicted in  FIG. 6 , the transmitter  44  may also include digital-to-analog converters (DACs)  48 A and  48 B that may be used to convert (e.g., sample) the polar amplitude component and the phase component of the signal  45  into digital signal components. As further illustrated, the phase component signal may be then passed to a mixer  52 , which may be used to mix (e.g., upconvert or downconvert) the frequency of the polar phase component signal with the frequency of a local oscillator (LO)  50  to generate, for example, a radio frequency (RF) (e.g., f out ) signal for transmission. In one embodiment, the polar amplitude component signal may be passed through an amplifier  56  (e.g., envelop amplifier) that may be used to track and adjust the envelope of the polar amplitude component signal. Lastly, the polar amplitude component signal and the polar phase component signal may be each passed to a high power amplifier (HPA)  54  to generate an electromagnetic signal (e.g., radio frequency (RF) signal, microwave signal, millimeter wave signal) at the RF frequency to transmit (e.g., via an antenna coupled to the transmitter  44 ). 
     In some embodiments, because the transmitter  44  (e.g., OFDM polar transmitter) may utilize phase information to modulate (e.g., directly or indirectly) the frequency of, for example, the oscillator  50 , an inherent constraint on the modulation accuracy may be experienced due to the accuracy of the translation from, for example, a digital frequency command word (FCW) to an actual electromagnetic signal at the RF frequency. Thus, in one embodiment, for example, the frequency of the output (e.g., f out ) of the HPA  54  may be generally expressed as:
 
 f   out   =f   carrier   +f   cmd   +f   error ( f   cmd )  equation (1).
 
     In equation (1), f cmd  may represent, for example, a frequency command word (FCW) (e.g., which may include frequency multiplication ratio). Similarly, f error (f cmd ) may include the frequency error, and, in one embodiment, may include a linear function of the FCW f cmd . For example, the linear error function of the of the FCW f cmd  (e.g., f error (f cmd )) may be generally expressed as:
 
 f   error ( f   cmd )≈α· f   cmd   equation (2).
 
     Accordingly, as will be further appreciated, the polar modulator  46  may deduce based on, for example, equations (1) and (2) that an accumulation of phase error between OFDM data symbols may be prevented when each transmitted OFDM data symbol includes a periodic phase. Thus, based on equation (2), the phase error accumulated during a symbol duration (T) may be generally expressed as: 
                     ɛ   ⁢           ⁢       r   φ     ⁡     (   T   )         =         φ   ⁡     (   T   )       -       φ   cmd     ⁡     (   T   )         =           ∫   0   T     ⁢         f   error     ⁡     (       f   cmd     ⁡     (   t   )       )       ·           ⁢     ⅆ   t         ≈     α   ·       ∫   0   T     ⁢         f   cmd     ⁡     (   t   )       ·           ⁢     ⅆ   t             =   0.               equation   ⁢           ⁢     (   3   )                 
Thus, as will be further appreciated, it may be useful provide a technique to “shape” (e.g., adjust) the phase of the OFDM data symbols in order to decrease an accumulation of phase error between the individual OFDM data symbols that may become apparent in the frequency (e.g., f out ) of the output signal of the HPA  54  and also at a receiver that may receive the output signal.
 
     Referring now to  FIG. 7 , a number of computational blocks (e.g., computational blocks  60 ,  62 ,  64 , and  66 ), which may be used to “shape” (e.g., adjust) the phase of OFDM data symbols in order to decrease an accumulation of phase error between OFDM data symbols may be provided. In certain embodiments, the computational blocks  60 ,  62 ,  64 , and  66  may each include a software system, a hardware system, or some combination of hardware and software that may be implemented as part of the polar modulator  46  (e.g., DSP, CORDIC). During operation, for example, a frequency-domain (e.g., frequency-dependent) signal  58  (e.g., {X k }) may be provided to the polynomial roots calculation block  60 . In one embodiment, the frequency-domain signal  58  (e.g., {X k }) may include, for example, the complex Fourier coefficients of a signal representation of a OFDM data symbol or a stream of OFDM data symbols. The polynomial roots calculation block  60  may, in conjunction with the Fourier coefficients calculation block  62 , and the fast Fourier transform (FFT) and/or inverse fast Fourier transform (IFFT) block  64 , may be used to calculate a Fourier series representation of the amplitude component and the phase component. For example, in one embodiment, the time-domain (e.g., time-dependent) representation or form of the signal  58  (e.g., {X k }) may be expressed as: 
     
       
         
           
             
               
                 
                   
                     x 
                     ⁡ 
                     
                       ( 
                       t 
                       ) 
                     
                   
                   = 
                   
                     
                       ∑ 
                       
                         k 
                         = 
                         
                           
                             - 
                             N 
                           
                           / 
                           2 
                         
                       
                       
                         
                           N 
                           2 
                         
                         - 
                         1 
                       
                     
                     ⁢ 
                     
                       
                         
                           X 
                           k 
                         
                         ⨯ 
                         
                           ⅇ 
                           
                             j2π 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             
                               f 
                               k 
                             
                             ⁢ 
                             t 
                           
                         
                       
                       . 
                     
                   
                 
               
               
                 
                   equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   
                     ( 
                     4 
                     ) 
                   
                 
               
             
           
         
       
     
     In equation (4), x(t) may represent, for example, a time-domain function (e.g., continuous time signal) of one or more OFDM data symbols included within an OFDM data signal. Specifically, an OFDM data signal may include a physical layer convergence procedure (PLCP) protocol data unit (PPDU) frame format, which may include approximately 52 subcarriers per symbol for data transmission. In equation (4), f k  may represent the central frequency of the k th  subcarrier or tone (e.g., k is the order of the subcarriers of the time-domain function x(t)) of the time-domain function x(t) representing one or more OFDM data symbols and N may represent a total numbers of tones or subcarriers, and may be a function of a period T s  of the time-domain function x(t). As noted above, the term X k  may represent the complex coefficients (e.g., complex amplitude) of, for example, transmitted bits of the data symbols (e.g., OFDM data symbols). 
     In certain embodiments, the polynomial roots calculation block  60  may then transform the signal  58  (e.g., continuous signal x(t) of equation (4)) from the time-domain into the Z-domain to characterize the signal  58  in terms of the roots of the function, or more specifically, the poles and zeroes of the signal  58 . For example, the Z-domain representation of the signal  58  (e.g., continuous signal x(t) of equation (4)) may be expressed as: 
     
       
         
           
             
               
                 
                   
                     
                       x 
                       ⁡ 
                       
                         ( 
                         z 
                         ) 
                       
                     
                     ⁢ 
                     
                       = 
                       def 
                     
                     ⁢ 
                     
                       
                         polynomial 
                         ⁢ 
                         
                           { 
                           
                             X 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             k 
                           
                           } 
                         
                       
                       = 
                       
                         
                           
                             ∑ 
                             
                               k 
                               = 
                               
                                 - 
                                 
                                   N 
                                   2 
                                 
                               
                             
                             
                               
                                 N 
                                 2 
                               
                               - 
                               1 
                             
                           
                           ⁢ 
                           
                             
                               X 
                               k 
                             
                             ⨯ 
                             
                               z 
                               k 
                             
                           
                         
                         = 
                         
                           x 
                           ⁡ 
                           
                             ( 
                             t 
                             ) 
                           
                         
                       
                     
                   
                   , 
                   
                     
                       f 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       or 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       z 
                     
                     = 
                     
                       
                         ⅇ 
                         
                           j 
                           ⁢ 
                           
                             
                               2 
                               ⁢ 
                               π 
                             
                             
                               T 
                               s 
                             
                           
                         
                       
                       . 
                     
                   
                 
               
               
                 
                   equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   
                     ( 
                     5 
                     ) 
                   
                 
               
             
           
         
       
     
     In certain embodiments, once the polynomial roots calculation block  60  transforms the signal  58  (e.g., continuous signal x(t) of equation (2)) from the time-domain into the Z-domain, the polynomial roots calculation block  60  may then calculate the zeroes of the signal  58  (e.g., the Z-domain representation of the continuous signal x(t) of equation (4)) based on, for example, the fundamental theorem of algebra. Thus, the Z-domain representation x(z) of the signal  58  may be then expressed as: 
     
       
         
           
             
               
                 
                   
                     x 
                     ⁡ 
                     
                       ( 
                       z 
                       ) 
                     
                   
                   = 
                   
                     
                       z 
                       
                         
                           M 
                           i 
                         
                         - 
                         
                           N 
                           / 
                           2 
                         
                       
                     
                     ⨯ 
                     
                       ( 
                       
                         
                           X 
                           
                             
                               N 
                               2 
                             
                             - 
                             1 
                           
                         
                         ⁢ 
                         
                           
                             ∏ 
                             
                               m 
                               = 
                               1 
                             
                             
                               M 
                               0 
                             
                           
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           
                             ( 
                             
                               
                                 - 
                                 1 
                               
                               
                                 b 
                                 m 
                               
                             
                             ) 
                           
                         
                       
                       ) 
                     
                     ⨯ 
                     
                       
                         ∏ 
                         
                           m 
                           = 
                           1 
                         
                         
                           M 
                           i 
                         
                       
                       ⁢ 
                       
                         
                           ( 
                           
                             1 
                             - 
                             
                               
                                 a 
                                 m 
                               
                               ⁢ 
                               
                                 z 
                                 
                                   - 
                                   1 
                                 
                               
                             
                           
                           ) 
                         
                         ⨯ 
                         
                           
                             ∏ 
                             
                               m 
                               = 
                               1 
                             
                             
                               M 
                               0 
                             
                           
                           ⁢ 
                           
                             
                               ( 
                               
                                 1 
                                 - 
                                 
                                   
                                     b 
                                     m 
                                   
                                   ⁢ 
                                   z 
                                 
                               
                               ) 
                             
                             . 
                           
                         
                       
                     
                   
                 
               
               
                 
                   equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   
                     ( 
                     6 
                     ) 
                   
                 
               
             
           
         
       
     
     As illustrated in equation (6), the terms {a m } and {b m } may represent, for example, the zeros of the Z-domain representation x(z) (e.g., corresponding to the continuous signal x(t) of equation (2)) inside and outside of the unit circle (e.g., where 
               z   =     ⅇ     j   ⁢       2   ⁢   π       T   s             ,         
and graphically represented as a circle in the real and imaginary plane having a radius of approximately 1), respectively. In other embodiments, the polynomial roots calculation block  60  may calculate the zeroes {a m } and {b m } of the Z-domain representation x(z)(e.g., equation (4)) by, for example, generating a companion matrix of the Z-domain representation x(z)(e.g., equation (4)) through QR factorization.
 
     In certain embodiments, once the polynomial roots calculation block  60  calculate the zeroes {a m } and {b m }, the polynomial roots calculation block  60  may then pass the zeroes {a m } and {b m } to the Fourier series calculation block  62 . The Fourier series calculation block  62  may then utilize the zeroes {a m } and {b m } to calculate the Fourier coefficients corresponding to each of the k subcarriers of the OFDM signal. Specifically, the Fourier series calculation block  62  may first calculate the logarithm of the of the Z-domain representation x(z)(e.g., equation (4)), which may be expressed as: 
     
       
         
           
             
               
                 
                   
                     log 
                     ⁡ 
                     
                       ( 
                       
                         x 
                         ⁡ 
                         
                           ( 
                           z 
                           ) 
                         
                       
                       ) 
                     
                   
                   = 
                   
                     
                       
                         ( 
                         
                           
                             M 
                             i 
                           
                           - 
                           
                             N 
                             2 
                           
                         
                         ) 
                       
                       ⁢ 
                       
                         log 
                         ⁡ 
                         
                           ( 
                           z 
                           ) 
                         
                       
                     
                     + 
                     
                       log 
                       ⁡ 
                       
                         ( 
                         A 
                         ) 
                       
                     
                     + 
                     
                       
                         ∑ 
                         
                           m 
                           = 
                           1 
                         
                         
                           M 
                           i 
                         
                       
                       ⁢ 
                       
                         log 
                         ⁡ 
                         
                           ( 
                           
                             1 
                             - 
                             
                               
                                 a 
                                 m 
                               
                               ⁢ 
                               
                                 z 
                                 
                                   - 
                                   1 
                                 
                               
                             
                           
                           ) 
                         
                       
                     
                     + 
                     
                       
                         ∑ 
                         
                           m 
                           = 
                           1 
                         
                         
                           M 
                           i 
                         
                       
                       ⁢ 
                       
                         
                           log 
                           ⁡ 
                           
                             ( 
                             
                               1 
                               - 
                               
                                 
                                   b 
                                   m 
                                 
                                 ⁢ 
                                 z 
                               
                             
                             ) 
                           
                         
                         . 
                       
                     
                   
                 
               
               
                 
                   equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   
                     ( 
                     7 
                     ) 
                   
                 
               
             
           
         
       
     
     Then, performing a power series expansion of the terms Σ m=1   M     i   (1−a m z −1 ) and Σ m=1   M     i   (1−a m z −1 ) of equation (7), the FFT block  68  may then generate an equality phase component based on, for example, the logarithm of the of the Z-domain representation x(z)(e.g., equation (5)). Specifically, the FFT and/or IFFT block  64  may be used to perform one or more fast Fourier transforms (FFTs) and/or inverse fast Fourier transforms (IFFTs) to compute one or more discrete Fourier transforms (DFTs) and/or inverse discrete Fourier transforms (IDFTs) on the signal  58 , for instance. For example, based on equation (7), the FFT and/or IFFT block  64  may generate the following expression for the phase component: 
     
       
         
           
             
               
                 
                   
                     ∠x 
                     ⁡ 
                     
                       ( 
                       t 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         ( 
                         
                           
                             M 
                             i 
                           
                           - 
                           
                             N 
                             2 
                           
                         
                         ) 
                       
                       · 
                       
                         
                           2 
                           ⁢ 
                           π 
                         
                         T 
                       
                       · 
                       t 
                     
                     + 
                     ∠A 
                     + 
                     
                       
                         ∑ 
                         
                           m 
                           = 
                           1 
                         
                         
                           M 
                           i 
                         
                       
                       ⁢ 
                       
                         ( 
                         
                           1 
                           - 
                           
                             
                               a 
                               m 
                             
                             ⁢ 
                             
                               ⅇ 
                               
                                 
                                   - 
                                   j 
                                 
                                 ⁢ 
                                 
                                   
                                     2 
                                     ⁢ 
                                     π 
                                   
                                   
                                     T 
                                     s 
                                   
                                 
                                 ⁢ 
                                 t 
                               
                             
                           
                         
                         ) 
                       
                     
                     + 
                     
                       
                         ∑ 
                         
                           m 
                           = 
                           1 
                         
                         
                           M 
                           0 
                         
                       
                       ⁢ 
                       
                         
                           ( 
                           
                             1 
                             - 
                             
                               
                                 b 
                                 m 
                               
                               ⁢ 
                               
                                 ⅇ 
                                 
                                   j 
                                   ⁢ 
                                   
                                     
                                       2 
                                       ⁢ 
                                       π 
                                     
                                     
                                       T 
                                       s 
                                     
                                   
                                   ⁢ 
                                   t 
                                 
                               
                             
                           
                           ) 
                         
                         . 
                       
                     
                   
                 
               
               
                 
                   equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   
                     ( 
                     8 
                     ) 
                   
                 
               
             
           
         
       
     
     In certain embodiments, as may be appreciated from equation (8), the polar modulator  46  may derive that the phase component of a given OFDM data symbol may become periodic with a period T s  when the term representing the slope of the phase 
             (       e   .   g   .     ,       (       M   i     -     N   2       )     ·       2   ⁢   π     T     ·   t       )         
becomes a value of approximately 0, or, more aptly, when the slope term
 
             (       e   .   g   .     ,           ⁢     when   ⁢           ⁢     (       M   i     =     N   2       )         )         
M i  and/or
 
               M   i     =     N   2           
becomes a value of 0
 
               (       e   .   g   .     ,       when   ⁢           ⁢     M   i       =         N   2     ⁢           ⁢     and/or     ⁢           ⁢     M   i       ≈     N   2           )     .         
Thus, the polar modulator  46  (e.g., DSP, CORDIC) may generate a translated polar phase component in which the slope M i  and/or slope term
 
               M   i     -     N   2           
of the phase component may be attenuated or substantially annulled. In this way, the polar modulator  46  may generate a periodic phase component in which any phase error accumulation between the individual OFDM data symbols based on, for example, carrier frequency offset (CFO) (e.g., f error ) and/or the translation of the calculated FCW f cmd  (e.g., f error (f cmd )) into the output frequency (e.g., f out ) may be reduced or substantially eliminated. That is, the polar modulator  46  may “shape” the slope
 
                   (e.g., adjust or iteratively adjust the slope such that      ⁢     M   i       =         N   2     ⁢           ⁢     and/or     ⁢           ⁢     M   i       ≈     N   2         )         
of the phase component of the individual OFDM data symbols in order to reduce or substantially eliminate the accumulation of phase error between the individual OFDM data symbols that may otherwise become distorted when the output frequency signal is received, for example, at a receiver in communication with the transmitter  44 .
 
     Furthermore, in certain embodiments, due to the fact that the transmitter  44  may be sensitive to frequency errors, the frequency offset (e.g., f error ) may be also estimated by determining the phase difference between identical samples or subcarriers of a specific training field (e.g., legacy long training field (L-LTF)) of, for example, the PPDU of the OFDM signal T s  seconds apart, as expressed by: 
     
       
         
           
             
               
                 
                   
                     Δ 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     f 
                   
                   = 
                   
                     
                       
                         - 
                         
                           
                             F 
                             s 
                           
                           
                             N 
                             FTT 
                           
                         
                       
                       · 
                       
                         1 
                         
                           2 
                           ⁢ 
                           π 
                         
                       
                       · 
                       arg 
                     
                     ⁢ 
                     
                       
                         { 
                         
                           
                             
                               S 
                               out 
                             
                             ⁡ 
                             
                               [ 
                               n 
                               ] 
                             
                           
                           · 
                           
                             
                               S 
                               out 
                               * 
                             
                             ⁡ 
                             
                               [ 
                               
                                 n 
                                 - 
                                 
                                   N 
                                   FTT 
                                 
                               
                               ] 
                             
                           
                         
                         } 
                       
                       . 
                     
                   
                 
               
               
                 
                   equation 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   
                     ( 
                     9 
                     ) 
                   
                 
               
             
           
         
       
     
     In equation (9), S out  [n] may represent, for example, a discrete-time output signal (e.g., at the output of the amplifier  54 ), while S* out [n−N FTT ] may represent, for example, a complex conjugate of the discrete-time output signal time shifted by N FTT . As may be appreciated, when the transmitter  44  experiences distortion (e.g., CFO or Doppler shift) in the translation of the calculated FCW f cmd  (e.g., f error (f cmd )) into the output frequency (e.g., f out ), the linear slope of the phase of a given OFDM data symbol (e.g., unwrapped phase) may not be periodic, and may thus allow distortion to be translated into frequency offset. However, because the presently disclosed techniques may ensure periodicity in the phase component of each of the training field OFDM data symbols by attenuating or substantially annulling the slope of the phase of the individual OFDM data symbols, the overall OFDM data transmission may be substantially more robust and accurate. As further illustrated in  FIG. 7 , the phase component (e.g., {φ n }) and logarithm of the amplitude component (e.g., {log|a n |}) may be then each passed to a log base  2  addition and windowing block  66  to, for example, equalize or limit the phase component (e.g., {φ n }) and a logarithm of the amplitude component (e.g., {log|a n |}), and to generate a time-domain translated phase component (e.g., φ n ) and amplitude component (e.g., a n ) to be recombined and transmitted. 
     For example,  FIG. 8  depicts a phase plot  67 , which illustrates a periodic phase component signal  68 . Specifically, in one embodiment, the phase component signal  68 , which as depicted may include a discrete-time signal, may correspond to the phase component signal as expressed above by equation (8). As further illustrated, utilizing one or more available bins within an OFDM symbol spectrum, any slope of the phase component signal  68  is attenuated or substantially annulled, and thus the phase component signal  68  is depicted as periodic. The phase plot  67  further illustrates that any phase error accumulation between OFDM symbols is eliminated by utilizing the present techniques of “shaping” the slope of the phase component signal  68  to generate a periodic phase component signal  68 . 
     Turning now to  FIG. 9 , a frequency synthesizer  69  that may, in some embodiments, be included as part of the polar modulator  46  of the transmitter  44  is presented. In other embodiments, the frequency synthesizer  69  may be included as part of the phase path (e.g., phase branch) of the transmitter  44 . Specifically, in certain embodiments, the frequency synthesizer  69  may include, for example, a  2 -Point direct frequency modulation frequency synthesizer that may be used to perform a direct modulation of the FCW (e.g., f cmd ) and the carrier frequency (e.g., f carrier ) and thus compensate for CFO (e.g., f error ) For example, during operation, a data signal  58  may be provided to a pulse filter  70  to filter the signal  58 . Similarly, an FCW (e.g., f cmd ) input may be provided to a reference phase accumulator (RPA)  72 , which may also receive a reference frequency input (e.g., f ref ) via a time-to-digital converter (TDC)  74 . The TDC  74  may be used to generate, for example, a value indicative of the phase difference between one or more clocks of the synthesizer  69  and the reference frequency input (e.g., f ref ) and to provide the value to the RPA  72 . 
     The phase difference value may be also provided to a mixer  76  to multiply the phase difference value by a generated DCO period normalization value. A phase detector  78  may then sum these various phase values, and generate a total phase signal (e.g., φ n [k]) to provide to a loop filter  80 . The summed phase signal may be then passed to a digitally controlled oscillator (DCO) gain normalization block  82  to, for example, modulate or tune the summed phase signal (e.g., shape the slope of the summed phase signal) before being modulated or tuned once more via a DCO  84  to generate a carrier frequency signal. In one embodiment, as further illustrated, the carrier frequency signal may be fed back to the phase detector  78  via an oscillator phase accumulator  86  and a sampler  88 , and may thus allow the DCO gain normalization block  82  to constantly adjust the summed phase signal. The carrier frequency signal may be then passed to a digital phase accumulator (DPA)  90  to generate an RF signal for transmission. 
     Turning now to  FIG. 10 , a flow diagram is presented, illustrating an embodiment of a process  100  useful in “shaping” (e.g., adjusting) a slope of the phase component of OFDM data symbols in order to decrease the accumulation of phase error between the individual OFDM data symbols that may become apparent in the output frequency (e.g., f out ) by using, for example, the polar modulator  46  included within the transceiver  28  depicted in  FIG. 1 . The process  100  may include code or instructions stored in a non-transitory machine-readable medium (e.g., the memory  14 ) and executed, for example, by the one or more processor(s)  12  and/or the polar modulator  46  included within the system  10  and illustrated in  FIG. 6 . The process  100  may begin with the polar modulator  46  receiving (block  102 ) a Cartesian representation of a data signal. For example, the polar modulator  46  may receive a Cartesian coordinate represented signal  45 , which may include, for example, OFDM data symbols encoded according to orthogonal I/Q vectors. 
     The process  100  may then continue with the polar modulator  46  computing (block  104 ) one or more roots of a phase component of the data signal. For example, as discussed above with respect to  FIG. 7 , the polar modulator  46  may calculate the zeroes of the phase component. The process  100  may then continue with the polar modulator  46  determining (block  106 ) a period of the phase component based on the calculated roots (e.g., zeroes). Specifically, as previously noted, the polar modulator  46  may derive that the phase component of a given OFDM data symbol may become periodic with a period T s  when the term representing the slope of the phase (e.g., 
             (       e   .   g   .     ,       (       M   i     -     N   2       )     ·       2   ⁢   π     T     ·   t       )         
becomes a value of 0, or when
 
               M   i     =         N   2     ⁢           ⁢     and/or     ⁢           ⁢     M   i       ≈       N   2     .             
The process  100  may then conclude with the polar modulator  46  adjusting (block  108 ) a slope of the phase component based on the period to reduce or eliminate an error of the phase component of the OFDM data symbols. For example, the polar modulator  46  may “shape” the slope of the phase component, such that the slope is characterized by
 
             (       M   i     =     N   2       )         
of the individual OFDM data symbols in order to reduce or eliminate any accumulation of phase error between the individual OFDM data symbols that may otherwise become distorted when the output frequency signal (e.g., f out ) is received, for example, at a receiver in communication with the transmitter  44 .
 
       FIG. 11  depicts a plot  110 , which illustrates the performance of a WLAN OFDM data signal  112  as a function of error (e.g., error-vector magnitude (EVM)) in K DCO  estimation error percentage without using the presently disclosed phase slope shaping techniques, and the performance of a WLAN OFDM data signal  114  as a function of EVM in K DCO  estimation error percentage when using the presently disclosed techniques of phase slope shaping of OFDM data symbols. As illustrated, the WLAN OFDM data signal  112  may experience substantial distortion (e.g., as illustrated by the sharp rise) due to, for example, frequency offset error (e.g., f error ) that may be caused by the tuning inconsistencies and/or one or more Doppler shifts in the carrier frequency signal. On the other hand, by shaping or adjusting the slope of the phase component as described herein, any accumulation of phase error between the individual OFDM data symbols may be reduced or eliminated as illustrated by the substantially linear WLAN OFDM data signal  114 . 
     The specific embodiments described above have been shown by way of example, and it should be understood that these embodiments may be susceptible to various modifications and alternative forms. It should be further understood that the claims are not intended to be limited to the particular forms disclosed, but rather to cover all modifications, equivalents, and alternatives falling within the spirit and scope of this disclosure.

Metadata:
Filing Date: 20141215
Publication Date: 20160223
Grant Date: 20160223
Priority Date: 20141215
Inventors: AGON ZOHAR
Assignee: APPLE INC
CPC Classifications: [{"code": "H04L27/367", "inventive": true, "first": false, "tree": "[]"}, {"code": "H04L27/2627", "inventive": true, "first": true, "tree": "[]"}, {"code": "H04L27/2627", "inventive": true, "first": true, "tree": "[]"}, {"code": "H04L27/361", "inventive": true, "first": false, "tree": "[]"}, {"code": "H04L27/2627", "inventive": true, "first": true, "tree": "[]"}, {"code": "H04L27/361", "inventive": true, "first": false, "tree": "[]"}, {"code": "H04L27/367", "inventive": true, "first": false, "tree": "[]"}, {"code": "H04L27/2627", "inventive": true, "first": false, "tree": "[]"}, {"code": "H04L27/2602", "inventive": true, "first": true, "tree": "[]"}, {"code": "H04L27/361", "inventive": true, "first": false, "tree": "[]"}, {"code": "H04L27/367", "inventive": true, "first": false, "tree": "[]"}]
Family ID: 54695829