PATENT DOCUMENT

Publication Number: US-11818912-B2
Application Number: US-201916670071-A
Country: US
Kind Code: B2

Title: Organic light-emitting diode display panels with moisture blocking structures

Abstract:
A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.

Claims:
What is claimed is: 
     
       1. A display, comprising:
 a substrate having a panel edge; 
 thin-film transistor (TFT) layers formed on the substrate, wherein organic light-emitting diode display pixel structures are formed in the TFT layers within an active area of the display; 
 anode and cathode layers formed over the TFT layers; 
 organic emissive material with a first portion that is formed between the anode and cathode layers and with a second portion that extends to the panel edge; 
 an organic emissive layer disconnecting structure formed at least partially through the TFT layers and disposed between the first portion of the organic emissive material and the second portion of the organic emissive material, wherein the organic emissive layer disconnecting structure is configured to create a gap that physically detaches the first portion of the organic emissive material from the second portion of the organic emissive material; and 
 a crack stopper structure formed on the substrate, wherein the crack stopper structure is configured to prevent cracks from propagating into the display from the panel edge, wherein the crack stopper structure is formed in the TFT layers and extends above the TFT layers, and wherein the organic emissive material is formed over the crack stopper structure. 
 
     
     
       2. The display of  claim 1 , wherein the organic emissive layer disconnecting structure is configured to create one or more additional gaps that physically detach the first portion of the organic emissive material from the second portion of the organic emissive material. 
     
     
       3. The display of  claim 1 , wherein the organic emissive layer disconnecting structure is formed only partially through the TFT layers. 
     
     
       4. The display of  claim 1 , wherein the organic emissive layer disconnecting structure comprises a trench formed at least partially through the TFT layers. 
     
     
       5. The display of  claim 4 , wherein the trench has enlarged sidewalls forming overhang portions devoid of the organic emissive material. 
     
     
       6. The display of  claim 4 , wherein the trench has separately etched undercut portions devoid of the organic emissive material. 
     
     
       7. The display of  claim 4 , wherein the trench has sidewalls with multiple levels of ledges and wherein portions under each of the ledges are devoid of the organic emissive material. 
     
     
       8. The display of  claim 4 , wherein the trench has an undercut portion formed at a topmost opening of the trench. 
     
     
       9. The display of  claim 4 , wherein the trench has an undercut portion formed at an intermediate position between a topmost opening of the trench and a bottom of the trench. 
     
     
       10. The display of  claim 4 , wherein the trench has an undercut portion formed on only one side of the trench. 
     
     
       11. The display of  claim 1 , wherein the organic emissive layer disconnecting structure comprises a plurality of trenches formed at least partially through the TFT layers. 
     
     
       12. The display of  claim 1 , wherein the organic emissive layer disconnecting structure comprises an island structure having an undercut region that is formed on at least one side of the island structure and that is devoid of the organic emissive material. 
     
     
       13. A display, comprising:
 a substrate; 
 thin-film transistor layers formed over the substrate; 
 a light emissive layer formed over the thin-film transistor layers; and 
 a moisture blocking structure formed at least partially through the thin-film transistor layers, wherein the moisture blocking structure is configured to introduce one or more gaps in the light emissive layer to disconnect respective portions of light emissive material in the light emissive layer from each other, wherein the moisture blocking structure comprises a trench formed at least partially through the thin-film transistor layers, wherein the thin-film transistor layers comprise alternating layers of two different dielectric materials, and wherein the trench comprises a sidewall having overlapping undercut portions formed in the alternating layers of two different dielectric materials. 
 
     
     
       14. The display of  claim 13 , wherein the overlapping undercut portions are devoid of the light emissive material. 
     
     
       15. The display of  claim 13 , wherein the light emissive layer is configured to generate light when current passes through the light emissive layer. 
     
     
       16. A display having an active area and an edge region, comprising:
 a substrate; 
 thin-film transistor (TFT) layers formed on the substrate; 
 an organic layer having a first portion formed on the TFT layers at the active area and having a second portion formed on the TFT layers at the edge region; 
 a disconnecting structure at the edge region formed at least partially through the TFT layers, wherein the disconnecting structure is configured to sever the first portion of the organic layer from the second portion of the organic layer and wherein the disconnecting structure comprises a trench formed only partially through the TFT layers; and 
 a crack stopper structure formed on the substrate, wherein the crack stopper structure is configured to prevent cracks from propagating into the display through the edge region and wherein the disconnecting structure is interposed between the crack stopper structure and the active area of the display. 
 
     
     
       17. The display of  claim 16 , wherein the display has a rectangular footprint, and the edge region runs along at least one peripheral edge of the rectangular footprint. 
     
     
       18. The display of  claim 16 , wherein the organic layer is an organic emissive layer configured to generate display light. 
     
     
       19. The display of  claim 1 , wherein the crack stopper structure is between the organic emissive layer disconnecting structure and the active area of the display.

Description:
This application claims the benefit of provisional patent application No. 62/788,562, filed Jan. 4, 2019, which is hereby incorporated by reference herein in its entirety. 
    
    
     BACKGROUND 
     This relates generally to electronic devices, and, more particularly, to electronic devices with displays. 
     Electronic devices such as cellular telephones, computers, and other electronic devices often contain displays. A display includes an array of pixels for displaying images to a user. In an organic light-emitting diode display, each light-emitting diode has electrodes (i.e., an anode and a cathode). Emissive material is interposed between the anode and cathode electrodes. During operation, current passes between the anode and cathode electrodes through the emissive material to generate light. 
     A display panel of an electronic device has an active display area within one or more display panel edges. Pixels formed from thin-film circuitry in the active area of the display may be protected using a thin-film encapsulation layer. The thin-film encapsulation layer can help protect the pixels from damage due to environmental exposure. When encapsulation material is used in forming a display, one or more dam structures have to be formed along the display panel edge(s) to contain the encapsulation layer. Formation of the dam structures can, however, increase the display border width. Moreover, in certain display arrangements where the emissive material (which is often an organic layer) extends all the way to the panel edge, there is a risk that moisture can still penetrate into the active area of the display through the organic emissive layer and under the thin-film encapsulation layer, which can severely damage and negatively affect the performance of the display. 
     SUMMARY 
     An organic light-emitting diode (OLED) display may include a substrate having a panel edge, thin-film transistor (TFT) layers formed on the substrate, anode and cathode layers formed over the TFT layers, an organic emissive layer that is formed between the anode and cathode layers and that extends from an active area of the display all the way to the panel edge, and an organic emissive layer disconnecting structure formed at least partially through the TFT layers. The organic emissive layer disconnecting structure is configured to prevent moisture permeation through the organic emissive layer into the active area of the display by introducing one or more gaps in the organic emissive layer. The organic emissive layer may be formed via chemical evaporation deposition techniques. Thus, the organic emissive layer disconnecting structure may sometimes be referred to as an evaporation layer gap generation structure. 
     The organic emissive layer disconnecting structure may include one or more trenches formed at least partially through the TFT layers. In one variation, the trench may have enlarged sidewalls forming overhang portions devoid of organic emissive material. In another variation, the trench may have separately etched undercut portions devoid of organic emissive material. In yet another variation, the trench may have sidewalls with multiple levels of ledges, where portions under each of the ledges is devoid of organic emissive material. If desired, the trench may have undercut/overhang recessed portions formed at the topmost opening of the trench. In other suitable arrangements, the trench may have undercut/overhang recessed portions formed at an intermediate depth between the topmost opening and the bottom of the trench. If desired, the trench may have an undercut portion formed on only one side of the trench. 
     In general, the organic emissive layer disconnecting structure may be formed between a crack stopper structure and the active area. The crack stopper structure may be configured to prevent cracks from propagating into the display from the panel edge. In other suitable arrangements, the organic emissive layer disconnecting structure may be formed at the very edge of the panel edge beyond the crack stopper structure (if any). In certain embodiments, the organic emissive layer disconnecting structure may also be an island structure having an undercut region that is formed on at least one side of the island structure. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG.  1    is a schematic diagram of an illustrative electronic device having a display in accordance with an embodiment. 
         FIG.  2    is a cross-sectional side view of a portion of an illustrative display in accordance with an embodiment. 
         FIG.  3    is a cross-sectional side view of a display edge portion with dam and crack stopper border structures. 
         FIG.  4    is a cross-sectional side view of an edge portion of a display panel with illustrative evaporation layer disconnecting structures in accordance with an embodiment. 
         FIG.  5    is a diagram illustrating how an organic layer may be formed on a display panel via evaporation in accordance with an embodiment. 
         FIGS.  6 - 11    are cross-sectional side views showing different types of evaporation layer disconnecting structures in accordance with certain embodiments. 
         FIGS.  12  and  13    are cross-sectional side views of illustrative single-sided evaporation layer disconnecting structures in accordance with some embodiments. 
         FIGS.  14 A,  14 B, and  14 C  are cross-sectional side views of illustrative island structures with undercut on both sides in accordance with certain embodiments. 
     
    
    
     DETAILED DESCRIPTION 
     An illustrative electronic device of the type that may be provided with a display is shown in  FIG.  1   . Electronic device  10  of  FIG.  1    may be a tablet computer, laptop computer, a desktop computer, a monitor that includes an embedded computer, a monitor that does not include an embedded computer, a display for use with a computer or other equipment that is external to the display, a cellular telephone, a media player, a wristwatch device or other wearable electronic equipment, or other suitable electronic device. 
     As shown in  FIG.  1   , electronic device  10  may have control circuitry  16 . Control circuitry  16  may include storage and processing circuitry for supporting the operation of device  10 . The storage and processing circuitry may include storage such as hard disk drive storage, nonvolatile memory (e.g., flash memory or other electrically-programmable-read-only memory configured to form a solid state drive), volatile memory (e.g., static or dynamic random-access-memory), etc. Processing circuitry in control circuitry  16  may be used to control the operation of device  10 . The processing circuitry may be based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio chips, application specific integrated circuits, etc. 
     Input-output circuitry in device  10  such as input-output devices  12  may be used to allow data to be supplied to device  10  and to allow data to be provided from device  10  to external devices. Input-output devices  12  may include buttons, joysticks, scrolling wheels, touch pads, key pads, keyboards, microphones, speakers, tone generators, vibrators, cameras, sensors, light-emitting diodes and other status indicators, data ports, etc. A user can control the operation of device  10  by supplying commands through input-output devices  12  and may receive status information and other output from device  10  using the output resources of input-output devices  12 . 
     Input-output devices  12  may include one or more displays such as display  14 . Display  14  may be a touch screen display that includes a touch sensor for gathering touch input from a user or display  14  may be insensitive to touch. A touch sensor for display  14  may be based on an array of capacitive touch sensor electrodes, acoustic touch sensor structures, resistive touch components, force-based touch sensor structures, a light-based touch sensor, or other suitable touch sensor arrangements. 
     Control circuitry  16  may be used to run software on device  10  such as operating system code and applications. During operation of device  10 , the software running on control circuitry  16  may display images on display  14  using an array of pixels in display  14 . 
     Display  14  may be an organic light-emitting diode display or other suitable display. Configurations in which display  14  is an organic light-emitting diode display are sometimes described herein as an example. 
     Display  14  may have a rectangular shape (i.e., display  14  may have a rectangular footprint and a rectangular peripheral edge that runs around the rectangular footprint) or may have other suitable shapes. Display  14  may be planar or may have a curved profile. 
     As shown in  FIG.  1   , display  14  may have an array of pixels  18  configured to display images for a user. Pixels  18  may each include one or more thin-film transistors  22  for forming a pixel control circuit and may each include a respective organic light-emitting diode  20  that is controlled by the pixel control circuitry of that pixel  18 . Pixels  18  may be formed within an active area AA of display  14 . The active area of display  14  may be at least partially surrounded by an inactive border area (sometimes referred to as a display panel edge region). Display driver circuitry  24  may be formed from thin-film transistor circuitry and/or integrated circuit(s) and may be used in supplying image data and control signals to pixels  18  during operation of display  14 . 
     A cross-sectional side view of an illustrative organic light-emitting diode display  14  is shown in  FIG.  2   . As shown in  FIG.  2   , display  14  may include a substrate layer such as substrate layer  36 . Substrate  36  may be a planar layer or a non-planar layer and may be formed from plastic, polymer, glass, ceramic, sapphire, metal, or other suitable substrate materials. In the example of  FIG.  3   , substrate  36  may be an organic substrate formed from polyimide (PI), polyethylene terephthalate (PET), or polyethylene naphthalate (PEN) (as examples). The surface of substrate  36  may optionally be covered with one or more buffer layers (e.g., inorganic buffer layers such as layers of silicon oxide, silicon nitride, etc.). 
     Thin-film transistor (TFT) layers  48  that include thin-film transistor circuitry may be formed on substrate  36 . The TFT circuitry may include thin-film transistors, capacitors, and other active/passive thin-film structures. Thin-film transistor layers  48  may include a semiconductor layer  60  formed over substrate  36 . Semiconductor layer  60  may be a silicon layer such as a low-temperature polysilicon layer, a semiconducting-oxide layer such as a layer of indium gallium zinc oxide (IGZO), or other semiconductor layer that can serve as the channel region for a thin-film transistor. A first interlayer dielectric film ILD 1  may be formed over semiconductor layer  60 . Gate structures such as first gate conductor G 1  may be formed on layer ILD 1 . Formed in this way, layer ILD 1  serves as a gate insulating film. A second interlayer dielectric film ILD 2  may be formed over the G 1  structures. Additional gate structures such as second gate conductor G 2  may be formed on layer ILD 2 . A third interlayer dielectric film ILD 3  may be formed over the G 2  structures. In general, the various ILD layers may be formed from inorganic dielectric material such as silicon oxide. 
     Metal structures such as first source-drain conductors SD 1  may be formed on layer ILD 3 . At least some of the SD 1  metal structures may be electrically coupled to semiconductor layer  60  by forming contact holes through the ILD layers to serve as thin-film transistor source-drain terminals. At least some of the semiconductor layer  60 , gate structures, and source-drain terminals may be interconnected to serve as one or more thin-film transistors  22  in each pixel  18  (see  FIG.  1   ). A first planarization layer PLN 1  formed from organic dielectric material such as polymer may be formed over the SD 1  metal structures. Additional metal structures such as second source-drain conductors SD 2  may be formed on first planarization layer PLN 1 . At least some of the SD 2  metal structures may be electrically coupled to the underlying thin-film transistor circuitry through one or more vias in layer PLN 1 . A second planarization layer PLN 2  formed from organic dielectric material (e.g., polymer) may be formed over the SD 2  metal structures. If desired, a thin-film transistor passivation layer may be formed over the topmost TFT planarization layer. 
     The layers between substrate  36  and the TFT passivation layer (which include semiconductor layer  60 , the various ILD layers, the different gate layers, the different source-drain layers, and the various planarization layers) may sometimes be referred to collectively as TFT layers  48 . The example of  FIG.  2    in which TFT layers  48  include one semiconductor layer, two different layers of gate conductors, two different layers of source-drain conductors, and two different planarization layers is merely illustrative. If desired, thin-film transistor layers  48  may include two or more layers of semiconductor layer (e.g., a first layer of silicon semiconductor, a second layer of semiconducting-oxide layer above or below the first layer of silicon semiconductor, etc.), only one layer of gate structures or more than two layers of gate structures, only one layer of source-drain structures or more than two layers of source-drain structures, only one planarization layer or more than two planarization layers, or other suitable TFT stack-up. 
     Organic light-emitting diode structures may be formed on thin-film transistor layers  48 . Each light-emitting diode has a lower electrode and an upper electrode. In a “top-emission” display, the lower electrode may be formed from a reflective conductive material such as patterned metal to help reflect light that is produced by the light-emitting diode in the upwards direction out of the display. The upper electrode (sometimes referred to as the counter electrode) may be formed from a transparent or semi-transparent conductive layer (e.g., a thin layer of transparent or semitransparent metal and/or a layer of indium tin oxide or other transparent conductive material). This allows the upper electrode to transmit light outwards that has been produced by emissive material in the diode. In a “bottom-emission” display, the lower electrode may be transparent (or semi-transparent) and the upper electrode may be reflective. 
     In configurations in which the anode is the lower electrode, layers such as a hole injection layer, hole transport layer, emissive material layer, electron transport layer, and electron injective layer may be formed above the anode and below the upper electrode, which serves as the cathode for the diode. In inverted configurations in which the cathode is the lower electrode, layers such as an electron injection layer, electron transport layer, emissive material layer, hole transport layer, and hole injection layer may be stacked on top of the cathode and may be covered with an upper layer that serves as the anode for the diode. One or both electrodes may reflect light. 
     In general, display  14  may use a configuration in which the anode electrode is closer to the display substrate than the cathode electrode or a configuration in which the cathode electrode is closer to the display substrate than the anode electrode. In addition, both bottom emission and top emission arrangements may be used. Top emission display configurations in which the anode is located on the bottom and the cathode is located on the top are sometimes described herein as an example. This is, however, merely illustrative. Any suitable display arrangement may be used, if desired. 
     In the illustrative configuration of  FIG.  2   , display  14  has a top-emission configuration where lower electrode  42  is an anode and upper electrode  46  is a cathode. Anode conductor  42  may be formed within an opening in a pixel definition layer PDL. Pixel definition layer PDL may be formed from a patterned photo-imagable polymer. In each light-emitting diode  20 , organic emissive material  44  is interposed between anode layer  42  and cathode layer  46 . Anode structures  42  may be patterned from a layer of metal on top of thin-film transistor layers  48 . Cathode  46  may be formed from a common conductive layer that is deposited on top of organic emissive layer  44 . Cathode  46  is transparent so that light  25  may exit light emitting diode  20  as current flows through emissive material  44  between anode  42  and cathode  46 . 
     Circuitry in the active display area should be protected by thin-film encapsulation layers such as thin-film encapsulation layers  70 . Encapsulation layers  70  may, for example, include first and second inorganic encapsulation layers and an organic encapsulation layer sandwiched between the first and second inorganic encapsulation layers. Thin-film encapsulation layers  70  formed in this way can help prevent moisture from damaging the conductive circuitry in display  14 . 
       FIG.  3    is a cross-sectional side view of a display  14  having an edge portion with dam and crack stopper border structures. As shown in  FIG.  3   , thin-film transistor layers  48  may be formed on substrate  36 . Organic light-emitting diode structures such as anode  42  and cathode  46  may be formed within the active area AA of the display in which the pixels form images for viewing by a user of device  10 . In conventional displays, whenever thin-film encapsulation layer  70  is being formed as part of the display stack-up, one or more dam structures  302  has to be formed in the inactive area to help contain the organic encapsulation material within layer  70  (i.e., to help prevent the organic encapsulation material from leaking out of the display border edge during formation of encapsulation layers  70 ). Dam structures  302  are typically formed on TFT layers  48  along the edge of the encapsulation layers  70 . Formation of dam structures  302  (which often include two or more protruding barrier structures formed laterally across the surface of TFT layers  48 ) can, however, increase the inactive border area. 
     Substrate layer  36  may be formed by cutting a common substrate (e.g., user laser or other inscribing techniques) into multiple display panels. The TFT layers  48  formed on substrate  36 , which typically include various inorganic dielectric layers (see, e.g., the different ILD layers in  FIG.  2   ) are prone to cracking as display panels are cut from the common substrate to form display panel edge  300 . To prevent cracks and delamination of layers  48 , display  14  may be provided with a peripheral crack-stopper structure (sometimes referred to as a crack prevention structure, crack-stopper strip, crack-stopper line, etc.) such as peripheral crack-stopper structure  304 . Crack-stopper structure  304  may be used to prevent crack propagation from panel edge  300  and film delamination in the layers of display  14  such as layers  48  and  70 . Panel edge  300  might also be formed by constructing a hole at least partially through the display stack-up (as an example), where the hole might be near the peripheral border of display  14  or might be somewhere near the center of display  14  in the active area. 
     While the thin-film encapsulation layers  70  can generally prevent moisture from penetrating into the active circuitry within display  14 , in certain embodiments where the organic emissive layer  44 , which is especially conducive to moisture propagation, extends all the way to display panel edge  300  (such as in the exemplary display of  FIG.  3   ), there is a risk that moisture can still permeate into the active area of the display through the organic emissive layer  44 , as indicated by arrow  350 . Emissive layer  44  may be formed on top of TFT layers  48  over dam structures  302  and crack stopper structure  304  but under thin-film encapsulation layers  70 , thereby providing a leakage or bypass path through which moisture can inadvertently seep into the display active area. 
     In accordance with an embodiment, a display  14  is provided with structures that disconnect or sever organic emissive layer  44  in the panel edge region such that any potential moisture permeation path from the actual panel edge is cut off.  FIG.  4    is a cross-sectional side view of such display  14  that includes illustrative moisture prevention or moisture blocking structures  410 . As shown in  FIG.  4   , moisture prevention/blocking structures  410  may be formed in place of dam structures  302  between the active area AA of the display and display panel edge  400 . Moisture prevention structures  410  may include one or more wells, channels, or trenches  412  such that when the organic emissive layer  44  is formed, at least a portion  44 ′ will be formed at the bottom of trenches  412  such that portion  44 ′ is physically decoupled or detached from layer  44  formed at the top of those trenches  412 . Trenches  412  may at least partially surround or completely surround the active circuitry within the active area of display  14  to ensure that any moisture propagation path is terminated. Although not shown, trenches  412  may optionally be filled by non-organic material or other material that is insusceptible to moisture penetration. 
     Forming one or more physical gaps in the organic emissive layer  44  in this way can help eliminate the risk of any moisture permeation even if emissive layer  44  were to extend all the way to the panel edge  400  as in the arrangement of  FIG.  4   . Moisture blocking structures  410  can therefore sometimes be referred to as organic emissive layer disconnecting structures, organic emissive layer severing structures, organic emissive layer moisture decoupling structures, or organic emissive layer gap generation structures. As already alluded to above, organic layer disconnecting structures  410  can also replace dam structures  302  to help contain thin-film encapsulation layers  70  within the active area of the display, which reduces the inactive border area at the edge of the display. 
       FIG.  5    is a diagram illustrating how organic emissive layer  44  may be formed on display  14  using evaporation equipment. As shown in  FIG.  5   , the display panel may be oriented face down while chemical evaporation equipment  500  deposits a layer of organic emissive material onto the display panel, as indicated by arrows  504 . A mask layer such as an open-face mask  502  may be used to selectively pattern where the organic emissive material is allowed to be dispensed on display  14 . In general, the organic emissive material may be deposited on the display using chemical vapor deposition (CVD), physical vapor deposition, vapor phase epitaxy, thermal oxidation, casting, or other types of thin-film deposition processes. Although moisture blocking structures  410  described herein are directed to severing or forming gaps in the organic emissive layer, structures  410  may in general be used to disconnect any potentially problematic organic layer susceptive to moisture permeation in the display stack-up that is formed via evaporation. 
     Chemical evaporation techniques are limited in the sense that only particular exposed surfaces will be coated assuming the duration and angle of deposition is well-controlled. Organic layer disconnecting structures  410  take advantage of this limitation of the chemical vapor deposition by employing narrow trenches in the thin-film transistor layers  48  such that evaporation will not be able to sufficiently reach or coat the side walls of these narrow trenches. Structures  410  that exploit this particular finding are therefore sometimes referred to as evaporation layer disconnecting structures. 
       FIGS.  6 - 11    are cross-sectional side views showing different types of evaporation layer disconnecting structures  410 .  FIG.  6    illustrates a first suitable embodiment in which structure  410  has a narrow trench  600  (sometimes referred to as a recessed portion). Trench  600  may be formed only partially through TFT layers  48  (e.g., trench  600  may cut through any number of planarization, metal, gate, and/or dielectric layers in the TFT layers  48 ) or may be formed all the way through the TFT layers  48  (i.e., so that trench  600  traverses entirely through layers  48 ). Trench  600  should be configured with the proper width and depth such that only a small portion of emissive material  44 ′ will be formed at the bottom of trench  600  while the sidewalls of trench  600  are devoid of any organic emissive material. By ensuring that the sidewalls of trench  600  are not deposited with any organic emissive material, structure  410  introduces physical gaps in organic emissive layer  44 , which cuts off or terminates any potentially problematic moisture permeation path. 
       FIG.  7    illustrates another suitable embodiment in which structure  410  has a narrow trench  700  with enlarged sidewalls. Trench  700  may extend only partially or all the way through TFT layers  48 . Trench  700  should be configured with the proper width and depth such that only a small portion of emissive material  44 ′ will be formed at the bottom of trench  700  while the sidewalls of trench  700  are devoid of any organic emissive material. As shown in  FIG.  7   , the trench sidewalls  702  may be further etched way so as to create an undercut  704  at the opening of trench  700 . The undercut shape may also be referred to as an overhang. The final depth of trench  700  and the undercut sidewalls  702  may be simultaneously formed using the same etchant. The formation of the trench overhang can further guarantee that no evaporated emissive material will be deposited in the undercut region  704 , thereby terminating any potentially problematic moisture permeation path. 
       FIG.  8 A  illustrates yet another suitable embodiment in which structure  410  has a trench  800  with an undercut portion  802  formed using a separate etching operation. Trench  800  may extend only partially or all the way through TFT layers  48 . Trench  800  may be relatively wider than trench  600  of  FIG.  6    or trench  700  of  FIG.  7    and thus, at least some emissive material may extend downwards into trench  800 . The amount of emissive material that is deposited on the sidewalls should be kept to a minimum, if possible. The undercut portion  802 , however, will ensure that the small amount of emissive material  44 ′ at the bottom of trench  800  is completely disconnected from the emissive material above. 
     The undercut portion  802  may be formed using a separate etchant.  FIG.  8 B  illustrates how structure  410  may initially be filled by at least two different types of material. As shown in  FIG.  8 B , prior to forming the organic emissive later, trench  800  may initially be filled by dielectric material ILD and metal M. The dielectric material ILD may be removed using a first etchant that selectively targets the dielectric material without etching the metal. Thereafter, the metal M may be removed using a second etchant that selectively targets the metal material without etching the dielectric. Using a separate etchant to create undercut portion  802  in this way provides enhanced selectivity. This helps ensure that undercut portion  802  has the proper shape so that no organic emissive material will be deposited therein, thereby terminating any potentially problematic moisture permeation path. 
       FIG.  9    illustrates another suitable arrangement that includes multiple layers of undercut. As shown in  FIG.  9   , structure  410  may include a trench  900  having sidewalls with multiple levels of undercut/overhang portions. Trench  900  may extend only partially or all the way through the TFT layers  48 . The TFT layers  48  may generally include layers of alternating material. As an example, TFT layers  48 - 1  and  48 - 3  may be silicon oxide layers, whereas TFT layers  48 - 2  and  48 - 4  may be silicon nitride layers. These alternating layers may have different etch rates or may be etched using different etchants to create the multi-level undercut sidewall configuration of  FIG.  9   . A small amount of emissive material  44 ′ may be deposited at the bottom of trench  900 . While a small amount of emissive material might be formed at the multiple levels of sidewall ledges (see portions  902 ), the undercut region below each ledge/overhang should be completely devoid of any evaporated organic emissive material. 
     In the example of  FIG.  9   , three undercut regions are formed vertically with respect to one another, which is merely illustrative. In general, structure  410  may include sidewalls having only two stacked undercut portions, more than three stacked undercut portions,  4 - 10  vertically stacked undercut/overhang portions, or any suitable number of ledges. The multi-layer undercut configuration of  FIG.  9    creates multiple opportunities to disconnect or sever organic emissive layer  44 , thereby eliminating any potentially problematic moisture permeation path. 
       FIG.  10    illustrates yet another example in which structure  410  has a trench  1000  having upper layers  48 - 1  that form the requisite undercut portion and lower layers  48 - 2  that form the rest of trench  1000 . In particular, upper layers  48 - 1  may include multiple layers of stacked metals each with a different etch rate. Thus, a single etching operation can be used to simultaneously etch away the multiple layers of metals  48 - 1  to create the undercut portion  1002 . 
     The configuration of  FIG.  10    in which the uppermost portion  48 - 1  is partially etched away may cause emissive material to accumulate at the lip of the trench opening during evaporation, which may subject that portion to potential cracking.  FIG.  11    illustrates another suitable embodiment in which structure  410  has a trench  1100  having upper layers  48 - 1  having straight sidewalls  1102 , middle layers  48 - 2  that form the requisite undercut portion, and lower layers  48 - 3  that form the rest of trench  1100 . The vertical sidewalls  1102  provide a more robust trench opening that is less prone to cracks. While some emissive material might coat sidewalls  1102  near the opening of trench  1100 , the undercut portion  1104  in layers  48 - 2  will be devoid of any evaporated organic emissive material. As an example, layers  48 - 2  may include multiple layers of stacked metals each with a different etch rate. Thus, a single etching operation can be used to simultaneously etch away the multiple layers of metals  48 - 2  to create the undercut portion  1104 . 
     The examples of  FIGS.  6 - 11    where the emissive material is disconnected from both or all sides of the trench are merely illustrative.  FIG.  12    shows how organic evaporation disconnecting structure  410  has undercut portion  1200  formed on only one side of the trench. As shown in  FIG.  12   , the emissive material  44 ′ at the bottom of the trench might be connected (from the right side) to the emissive layer  44  formed on the top surface of layers  48  but will still be disconnected on the left side due to undercut portion  1200 . As long as there is a gap on at least one side of the trench, the moisture permeation path via organic emissive layer  44  will be completely disconnected. In certain embodiments, this single-sided undercut structure can optionally be implemented near the panel edge (see, e.g.,  FIG.  13   ). As shown in  FIG.  13   , the disconnected or isolated emissive material  44 ′ may extend all the way to the display panel edge  1300 , and the undercut portion  1200  on the other end will prevent any physical contact between emissive material  44 ′ and the emissive layer  44  extending from the left. Undercut portion  1200  of  FIG.  13    may sit outside the crack stopper structure  44 , if it exists (see  FIG.  4   ). 
     The examples of  FIGS.  6 - 12    in which the organic emissive layer disconnecting structure  410  includes only trenches formed in the TFT layers  48  are merely illustrative.  FIGS.  14 A,  14 B, and  14 C  are cross-sectional side views showing how the organic emissive layer may also be disconnected using island structures having undercut or overhang portions on one or both sides of the island.  FIG.  14 A  shows a first exemplary configuration in which an island is formed by etching undercut regions of the type described in connection with  FIG.  8 A .  FIG.  14 B  shows another exemplary configuration in which an island is formed by constructing multiple undercut ledges of the type described in connection with  FIG.  9   .  FIG.  14 C  shows yet another exemplary configuration in which an island can be formed by etching undercut regions of the type described in connection with  FIG.  10   . If desired, one or more island structures can be constructed by forming any type of undercut regions on either side of the island such that the organic emissive material deposited on the island is disconnected from the emissive layer extending from the left or right side of the display panel. 
     Referring back to the example of  FIG.  4   , a display  14  may include moisture blocking structures  410  having at least two organic evaporation layer disconnecting trenches. This is merely illustrative and is not intended to limit the scope of the present embodiments. If desired, structures  410  may include only one trench, two trenches, or more than two trenches, which can be formed between the active area of the display and the crack stopper structure (as shown in the configuration of  FIG.  4   ) or can optionally be formed at the display panel edge (as shown in the configuration of  FIG.  13   ). In the scenario where multiple trenches are formed, the trenches may be of the same type (e.g., both trenches may have the identical trench structure selected from any one of  FIGS.  6 - 12   ) to simplify the manufacturing process or may be of disparate types (e.g., a first trench may have the trench structure of  FIG.  8 A , whereas a second trench may have the trench structure of  FIG.  9   ) to further ensure that the emissive layer  44  is disconnected by one or more gaps. If desired, one or more island structures such as the isolated island structures of  FIGS.  14 A,  14 B, and  14 C  can be formed in the panel edge region to help terminate any potential moisture permeation path. The various organic evaporation layer disconnecting structures of the type described in connection with  FIGS.  6 - 14    are not mutually exclusive and can optionally be combined in a single electronic device display  14 . 
     The foregoing is merely illustrative and various modifications can be made to the described embodiments. The foregoing embodiments may be implemented individually or in any combination.

Metadata:
Filing Date: 20191031
Publication Date: 20231114
Grant Date: 20231114
Priority Date: 20190104
Inventors: TSAI, TSUNG-TING
JAMSHIDI ROUDBARI, ABBAS
WEI, CHUAN-SHENG
Ting, HanChi
CHOI, JAE WON
LIN, JIANHONG
Kao, Nai-Chih
CHANG, SHIH CHANG
YEH, SHIN-HUNG
ISHII, TAKAHIDE
CHANG, TING-KUO
CHEN, YU HUNG
LIU, Yu-wen
Pai, Yu-Chuan
LIN, ANDREW
Assignee: APPLE INC
CPC Classifications: [{"code": "H10K50/841", "inventive": true, "first": true, "tree": "[]"}, {"code": "H10K59/12", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10K71/00", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10K71/18", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10K59/124", "inventive": false, "first": false, "tree": "[]"}, {"code": "H10K71/821", "inventive": false, "first": false, "tree": "[]"}, {"code": "H10K59/124", "inventive": true, "first": true, "tree": "[]"}, {"code": "H10K50/841", "inventive": true, "first": true, "tree": "[]"}, {"code": "H10K59/122", "inventive": false, "first": false, "tree": "[]"}, {"code": "H10K50/11", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10K59/87", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10K71/00", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10K71/18", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10K71/821", "inventive": false, "first": false, "tree": "[]"}, {"code": "H10K59/124", "inventive": false, "first": false, "tree": "[]"}, {"code": "H10K59/12", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10K59/1201", "inventive": true, "first": true, "tree": "[]"}, {"code": "H10K59/131", "inventive": false, "first": false, "tree": "[]"}, {"code": "H10K59/131", "inventive": false, "first": false, "tree": "[]"}]
Family ID: 71404443