PATENT DOCUMENT

Publication Number: US-9883822-B2
Application Number: US-201615181229-A
Country: US
Kind Code: B2

Title: Biometric sensor chip having distributed sensor and control circuitry

Abstract:
A sensor includes a sensor array formed on a first side of a substrate and at least one circuit operative to communicate with the sensor array formed on a second side of the substrate. At least one via extends through the substrate to electrically connect the sensor array to the at least one circuit. Placing the at least one circuit on the second side of the substrate allows the sensor array to occupy substantially all of the first side of the substrate.

Claims:
We claim: 
     
       1. A biometric sensor, comprising:
 a capacitive sensor array configured to image biometric data and formed on a first side of a substrate, the sensor array comprising:
 a first plurality of electrical traces defining a plurality of rows; 
 a second plurality of electrical traces defining a plurality of columns, the plurality of columns intersecting the plurality of rows, thereby defining a plurality of intersections; and 
 a capacitive sensing element formed at each of the plurality of intersections; 
 
 at least one circuit formed on a second opposing side of the substrate and configured to communicate with the sensor array; and 
 a plurality of vias extending through the substrate to electrically connect the sensor array to the at least one circuit; wherein 
 each of the plurality of vias underlies an electrical trace chosen from the first or the second plurality of electrical traces. 
 
     
     
       2. The biometric sensor of  claim 1 , wherein the plurality of vias separates the sensor array into a plurality of sensor sub-arrays. 
     
     
       3. The biometric sensor of  claim 2 , wherein each sensor sub-array in the plurality of sensor sub-arrays is separately addressable by the at least one circuit. 
     
     
       4. The biometric sensor of  claim 2 , wherein at least one of the plurality of sensor sub-arrays comprises:
 a subgroup of the plurality of rows; and 
 a subgroup of the plurality of columns, the subgroup of the plurality of columns intersecting the subgroup of the plurality of rows; 
 wherein an RC constant of the at least one of the plurality of sensor sub-arrays is less than an RC constant of the sensor array. 
 
     
     
       5. The biometric sensor of  claim 2 , wherein the plurality of sub-arrays images a biometric parameter faster than the sensor array. 
     
     
       6. The biometric sensor of  claim 1 , wherein the substrate electrically shields the at least one circuit from the capacitive sensor array. 
     
     
       7. A fingerprint sensor, comprising:
 a sensor array comprising biometric sensing elements formed on a first side of a substrate, the sensor array comprising:
 a first plurality of electrical traces defining a plurality of rows; and 
 a second plurality of electrical traces defining a plurality of columns, the plurality of columns intersecting the plurality of rows to define a plurality of intersections; 
 wherein a respective biometric sensing element is formed at each of the plurality of intersections and each biometric sensing element is configured to image a fingerprint; 
 
 at least one circuit formed on a second opposing side of the substrate and configured to communicate with the sensor array; and 
 a plurality of vias extending through the substrate to electrically connect the sensor array to the at least one circuit, wherein each of the plurality of vias is formed at a unique end of one of the plurality of rows and the plurality of columns. 
 
     
     
       8. The fingerprint sensor of  claim 7 , wherein the substrate electrically shields the at least one circuit from the sensor array. 
     
     
       9. A fingerprint sensor, comprising:
 a sensor array configured to capture fingerprint data and formed on a first side of a substrate, the sensor array comprising:
 a first plurality of electrical traces defining a plurality of rows; and 
 a second plurality of electrical traces defining a plurality of columns, the plurality of columns intersecting the plurality of rows, thereby defining a plurality of intersections; and 
 a capacitive sensing element formed at each of the plurality of intersections; 
 
 at least one circuit formed on a second opposing side of the substrate and operative to communicate with the sensor array; and 
 a plurality of vias extending through the substrate to electrically connect the sensor array to the at least one circuit, wherein each of the plurality of vias underlies a trace chosen from the first or second plurality of traces. 
 
     
     
       10. The fingerprint sensor of  claim 9 , wherein the plurality of vias separates the sensor array into a plurality of sensor sub-arrays. 
     
     
       11. The fingerprint sensor of  claim 10 , wherein each sensor sub-array in the plurality of sensor sub-arrays is separately addressable by the at least one circuit. 
     
     
       12. The fingerprint sensor of  claim 10 , wherein at least one of the plurality of sensor sub-arrays comprises:
 a subgroup of the plurality of rows; and 
 a subgroup of the plurality of columns, the subgroup of the plurality of columns intersecting the subgroup of the plurality of rows; 
 wherein an RC constant of the at least one of the plurality of sensor sub-arrays is less than an RC constant of the sensor array. 
 
     
     
       13. The fingerprint sensor of  claim 10 , wherein the plurality of sub-arrays images a biometric parameter faster than the sensor array. 
     
     
       14. The fingerprint sensor of  claim 9 , wherein the substrate electrically shields the at least one circuit from the sensor array. 
     
     
       15. An electronic device, comprising:
 a cover layer; and 
 a fingerprint sensor positioned below the cover layer, the fingerprint sensor comprising:
 a sensor array configured to image fingerprint data and formed on a first side of a substrate, the sensor array comprising:
 a first plurality of electrical traces defining a plurality of rows; 
 a second plurality of electrical traces defining a plurality of columns, the plurality of columns intersecting the plurality of rows to define a plurality of intersections; and 
 a capacitive sensing element formed at each of the plurality of intersections; 
 
 at least one circuit formed on a second opposing side of the substrate and operative to communicate with the sensor array; and 
 a plurality of vias extending through the substrate to electrically connect the sensor array to the at least one circuit; wherein
 each of the plurality of vias underlies an electrical trace chosen from the first or the second plurality of electrical traces; or 
 each of the plurality of vias is formed at a unique end of one of the plurality of rows and the plurality of columns. 
 
 
 
     
     
       16. The electronic device of  claim 15 , wherein the substrate electrically shields the at least one circuit from the sensor array.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application is a continuation-in-part of U.S. patent application Ser. No. 15/090,474, filed Apr. 4, 2016, entitled “Biometric Sensor Chip Having Distributed Sensor and Control Circuitry,” which is a continuation of U.S. patent application Ser. No. 14/294,903, filed Jun. 3, 2014, entitled “Biometric Sensor Chip Having Distributed Sensor and Control Circuitry,” which claims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional Patent Application No. 61/831,586, filed Jun. 5, 2013, entitled “Biometric Sensor Chip Having Distributed Sensor and Control Circuitry,” the entireties of which are incorporated herein by reference as if fully disclosed herein. 
    
    
     TECHNICAL FIELD 
     Embodiments described herein relate generally to a sensor, and more particularly to a substrate having a biometric sensor array on a first side that is coupled to control circuitry positioned on a second side of the substrate. 
     BACKGROUND 
     Biometric sensing devices are increasingly common in computer or network security applications, financial applications, surveillance applications, and system access control applications. Biometric sensing devices detect or image a unique physical or behavioral trait of a person, providing biometric data that can reliably identify the person. For example, a fingerprint includes a unique pattern of ridges and valleys that can be imaged by a fingerprint sensor. The image of the fingerprint, or the unique characteristics of the fingerprint, is compared to previously captured reference data, such as a reference fingerprint image. The identity of the person is obtained or verified when the newly captured fingerprint image matches the reference fingerprint image 
     Devices that image fingerprints or other biometric data can be incorporated into a variety of electronic devices to provide enhanced functionality for those devices. Generally, many electronic devices, such as smart phones, tablet computing devices, computers, security keypads, and the like, may place a premium on space within the device. That is, the complexity of such devices leads to the incorporation of additional components, circuits and the like when compared with previous generations of devices. In order to maintain a similar form factor and/or size, the volume and/or area occupied by internal components may remain constant or even shrink between generations of electronic devices. Thus, more and more components compete for the same space. Thus, efficient designs of internal components, including biometric sensors, may be both useful and desired. 
     SUMMARY 
     Embodiments herein may take the form of a biometric sensor formed on a substrate (e.g., a “chip”) in such a fashion that electronic components are distributed across opposing sides of the substrate. One or more through-silicon vias (TSVs) may connect the electronic components on the opposing sides. The TSVs may carry control signals between components, power to one or more components, data between components, and the like. Generally the electronic components may function as if laid out and positioned on a single side of the substrate. 
     One embodiment described herein takes the form of a sensor that includes a sensor array formed on a first side of a substrate and at least one circuit operative to communicate with the sensor array formed on a second side of the substrate. At least one via extends through the substrate to electrically connect the sensor array to the at least one circuit. Placing the at least one circuit on the second side of the substrate allows the sensor array to occupy substantially all of the first side of the substrate. 
     In some embodiments, multiple vias extend through the substrate, and each via may underlie one of a plurality of traces forming the sensor array. 
     In still other embodiments, the multiple vias separate the sensor array into two or more sensor sub-arrays. 
     In yet other embodiments, each of the two or more sensor sub-arrays is separately addressable by the at least one circuit. 
     In some embodiments, an electronic device includes a cover glass and a sensor positioned below the cover glass. The sensor includes a sensor array formed on a first side of a substrate; at least one circuit operative to communicate with the sensor array formed on a second opposing side of the substrate; and at least one via extending through the substrate to electrically connect the sensor array to the at least one circuit. The sensor array may occupy substantially all of the first side of the substrate. As one example, the cover glass and sensor are included in a button of the electronic device. 
     In some embodiments, a method for manufacturing a sensor includes forming one or more vias in a first circuit wafer that includes one or more electrical components, where each via comprises a blind via that extends only partially through a thickness of the first circuit wafer. A first side of a substrate wafer is formed over a first side of the first circuit wafer, where the first side of the first circuit wafer includes openings to the one or more vias in the first circuit wafer. A temporary carrier wafer is attached to a second side of the substrate wafer and the first circuit wafer thinned on a second side of the first circuit wafer to expose the one or more vias in the first circuit wafer. A second circuit wafer is then formed over the second side of the first circuit wafer, where the second circuit wafer includes a sensor array and the one or more vias in the first circuit wafer operably connect the one or more electrical components in the first circuit wafer to the sensor array in the second circuit wafer. An isolator layer can be formed over the second side of the first circuit wafer prior to forming the second circuit wafer over the second side of the first circuit wafer. Back end of line operations may be performed on the substrate wafer prior to attaching the temporary carrier wafer to the second side of the substrate wafer. In some embodiments, the sensor array includes a three metal redistribution layer of a grounding metal layer and two sensing and drive layers. The temporary carrier wafer is removed from the substrate wafer. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  depicts a sample device in which an example biometric sensor may be incorporated; 
         FIG. 2  is a cross-sectional view taken along line  2 - 2  of  FIG. 1 , showing a relative position of a biometric sensor chip within the sample device of  FIG. 1 ; 
         FIG. 3  is a top plan view of an example biometric sensor; 
         FIG. 4  is a bottom plan view of the example biometric sensor of  FIG. 3 ; 
         FIG. 5  is a cross-sectional view of the example biometric sensor of  FIGS. 3-4 , taken along line  5 - 5  of  FIG. 3 ; 
         FIG. 6  is a top plan view of an example biometric sensor showing a sample layout of multiple through-silicon vias; 
         FIGS. 7A-7I  illustrate a process flow diagram depicting one series of operations for making a sample biometric sensor; and 
         FIG. 8  is a flowchart corresponding to the process flow diagram of  FIGS. 7A-7I . 
     
    
    
     DETAILED DESCRIPTION 
     Generally, embodiments herein may take the form of a biometric sensor formed on a substrate (e.g., a “chip”) in such a fashion that electronic components are distributed across opposing sides of the substrate. One or more through-silicon vias (TSVs) may connect the electronic components on the opposing sides. The TSVs may carry control signals between components, power to one or more components, data between components, and the like. Generally, the electronic components may function as if laid out and positioned on a single side of the substrate. 
     In many embodiments, a sensor array may be deposited on a first side of the substrate. Likewise, control circuitry (such as CMOS circuits) may be positioned on a second, opposing side of the substrate. By separating the control circuitry and the sensor array in this fashion, the area available on the chip to be occupied by the sensor array may be increased in comparison to a same-size chip having both sensor and control circuitry on the same side. Thus, embodiments may make more efficient use of the available area on a chip&#39;s surface, and/or may facilitate placing a larger sensor on a chip&#39;s surface than may be achieved when both the sensor and control circuitry are positioned on a single side of the substrate. 
     Further, the control circuitry may be positioned on the second side of the substrate in such a fashion that the distance between the control circuitry and the sensor may be reduced when compared to biometric sensor packages having both on one side. Essentially, the depth of a TSV connecting the sensor array to the control circuitry may be less than the length of a trace or run that may be required to connect the two when the sensor and circuitry occupy a single side of a chip or other substrate, as discussed in more detail below. Likewise, the control circuitry may be shielded by the substrate from any fringing field effects of the sensor array.  FIG. 1  generally depicts a sample electronic device that may incorporate a biometric sensor in accordance with certain embodiments described herein. As can be seen, the electronic device may take the form of a mobile smart phone. Embodiments described herein may also be incorporated into, or used with, a variety of other electronic devices such as tablet computing devices, stand-alone computers, wearable devices, electronics systems for appliances, electronics systems for automobiles, security systems, and the like. 
     Although reference is made herein to the orientation of particular objects and elements, it should be understood that such orientations may be altered or varied in certain embodiments. Likewise, orientations and directions discussed herein are generally provided with respect to the figures herein. Accordingly, “up,” “down,” “upper,” “lower,” “front,” “rear,” “side” and like terms are intended as relative terms, not absolute. 
     Referring now to  FIG. 1 , the biometric sensor may be located beneath any suitable portion of the exterior of the device  100 . The biometric sensor may be located beneath a cover glass  102 , for example. Likewise, the biometric sensor may be located beneath a sidewall  104  or other portion of the device housing. As yet another option, the biometric sensor may be located beneath an input mechanism  106  of the device  100 . One example embodiment includes a biometric sensor located beneath a button  108  of the device. 
     In embodiments having a biometric sensor located beneath a cover glass or under a portion of a housing (such as sidewall  104 ), multiple biometric sensors may be tiled or otherwise positioned to extend sensing capability across a larger area of the cover glass/housing. 
     Similarly, a single biometric sensor may be scaled to underlie a significant portion of either the cover glass  102  or the housing. It should be appreciated that the biometric sensor(s) may be positioned in such a fashion as to not interfere with viewing of a display through the cover glass  102  (if such a display is present). Thus, for example, the biometric sensor(s) may be positioned beneath a display element of the electronic device  100 , or sensor may be formed from a relatively optically transparent material such as indium-tin-oxide or other suitable materials. 
       FIG. 2  is a cross-sectional view taken along line  2 - 2  of  FIG. 1 , showing an example location of a biometric sensor  200  with respect to the button  108  of the sample electronic device  100 . Generally, the sensor is positioned adjacent to the button  108 , such that the two touch. It should be appreciated that, in alternate embodiments, the sensor  200  and button  108  may be at least slightly spaced apart from one another. A ground ring  202  may encircle or be positioned adjacent to the button  108 . The ground ring may hold a finger or other body portion to be biometrically sensed at a particular voltage with respect to the sensor  200 . Although the element is referred to as a “ground ring,” the voltage exerted by the element need not be a zero ground voltage. Likewise, the ground ring  202  need not be annular but maybe any suitable shape, which may vary with the shape and/or style of the button  108 , the sensor  200 , or other portion or dimension of the electronic device  100 . 
     An outer surface  204  of the electronic device  100  may abut the ground ring  202 , or otherwise be positioned near the ground ring  202 . In embodiments where the ground ring  202  is not present, the outer surface  204  may be proximate the button  108 . The outer surface  204  may define a stepped transition or lip that may support the button in some embodiments. Further, in some embodiments, a compliant gel or spring element may be positioned between the lip and the base of the button  108 , thereby sealing the interior of the electronic device  100  from the exterior and allowing the button  108  to move upwardly and downwardly, as force is exerted thereon. 
     In the embodiment shown in  FIG. 2 , an upper surface of the sensor  200  has a sensor array  206  formed thereon; the sensor array  206  may be positioned proximate to (and in contact with) a lower surface of the button  108 . By placing the sensor array nearest the button, the distance at which a finger or other object touching the button is to be scanned or imaged may be minimized. As discussed in more detail below, the sensor array  206  may occupy all or substantially all of the upper surface of the sensor  200 . In this arrangement, the ability of the sensor array  206  to image objects atop or adjacent the top of the button  108  may be maximized, since the area occupied by the sensor array on the sensor chip  200  is maximized. 
     As shown in the cross-sectional view of  FIG. 2  and discussed in more detail below, one or more through-silicon vias (TSVs)  212  may extend through the substrate  208  of the sensor  200 . The TSVs  212  may generally electrically couple the sensor array  206  to certain circuitry  210  disposed on an opposing side of the substrate  208 . For example, CMOS control circuitry  210  may be positioned on a bottom side of the biometric sensor  200  and connected to the sensor array  206  by the TSVs  212 . Control and/or data signals may be transmitted between the array and the circuitry through the TSVs. The TSVs  212  may be filled with an electrically conductive material, such as copper or silver, or any other suitable conductor. 
     Still with reference to  FIG. 2 , the sensor  200  may be electrically connected to a flex circuit  216  in order to transmit signals to and/or from other portions of the electronic device  100 . The flex circuit  216  may route signals between the sensor  200  and a remote processor, for example. In order to facilitate electrical communication, one or more electrical connection surfaces  214  may be formed on the bottom surface of the sensor substrate  208 . The exact location of these connection surfaces  214  may vary between embodiments. The connection surfaces may take the form of wire bond pads, bumps or raised surfaces, or any other suitable connector. 
     Referring now to  FIG. 3 , there is shown a top plan view of an example biometric sensor  200 . The sensor array  206  may be defined by a set of intersecting rows  300  and columns  302  lines, each of which are formed from electrical traces. Generally, either the row lines  300  or the column lines  302  function as drive lines while the other functions as sense lines. The intersection of each drive line and sense line may define a capacitive sensor element  304  that functions to image a biometric feature of a user&#39;s body part that is in contact with, or above, the button  108 . The operation of such a capacitive sensor element is generally understood and is therefore not described in detail herein. 
     The capacitive sensor array may be used, for example, as a fingerprint sensor to image the ridges and valleys of a human finger. In alternative embodiments, the capacitive sensor array may be used as a touch or force sensor. 
     As shown in  FIG. 3 , the ends of each row line and column line  300 ,  302  terminate in a TSV  212 . As discussed above, the TSVs  212  may electrically connect the row and column lines (and thus the capacitive sensor elements defined by their intersections) with circuitry  210  disposed on an opposing side of the substrate  208 . 
       FIG. 4  is a bottom plan view or bottom surface of the example biometric sensor  200  of  FIG. 3 . In particular, an example disposition of circuitry  210  is depicted. As shown in the figure, traces  400  may connect one or more circuits  210 , such as CMOS circuits, to one or more TSVs  212  which, in turn, electrically couple to the sensor array  206  on the top surface of the substrate  208 . By placing the circuitry  210  on a different surface of the substrate  208  than the one occupied by the sensor array  206 , the array may occupy surface space that would otherwise be dedicated to hosting the circuitry. Thus, a larger imaging area may be provided in a space on a substrate than otherwise achieved if both array and circuitry share a common surface. 
     Additionally, in many embodiments the overall length of an electrical connection between the sensor array  206  and associated circuitry  210  may be reduced, insofar as the depth of the TSVs  212  may be less than the length of a circuit trace that would connect the sensor array and circuitry if both occupied the same side of the substrate  208 . This may both simplify the layout, and speed operation, of the sensor  200 . In addition, the substrate  208  itself may act as a dielectric, shielding the circuitry  210  from any fringe field effects of the sensor array (and vice versa). Thus, certain embodiments may essentially provide electrical shielding to the sensor without introducing any additional layers or materials, such as a ground plane. 
     Further, insofar as the connection surfaces  214  are generally closer to the flex circuit  216  (as shown in  FIG. 2 ), the sensor may be better integrated with the flex circuit and the rest of the electronic device  100 . The connection surfaces  214  need not extend off the sides of the substrate  208 , for example, and thus potentially may not obstruct any portion of an adjacent display or the like. 
     The use of TSVs  212  also obviates the need to wire bond the front surface of the biometric sensor  200  to the flex circuit  216 , thereby potentially eliminating the need to edge trench the substrate  208  or otherwise provide a path for an external conductive wire from the biometric sensor&#39;s front surface to the flex circuit  216  located beneath the biometric sensor. This may further free up space inside the electronic device  100  that would otherwise be used to route the conductor, and may also increase the area available on the substrate  208  for use by the biometric sensor array insofar as no edge trench need be defined. 
     Referring now to  FIG. 5 , there is shown a cross-sectional view of the example biometric sensor  200  of  FIGS. 3-4 , taken along line  5 - 5  in  FIG. 3 . As shown to best effect in this figure, the TSVs  212  may be routed between the upper sensor array  206  and the lower circuitry  210 . Generally, the thickness of the substrate  208  is on the order of 100 microns or less, thereby creating a relatively short electrical routing between the two surfaces. 
       FIG. 6  is a top plan view of an example biometric sensor showing a sample layout of multiple through-silicon vias (TSVs)  212 . The TSVs  212  are shown for clarity in this figure, although it should be appreciated that in many embodiments, the TSVs  212  may be concealed from external view by the traces  300 ,  302  forming the intersecting sets of row and column lines. That is, the diameter of any given TSV  212  may be less than the width of an electrical trace  300 ,  302 . As one example, a TSV may have approximately a 12 micron diameter and a trace may have approximately a 25 micron width. Thus, a TSV  212  may connect a row trace or a column trace to associated circuitry  210  (not shown) on the opposing side of the substrate  208 , as generally previously described. 
     By placing the TSVs  212  beneath the traces  300 ,  302 , the sensor array  206  may effectively be partitioned into multiple sub-arrays. For example, in the embodiment of  FIG. 6 , the TSVs partition the sensor array  206  into four separate sensor sub-arrays  600 ,  602 ,  604 ,  606 , denoted by the dashed lines in  FIG. 6 . 
     Essentially, each sub-array  600 ,  602 ,  604 ,  606  may be addressed by, and treated as a separate sensor array by the control circuitry  210  or other circuitry. By partitioning the sensor array  206  in this fashion, it is possibly to drive and/or read only a portion of the drive and sense lines of the array at any given time. This, in turn, may increase the operating speed of the sensor, insofar as: a) some embodiments may permit simultaneous operation of multiple sub-arrays  600 ,  602 ,  604 ,  606 ; and b) the RC constant for any given combination of drive and sense lines is lower for a sub-array  600 ,  602 ,  604 ,  606  than for any corresponding configuration of drive and sense lines of the entire array  206 . Because the drive and sense lines  300 ,  302  are reduced in length in the sub-array configurations, the effective resistance of each trace is lowered. Thus, the capacitive sensing elements  304  may discharge more quickly, which provides faster biometric imaging by the biometric sensor  200 . Resistance may be lowered in this manner because control signals may be transmitted through the TSVs  212  at points within the sensor array, instead of only having control signals carried to the edges of the sensor array as in many conventional sensors. 
     It should be appreciated that the TSVs  212  need not be spaced evenly, as shown in  FIG. 6 , but may be positioned as desired under the traces of the sensor array  206 . In some embodiments, the TSVs may be formed in such a manner that they are symmetric about one or both of an X and Y axis of the sensor array  206 . 
     In addition, the substrate  208  of the biometric sensor  200  may act as a shield, thereby preventing electrical disturbances from impacting the operation of the sense and/or drive lines. The separation of the sensor array  206  and circuitry  210 , as accomplished by the use of TSVs  212 , enables the substrate  208  to function in this fashion. 
     An illustrative method of manufacturing the sensor chip will now be discussed in more detail.  FIGS. 7A-7I  illustrate a process flow diagram depicting one series of operations for making a sample biometric sensor.  FIG. 8  is a flowchart corresponding to the process flow diagram of  FIGS. 7A-7I . With reference initially to  FIG. 7A , the sensor chip manufacturing process typically begins with a circuit wafer  700 . In many instances, the circuit wafer  700  may be silicon. With reference to  FIG. 8 , once a circuit wafer is provided or created, the method  800  may begin with operation  802  and the circuitry and other components may be added or otherwise defined in the circuit wafer. For example, front end of line (FEOL) CMOS processing can be used to add individual devices, e.g., transistors, capacitors, resistors, and the like, to the circuit wafer. In this example, one or more interconnects, such as metal interconnect layers, may also be added to the circuit wafer. As shown in  FIG. 7B , after operation  802 , the circuit wafer includes a plurality of electrical components and/or traces  702  defined thereon. 
     After operation  802 , the method  800  may proceed to operation  804 . With reference to  FIGS. 7C and 8 , in operation  804 , one or more vias  704  are defined within the circuit wafer  700 . The via(s) may be defined through etching, grinding, chemical deposition, or the like. Depending on the thickness of the circuit wafer the one or more vias may be blind vias and may not extend through the entire thickness of the circuit wafer  700  during operation  804 . For example, the circuit wafer  700  may be sufficiently thin that extending the vias  704  through the entire thickness of the circuit wafer could cause the circuit wafer to crack or otherwise hinder additional processing. In these embodiments, the vias  704  terminate prior to the opposite edge of the circuit wafer  700 . Accordingly, as shown in  FIG. 7C , the vias  704  extend only three-quarters through the thickness of the circuit wafer  700 . 
     With reference again to  FIG. 8 , after the vias are defined through the circuit wafer, the method  800  may proceed to operation  806 . In operation  806 , a substrate wafer is added to the circuit wafer. With reference to  FIG. 7D , in operation  806 , the substrate wafer  706  is bonded to the circuit wafer  700  and then back end of line (BEOL) operations may be performed. For example, contacts (e.g., bond pads), interconnect wires, and/or dielectric structures may be added to the circuit wafer during operation  806 . Generally, the BEOL processing and substrate wafer will be added to the side  708  of the circuit wafer  700  that has an opening for the vias  704 . In other words, the face of the circuit wafer  700  including the openings to the vias  704  is bonded to the substrate wafer  706  and the face  710  without via openings is unbounded. 
     With reference again to  FIG. 8 , after operation  806 , the method  800  may proceed to operation  808 . In operation  808 , a temporary carrier wafer is bonded to the substrate wafer or the other structures formed during BEOL processing. With reference to  FIG. 7E , the temporary carrier wafer  712  may be bonded to the substrate wafer  706 . The temporary carrier wafer  712  can be bonded to the substrate wafer  706  using a number of different techniques, such as, but not limited to, direct bonding, plasma activated bonding, eutectic bonding, and/or hybrid bonding. 
     Once the temporary carrier wafer  712  has been bonded to the substrate wafer  706 , the method  800  may proceed to operation  810 . In operation  810 , the circuit wafer is thinned to reveal the vias. With reference to  FIG. 7F , the circuit wafer  700  is thinned to reduce the thickness such that the vias  704  now extend through the entire thickness of the circuit wafer  700 . The circuit wafer may be thinned in a number of different manners, such as, but not limited to, grinding, polishing, and selective etching processes. Because the side  708  of the circuit wafer  700  with the via openings is bonded to the substrate wafer  706 , the grinding or other thinning process is done to the un-bonded or un-processed side  710 A of the circuit wafer  700  and removes the excess material between the terminal end of the vias, such that the vias  704  can be exposed. 
     After operation  810 , the method  800  may proceed to operation  812 . In operation  812 , an isolator may be applied to the circuit wafer. With reference to  FIG. 7G  a dielectric or other isolation layer  714  is applied to the top of the circuit wafer  700 . Once the isolator layer  714  is applied, the method  800  may proceed to operation  814 . In operation  814 , one or more metal and/or sensor contacts, such as the sense and drive lines, are added to or over the isolator layer. With reference to  FIG. 7H , one or more layers of metal or other connection elements are added to a circuit wafer  716 . For example, a three metal redistribution layer (RDL) which may include a grounding metal layer  718  and two sensing/drive layers  720  for the biometric sensor may be added to the circuit wafer  716  in operation  814 . 
     With reference again to  FIG. 8 , after the sensor contacts and metal contacts have been added, the method  800  may proceed to operation  816 . In operation  816 , the temporary carrier wafer may be removed. With reference to  FIG. 7I , the temporary carrier wafer  712  may be de-bonded or otherwise removed. For example, the temporary carrier wafer may be a polymer material that may be removed using one or more solvents. As another example, the temporary carrier wafer may be removed through grinding, polishing, or the like. 
     After the temporary carrier wafer has been removed, the method  800  may proceed to an end state  818 . The example biometric sensor  200  is shown in  FIG. 7I . 
     Although embodiments have been described herein with respect to particular sensor types, configurations and methods of manufacture, it should be appreciated that alternative embodiments may vary one or more of these. For example, certain capacitive sensors, such as touch sensors and/or force sensors, may employ distribution of sensor arrays and circuitry across differing surfaces of a substrate as described herein, including connection of the same with TSVs. Likewise, certain embodiments may omit elements described herein, vary the order of operations with respect to methods described herein, and the like. 
     The present disclosure recognizes that personal information data, including biometric data, in the present technology, can be used to the benefit of users. For example, the use of biometric authentication data can be used for convenient access to device features without the use of passwords. In other examples, user biometric data is collected for providing users with feedback about their health or fitness levels. Further, other uses for personal information data, including biometric data, that benefit the user are also contemplated by the present disclosure. 
     The present disclosure further contemplates that the entities responsible for the collection, analysis, disclosure, transfer, storage, or other use of such personal information data will comply with well-established privacy policies and/or privacy practices. In particular, such entities should implement and consistently use privacy policies and practices that are generally recognized as meeting or exceeding industry or governmental requirements for maintaining personal information data private and secure, including the use of data encryption and security methods that meets or exceeds industry or government standards. For example, personal information from users should be collected for legitimate and reasonable uses of the entity and not shared or sold outside of those legitimate uses. Further, such collection should occur only after receiving the informed consent of the users. Additionally, such entities would take any needed steps for safeguarding and securing access to such personal information data and ensuring that others with access to the personal information data adhere to their privacy policies and procedures. Further, such entities can subject themselves to evaluation by third parties to certify their adherence to widely accepted privacy policies and practices. 
     Despite the foregoing, the present disclosure also contemplates embodiments in which users selectively block the use of, or access to, personal information data, including biometric data. That is, the present disclosure contemplates that hardware and/or software elements can be provided to prevent or block access to such personal information data. For example, in the case of biometric authentication methods, the present technology can be configured to allow users to optionally bypass biometric authentication steps by providing secure information such as passwords, personal identification numbers (PINS), touch gestures, or other authentication methods, alone or in combination, known to those of skill in the art. In another example, users can select to remove, disable, or restrict access to certain health-related applications collecting users&#39; personal health or fitness data.

Metadata:
Filing Date: 20160613
Publication Date: 20180206
Grant Date: 20180206
Priority Date: 20130605
Inventors: BHAGAVAT MILIND S.
ZHAI JUN
Assignee: APPLE INC
CPC Classifications: [{"code": "A61B2562/0214", "inventive": false, "first": false, "tree": "[]"}, {"code": "G06K9/0002", "inventive": true, "first": false, "tree": "[]"}, {"code": "H01L27/14634", "inventive": true, "first": false, "tree": "[]"}, {"code": "A61B5/053", "inventive": true, "first": false, "tree": "[]"}, {"code": "A61B2562/182", "inventive": false, "first": false, "tree": "[]"}, {"code": "A61B5/1172", "inventive": true, "first": true, "tree": "[]"}, {"code": "H01L27/14636", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10F39/811", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10F39/809", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10F39/811", "inventive": true, "first": false, "tree": "[]"}, {"code": "H10F39/809", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06V40/1306", "inventive": true, "first": true, "tree": "[]"}, {"code": "A61B2562/0214", "inventive": false, "first": false, "tree": "[]"}, {"code": "G06V40/1306", "inventive": true, "first": false, "tree": "[]"}, {"code": "A61B2562/182", "inventive": false, "first": false, "tree": "[]"}, {"code": "A61B5/1172", "inventive": true, "first": true, "tree": "[]"}, {"code": "A61B5/053", "inventive": true, "first": false, "tree": "[]"}]
Family ID: 56974040