PATENT DOCUMENT

Publication Number: US-8797334-B2
Application Number: US-68302410-A
Country: US
Kind Code: B2

Title: Facilitating efficient switching between graphics-processing units

Abstract:
The disclosed embodiments provide a system that facilitates seamlessly switching between graphics-processing units (GPUs) to drive a display. In one embodiment, the system receives a request to switch from using a first GPU to using a second GPU to drive the display. In response to this request, the system uses a kernel thread which operates in the background to configure the second GPU to prepare the second GPU to drive the display. While the kernel thread is configuring the second GPU, the system continues to drive the display with the first GPU and a user thread continues to execute a window manager which performs operations associated with servicing user requests. When configuration of the second GPU is complete, the system switches the signal source for the display from the first GPU to the second GPU.

Claims:
What is claimed is: 
     
       1. A method for switching from using a first graphics-processing unit (GPU) to using a second GPU to drive a display, comprising:
 using a first thread executing on a central processing unit to execute a window manager that performs operations associated with servicing user requests; 
 receiving a request to switch from using the first GPU to using the second GPU as a signal source for driving the display; 
 using a kernel-based second thread executing on the central processing unit to configure the second GPU in preparation for driving the display in response to the request; 
 continuing to use the first thread to execute the window manager to service user requests while the second thread is configuring the second GPU; and 
 switching the signal source which drives the display from the first GPU to the second GPU when configuration of the second GPU is complete. 
 
     
     
       2. The method of  claim 1 , wherein the act of using the second thread to configure the second GPU comprises:
 powering up the second GPU; and 
 performing hardware-configuration operations to configure hardware for the second GPU. 
 
     
     
       3. The method of  claim 2 , wherein the act of performing hardware-configuration operations involves one or more of the following:
 reinitializing drivers for the second GPU; 
 performing a display probing operation to determine characteristics of the display; 
 copying mode settings from the first GPU to the second GPU; and 
 copying at least one color lookup table (CLUT) from the first GPU to the second GPU. 
 
     
     
       4. The method of  claim 1 , wherein prior to switching the signal source from the first GPU to the second GPU, the method further comprises using the first thread to execute a code path to:
 perform software-configuration operations to initialize application-visible data structures associated with the window manager and the second GPU; and 
 perform a first set of rendering operations to render a first image for the second GPU. 
 
     
     
       5. The method of  claim 4 , wherein the act of using the first thread to execute the code path involves repeating some operations which were previously performed by the second thread to configure the second GPU. 
     
     
       6. The method of  claim 5 , wherein the repeated operations access cached values. 
     
     
       7. The method of  claim 1 , further comprising using the second thread to tear down a configuration for the first GPU after the signal source is switched to the second GPU. 
     
     
       8. The method of  claim 7 , wherein the act of using the second thread to tear down the configuration for the first GPU comprises:
 removing application-visible data structures associated with the window manager and the first GPU; 
 removing driver state associated with the first GPU; and 
 removing power from the first GPU. 
 
     
     
       9. The method of  claim 1 , wherein the first GPU is integrated into a chipset of the central processing unit, and the second GPU resides on a discrete GPU chip. 
     
     
       10. The method of  claim 1 , wherein the first GPU and the second GPU have substantially identical circuitry and similar capabilities. 
     
     
       11. The method of  claim 1 , wherein the first GPU is a general-purpose processor which runs graphics code and the second GPU is a special-purpose graphics processor. 
     
     
       12. A computer system that switches from a first graphics processing unit (GPU) to a second GPU to drive a display, comprising:
 a display; 
 a processor communicatively coupled to the display; 
 a first GPU communicatively coupled to the display and processor; 
 a second GPU communicatively coupled to the display and processor; and 
 an operating system comprising program code configured to execute on the processor which, upon receiving a request to switch from using the first GPU to using the second GPU as a signal source for driving the display, causes the processor to:
 use a first thread to execute a window manager that performs operations associated with servicing user requests; 
 use a kernel-based second thread to configure the second GPU in preparation for driving the display while the first thread continues to execute the window manager; and 
 switch the signal source which drives the display from the first GPU to the second GPU after configuration of the second GPU is complete. 
 
 
     
     
       13. The computer system of  claim 12 , wherein the program code to cause the processor to use the second thread to configure the second GPU comprises program code to cause the processor to use the second thread to:
 power up the second GPU; and 
 perform hardware-configuration operations to configure hardware for the second GPU. 
 
     
     
       14. The computer system of  claim 13 , wherein the program code to cause the processor to use the second thread to perform hardware-configuration operations comprises program code to cause the processor to use the second thread to perform one or more of the following operations:
 reinitializing drivers for the second GPU; 
 performing a display probing operation to determine characteristics of the display; 
 copying mode settings from the first GPU to the second GPU; and 
 copying at least one color lookup table (CLUT) from the first GPU to the second GPU. 
 
     
     
       15. The computer system of  claim 12 , wherein the operating system further comprises program code to cause the processor to use the first thread to execute a code path prior to switching the signal source from the first GPU to the second GPU, the code path configured to:
 perform software-configuration operations to initialize application-visible data structures associated with the window manager and the second GPU; and 
 perform a first set of rendering operations to render a first image for the second GPU. 
 
     
     
       16. The computer system of  claim 15 , wherein execution of the code path causes the first thread to repeat one or more operations which were previously performed by the second thread to configure the second GPU. 
     
     
       17. The computer system of  claim 16 , wherein one or more of the repeated operations are configured to access data cached by the second thread. 
     
     
       18. The computer system of  claim 12 , wherein the operating system further comprises program code to cause the processor to use the second thread to tear down the first GPU after the signal source is switched to the second GPU. 
     
     
       19. The computer system of  claim 18 , wherein the program code to cause the processor to use the second thread to tear down the first GPU comprises program code to cause the processor to use the second thread to:
 remove application-visible data structures associated with the window manager and the first GPU; 
 remove driver state associated with the first GPU; and 
 remove power from the first GPU. 
 
     
     
       20. A computer-readable storage medium having instructions stored thereon to cause one or more processors to:
 use a first thread executing on one of the one or more processors to execute a window manager that performs operations associated with servicing user requests; 
 receive a request to switch from using a first GPU to using a second GPU as a signal source for driving a display; 
 use a kernel-based second thread executing on one of the one or more processors to configure the second GPU in preparation for driving the display in response to the request; 
 continue to use the first thread to execute the window manager to service user requests while the second thread is configuring the second GPU; and 
 switch the signal source which drives the display from the first GPU to the second GPU after configuration of the second GPU is complete. 
 
     
     
       21. The computer-readable storage medium of  claim 20 , wherein the instructions to cause the one or more processors to use the second thread to configure the second GPU comprise instructions to cause the one or more processors to use the second thread to:
 power up the second GPU; and 
 perform hardware-configuration operations to configure hardware for the second GPU. 
 
     
     
       22. The computer-readable storage medium of  claim 21 , wherein the instructions to cause the one or more processors to use the second thread to perform the hardware-configuration operations comprise instructions to cause the one or more processors to use the second thread to perform one or more of the following operations:
 reinitializing drivers for the second GPU; 
 performing a display probing operation to determine characteristics of the display; 
 copying mode settings from the first GPU to the second GPU; and 
 copying at least one color lookup table (CLUT) from the first GPU to the second GPU. 
 
     
     
       23. The computer-readable storage medium of  claim 20 , further comprising instructions to cause the one or more processors to use the first thread to execute a code path prior to switching the signal source from the first GPU to the second GPU, the code path configured to:
 perform software-configuration operations to initialize application-visible data structures associated with the window manager and the second GPU; and 
 perform a first set of rendering operations to render a first image for the second GPU. 
 
     
     
       24. The computer-readable storage medium of  claim 23 , wherein execution of the code path causes the first thread to repeat one or more operations which were previously performed by the second thread to configure the second GPU. 
     
     
       25. The computer-readable storage medium of  claim 24 , wherein one or more of the repeated operations are configured to access data cached by the second thread. 
     
     
       26. The computer-readable storage medium of  claim 20 , further comprising instructions to cause the one or more processors to use the second thread to tear down a configuration for the first GPU after the signal source is switched to the second GPU. 
     
     
       27. The computer-readable storage medium of  claim 26 , wherein the instructions to cause the one or more processors to use the second thread to tear down the configuration for the first GPU comprise instructions to cause the one or more processors to use the second thread to:
 remove application-visible data structures associated with the window manager and the first GPU; 
 remove driver state associated with the first GPU; and 
 remove power from the first GPU.

Description:
BACKGROUND 
     1. Field 
     The disclosed embodiments relate to techniques for switching between graphics-processing units (GPUs) in a computer system. More specifically, the disclosed embodiments relate to techniques that “preheat” a GPU to facilitate a rapid switchover to the GPU. 
     2. Related Art 
     Advances in computational performance have enabled computer systems to effectively manipulate large amounts of graphical data at high transfer rates. For example, computer systems are commonly used to render complex scenes for video games, and to manipulate video streams and digital photographs. To facilitate rapid processing of such graphical data, computer systems typically include specialized graphics processors (referred to as “graphics-processing units” (GPUs)) to drive graphical display devices, such as computer system monitors. Unfortunately, powerful GPUs consume large amounts of power and can cause heat dissipation problems. 
     One solution to this problem is to save power during low-activity periods by switching from a high-power GPU that provides higher performance to a low-power GPU with lower performance. However, the process of initializing a GPU in preparation for a switching operation involves a significant number of configuration operations, which can consume a considerable amount of time. For example, during the process of initializing a GPU, the GPU&#39;s mode settings need to be initialized, color lookup tables need to be populated, and associated drivers need to be reconfigured. These configuration operations can cause significant delays in computer system responsiveness, which can be annoying to the user. 
     Hence, what is needed is a technique that facilitates efficiently switching between GPUs without the above-described problems. 
     SUMMARY 
     The disclosed embodiments provide a system that facilitates seamlessly switching between graphics-processing units (GPUs) to drive a display. During operation, the system receives a request to switch from using a first GPU to using a second GPU to drive the display. In response to this request, the system uses a kernel thread which operates in the background to configure the second GPU in preparation for driving the display. While the kernel thread is configuring the second GPU, a user thread continues to execute a window manager which performs operations associated with servicing user requests. When configuration of the second GPU is complete, the system switches the signal source for the display from the first GPU to the second GPU. 
     In some embodiments, configuring the second GPU involves first powering up the second GPU, and then performing hardware-configuration operations for the second GPU. 
     In some embodiments, performing the hardware-configuration operations involves: reinitializing drivers for the second GPU; performing a display probing operation to determine characteristics of the display; copying mode settings from the first GPU to the second GPU; and copying at least one color lookup table (CLUT) from the first GPU to the second GPU. 
     In some embodiments, prior to switching the signal source from the first GPU to the second GPU, the user thread executes a streamlined code path which performs software-configuration operations to initialize application-visible data structures associated with the window manager and the second GPU, and also renders a first image for the second GPU. 
     In some embodiments, executing the streamlined code path involves repeating some operations which were previously performed by the kernel thread to configure the second GPU, wherein the repeated operations will have already been completed by the kernel thread or will access cached values, and will consequently execute more quickly. 
     In some embodiments, after the signal source is switched, the system uses the kernel thread to tear down the configuration for the first GPU. This tear-down process can involve: removing application-visible data structures associated with the window manager and the first GPU; removing driver state information associated with the first GPU; and removing power from the first GPU. 
     In one embodiment, the first GPU is a low-power GPU which is integrated into a processor chipset, and the second GPU is a high-power GPU which resides on a discrete GPU chip, or vice versa. In another embodiment, the first GPU and the second GPU have substantially identical circuitry and substantially similar capabilities. In yet another embodiment, the first GPU is a general-purpose processor which runs graphics code, and the second GPU is a special-purpose graphics processor, or vice versa. 
     Another embodiment also provides a system that switches from using a first GPU to using a second GPU to drive a display. During operation, the system drives the display from the first GPU while a thread configures the second GPU to drive the display. Next, after configuration of the second GPU is complete, the system switches the signal source which drives the display from the first GPU to the second GPU. 
    
    
     
       BRIEF DESCRIPTION OF THE FIGURES 
         FIG. 1  illustrates a computer system which can switch between different graphics sources to drive the same display in accordance with one embodiment. 
         FIG. 2  illustrates the structure of a graphics multiplexer in accordance with one embodiment. 
         FIG. 3  presents a flow chart illustrating the operations involved in switching between GPUs in accordance with one embodiment. 
         FIG. 4  presents a timeline of the operations involved in switching between GPUs in accordance with one embodiment. 
         FIG. 5  presents a flow chart illustrating hardware-configuration operations performed by a kernel thread in accordance with one embodiment. 
         FIG. 6  presents a flow chart illustrating software-configuration operations performed by a user thread in accordance with one embodiment. 
         FIG. 7  presents a flow chart illustrating operations involved in tearing down the configuration of a GPU in accordance with one embodiment. 
         FIG. 8  presents a high-level flow chart of the process of switching between GPUs in accordance with one embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Overview 
     In existing computer systems that support multiple GPUs, when there is a decision to switch GPUs, the systems typically uses a generic reconfiguration mechanism to initialize the new GPU. This generic reconfiguration mechanism executes the same code path that is executed when a new external monitor is plugged in. However, unlike the case of a new external monitor, a GPU switch does not involve changing displays. 
     In the described embodiments, this fact enables the system to “preheat” the new GPU, which involves making a number of configuration assumptions, and copying some configuration information (e.g., color profile/information) between the GPUs before the window manager is notified of the switch. To hide the effects of these configuration operations from the user, the configuration operations can be performed by a kernel thread which operates in the background. While the kernel thread is performing configuration operations in the background, the window manager can continue executing normally in the foreground. This allows the system to continue interacting with the user during the “preheat” process. 
     Because the kernel thread pre-configures the GPUs to be very close to each other, performing the actual GPU switch involves executing a simpler “streamlined code path” that is tuned for performing the switch. For example, during the preheat process, the kernel thread can cache data about the currently running GPU (e.g., type of video card, modes supported). This allows the streamlined code path to subsequently access the cached data rather than querying it from the currently running GPU. Note that caching information indicating which modes are supported by the GPU is advantageous because the system needs to know how to set the modes in the new GPU to match the modes in the currently running GPU. This prevents stalls because the system does not try to access the new GPU while it is powering-on. The graphics drivers have also been changed to take advantage of the fact that the operation is a GPU switch, thereby eliminating certain initialization operations that may be required when a new external monitor is plugged in but are not required during a GPU switch. 
     By using the “preheat” process and a streamlined code path to perform a GPU switch, there is no longer any need to put the two GPUs in a mirrored state for a length of time (e.g., 2-4 seconds) during which client applications can actually discern the mirrored state and users can perceive disturbances on the driven display and in interactions with the window manager. Note that some of the disclosed embodiments actually do place the GPUs in a mirrored state, but only for the time required to paint a first image and switch (e.g., about 16 milliseconds). Moreover, the system locks out clients during this time, so the clients never see the mirrored state. Because clients are only locked out for about 16 milliseconds in some embodiments, the user perceives little to no disturbance on the display or in the user&#39;s interactions with the window manager. In contrast, in existing systems, the window manager may be blocked for 2-4 seconds during a GPU switch. 
     This new, more-efficient GPU-switching process is described in more detail below, but first we describe some of the associated computer system hardware. 
     Computer System 
       FIG. 1  illustrates a computer system  100  which can switch between two graphics sources to drive a display in accordance with one embodiment. Referring to  FIG. 1 , the two graphics sources include (1) a discrete GPU  110  and (2) an embedded GPU  118 , which can each independently drive display  114 . The graphics source which drives display  114  is determined by GPU multiplexer (GMUX)  120 , which selects between the two graphics sources. Hence, computer system  100  can use GMUX  120  to select a graphics source based on current operation conditions. 
     During operation, display stream  122  from discrete GPU  110 , and display stream  124  from embedded GPU  118  both feed into data inputs of GMUX  120 . Source select signal  126  feeds into a select input of GMUX  120  and determines which one of the two graphics sources will drive display  114 . In the illustrated embodiment, source select signal  126  is produced by bridge chip  104 , which includes specific logic for generating source select signal  126 . (Note that source select signal  126  can also be produced by a logic block other than bridge chip  104 . For example, source select signal  126  can be produced by one or more processing units  102 .) The display stream from the selected graphics source then feeds into display  114 . 
     In one embodiment, discrete GPU  110  and embedded GPU  118  communicate through data path  128  to synchronize their display streams. Note that synchronizing the display streams can involve synchronizing both the respective timing signals and the respective data signals. 
     In one embodiment, discrete GPU  110  is a high-performance GPU which consumes a significant amount of power relative to embedded GPU  118 , a lower-performance GPU which consumes a smaller amount of power. In this embodiment, when the graphics-processing load is light, the system switches from using discrete GPU  110  to using embedded GPU  118  to drive display  114 , and subsequently powers down discrete GPU  110 , thereby saving power. On the other hand, when the graphics-processing load becomes heavy again, the system switches graphics sources from embedded GPU  118  back to discrete GPU  110 . 
     Although we have described a system that includes a discrete GPU and an integrated GPU, the disclosed technique can generally work in any computer system comprising two or more GPUs, wherein each of the GPUs can independently drive the display. Moreover, these multiple GPUs can have different operating characteristics and power-consumption levels. Hence, the disclosed technique is not limited to the specific embodiment illustrated in  FIG. 1 . 
     Also note that the above-described process for switching between graphics sources does not involve shutting down or reinitializing the computer system. As a result, the switching process can take substantially less time than it would have if a re-initialization had been required. Consequently, the disclosed technique facilitates rapid and frequent switching between the graphics sources. 
     Graphics Multiplexer 
       FIG. 2  illustrates the internal structure of the graphics multiplexer  120  (described above with reference to  FIG. 1 ) in accordance with one embodiment. Referring to  FIG. 2 , display stream  122  from discrete GPU  110  and display stream  124  from embedded GPU  118  feed into data clock capture blocks  205  and  210 , respectively. Data clock capture blocks  205  and  210  de-serialize display streams  122  and  124  and also extract respective data clock signals  221  and  222 . 
     These data clock signals  221  and  222  feed into clock MUX  225 , which selects one of data clocks  221  and  222  to be forwarded to display stream assembler  240 . In one embodiment, the GMUX controller  235  provides select signal  236  to clock MUX  225 . Alternatively, select signal  236  can be provided by other sources, such as a processor in one or more processor units  102  or another controller. 
     Next, display streams  122  and  124 , with data clocks separated, feed into data buffers  215  and  220 , respectively. Data buffers  215  and  220  examine display streams  122  and  124  to determine when blanking intervals occur, and produce respective blanking interval signals  233  and  234 . Data buffers  215  and  220  also produce output data streams that feed into data MUX  230 . 
     Blanking interval signals  233  and  234  feed into GMUX controller  235 , which compares blanking intervals  233  and  234  to determine how much overlap, if any, exists between the blanking intervals of display streams  122  and  124 . (Note that blanking interval signals  233  and  234  can indicate vertical or horizontal blanking intervals.) If GMUX controller  235  determines that blanking intervals  233  and  234  have a sufficient amount of overlap, GMUX controller  235  asserts select signal  236  as the blanking intervals begin to overlap. This causes clock MUX  225  and data MUX  230  to switch between display streams  122  and  124  during the period when their blanking intervals overlap. Because the switching occurs during the blanking intervals, the switching process will not be visible on display  114 . 
     Finally, the output of data MUX  230  and the selected data clock  223  feed into display stream assembler  240 , which re-serializes the data stream before sending the data stream to display  114 . 
     Switching Process 
       FIG. 3  provides an overview of the operations involved in switching between GPUs in accordance with one embodiment. First, the operating system receives a request to switch from using the first GPU to using a second GPU as a signal source for driving the display (step  302 ). This request can be initiated based on an increase (or a decrease) in graphics workload. This request can be generated by the operating system or by background process which monitors the graphics workload. In response to this request, the operating system spawns (or activates) a kernel thread which operates in the background to perform hardware-configuration operations for the second GPU to prepare the second GPU to drive the display (step  304 ). The system also continues to drive the display with the first GPU. Note that, while the kernel thread is configuring the second GPU, the operating system continues to run a user thread to execute a window manager which performs operations associated with servicing user requests (step  306 ). Next, after the kernel thread has performed the hardware-configuration operations for the second GPU, the user thread executes a streamlined code path that performs software-configuration operations for the second GPU (step  308 ). Then, the operating system switches the signal source which drives the display from the first GPU to the second GPU (step  310 ). Finally, after the signal source is switched, the operating system uses the kernel thread to tear down the configuration for the first GPU (step  312 ). 
     These above-described configuration operations are illustrated in more detail in the timeline which appears in  FIG. 4 . The left-hand column in  FIG. 4  illustrates the actions of a user thread  402 , which executes a window manager for the computer system in the foreground. In contrast, the right-hand column in  FIG. 4  illustrates the actions of kernel thread  404  which performs configuration and teardown operations in the background. 
     As mentioned above, when the request to switch is received, the operating system uses kernel thread  404  to preflight various hardware-configuration operations  408 . Referring to the flow chart illustrated in  FIG. 5 , these hardware-configuration operations can involve powering up the second GPU (step  502 ) and also reinitializing drivers for the second GPU (step  504 ). Kernel thread  404  also performs a “display probing” operation to determine characteristics of the monitor which is being driven (step  506 ). Next, kernel thread  404  copies various types of configuration information from the first GPU to the second GPU. For example, kernel thread  404  can copy mode settings from the first GPU to the second GPU (step  508 ), where these mode settings can specify the resolution and depth of the display. Kernel thread  504  can also copy the contents of a color lookup table (CLUT) from the first GPU to the second GPU (step  510 ). 
     While the kernel thread  404  is configuring the second GPU, user thread  402  continues to execute a window manager (for a windowing system) which performs operations associated with servicing user requests  406 . This allows the user to interact with the windowing system without interruption while the hardware-configuration operations are taking place. 
     When kernel thread  404  completes the hardware-configuration operations, it sends an interrupt  409  to the window manager. This interrupt  409  causes the window manager to execute a streamlined code path that performs various software-configuration operations  410 . Referring to the flow chart illustrated in  FIG. 6 , these software-configuration operations can involve initializing application-visible data structures containing state information for the second GPU (step  602 ). The system also renders a first image for the second GPU (step  604 ). Note that some of these software configuration operations (which do not involve accessing data structures in user space) can possibly be performed by the kernel thread  404 . 
     Note that the configuration operations performed while switching between GPUs differ from the generic configuration operations performed after a new monitor is plugged in because during a switching operation the new frame buffer is not visible until after the switch occurs. This enables some time-consuming generic configuration operations to be elided. For example, because the new frame buffer is not initially visible, it is unnecessary to wipe the contents of the frame buffer. It is also unnecessary to perform color lookup table (CLUT) fading operations to gradually fade down and fade up the display. The system can also elide the rendering of the last frame to the first GPU because the output of the first GPU will be frozen on a penultimate frame during the switchover process. 
     Next, the system switches from using the first GPU to using a second GPU as a signal source for driving the display. In one embodiment, the output of the first GPU is held fixed during a selected blanking interval, and the selected blanking interval is “stretched” until the second GPU enters a blanking interval, at which time the switching operation takes place. This ensures that the switching operation only freezes the display for a single frame (about 16 milliseconds), which is almost imperceptible to the user. 
     Next, after the switchover is complete, the window manager sends an interrupt  412  back to the kernel thread  404 . In response to interrupt  412 , kernel thread  404  performs a number of operations to “tear down” the configuration of the first GPU  414 . Note that, while these tear-down operations are being performed, the window manager continues to perform operations associated with servicing user requests  416 . 
     Referring to the flow chart illustrated in  FIG. 7 , during a tear-down operation kernel thread  404  removes application-visible data structures containing state information associated with the first GPU (step  702 ), and removes driver state associated with the first GPU (step  704 ). Kernel thread  404  also halts accelerators (step  706 ) and audio processing (step  708 ) associated with the first GPU. Then, kernel thread  404  stalls and waits for applications to pull state information off of the first GPU (step  710 ). Finally, kernel thread  404  removes power from the first GPU (step  712 ). 
     The vertical timeline which appears on the right-hand side of  FIG. 4  illustrates, in one embodiment, how using the kernel thread  404  can effectively hide the configuration operations involved in switching GPUs from the user. First, the kernel thread  404  performs the preflight (also referred to as “preheat”) hardware-configuration operations  408  for about 1000 milliseconds while the window manager continues to service user requests  406 . Next, the window manager executes a streamlined code path which performs software-configuration operations  410  for about 130 milliseconds. During this small amount of time (about ⅛ of a second), the interactions with the user may be affected, but this is barely perceptible. Also, as mentioned above, the switchover operations require only about 16 milliseconds, which is not likely to be perceptible to the user. Finally, the tear-down process  414  requires about 400 milliseconds for the kernel thread to complete. However, during this time the window manager is able to service user requests. 
     High-Level Description 
       FIG. 8  presents a high-level flow chart illustrating the process of switching between GPUs in accordance with one embodiment. During operation, the system drives the display from a first GPU while a thread configures a second GPU to drive the display (step  802 ). Next, after configuration of the second GPU is complete, the system switches the signal source which drives the display from the first GPU to the second GPU (step  804 ). 
     The foregoing descriptions of embodiments have been presented for purposes of illustration and description only. They are not intended to be exhaustive or to limit the present description to the forms disclosed. Accordingly, many modifications and variations will be apparent to practitioners skilled in the art. Additionally, the above disclosure is not intended to limit the present description. The scope of the present description is defined by the appended claims. 
     Moreover, the preceding description is presented to enable any person skilled in the art to make and use the disclosed embodiments, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the disclosed embodiments. Thus, the disclosed embodiments are not limited to the embodiments shown, but are to be accorded the widest scope consistent with the principles and features disclosed herein. 
     The data structures and code described in this detailed description are typically stored on a computer-readable storage medium, which may be any device or medium that can store code and/or data for use by a computer system. The computer-readable storage medium includes, but is not limited to, volatile memory, non-volatile memory, magnetic and optical storage devices such as disk drives, magnetic tape, CDs (compact discs), DVDs (digital versatile discs or digital video discs), or other media capable of storing code and/or data now known or later developed. 
     The methods and processes described in the detailed description section can be embodied as code and/or data, which can be stored in a computer-readable storage medium as described above. When a computer system reads and executes the code and/or data stored on the computer-readable storage medium, the computer system performs the methods and processes embodied as data structures and code and stored within the computer-readable storage medium. Furthermore, the methods and processes described below can be included in hardware modules. For example, the hardware modules can include, but are not limited to, application-specific integrated circuit (ASIC) chips, field-programmable gate arrays (FPGAs), and other programmable-logic devices now known or later developed. When the hardware modules are activated, the hardware modules perform the methods and processes included within the hardware modules.

Metadata:
Filing Date: 20100106
Publication Date: 20140805
Grant Date: 20140805
Priority Date: 20100106
Inventors: COSTA THOMAS W.
DOUGLAS SIMON M.
REDMAN DAVID J.
Assignee: APPLE INC
CPC Classifications: [{"code": "Y02D10/00", "inventive": false, "first": false, "tree": "[]"}, {"code": "G06F1/3203", "inventive": true, "first": true, "tree": "[]"}, {"code": "G06F1/3293", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F9/4411", "inventive": true, "first": false, "tree": "[]"}, {"code": "Y02D10/00", "inventive": false, "first": false, "tree": "[]"}, {"code": "G06F15/7871", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F1/3293", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F9/46", "inventive": true, "first": true, "tree": "[]"}, {"code": "G06F1/3287", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F1/3287", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F15/76", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F1/3293", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06T1/20", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F9/4411", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F1/3203", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06F9/4411", "inventive": true, "first": false, "tree": "[]"}, {"code": "Y02D10/00", "inventive": false, "first": false, "tree": "[]"}, {"code": "G06F1/3287", "inventive": true, "first": false, "tree": "[]"}, {"code": "G06T1/20", "inventive": true, "first": true, "tree": "[]"}]
Family ID: 43754741