PATENT DOCUMENT

Publication Number: US-11699377-B2
Application Number: US-202117321073-A
Country: US
Kind Code: B2

Title: Temperature-based pixel drive compensation

Abstract:
Image data for a current image frame may be compensated for transient response variations due to variations in display panel temperatures at various positions of the display panel by performing pixel drive compensation. The pixel drive compensation may be performed based at least in part upon display panel temperatures at various portions of the display panel. In this way, drive compensation corresponding to various temperature variations in a display panel may be implemented.

Claims:
What is claimed is: 
     
       1. Pixel drive compensation circuitry, comprising:
 pixel modification circuitry, wherein the pixel modification circuitry is configured to:
 modify first input pixel data based at least in part on second input pixel data and a temperature associated with the first input pixel data to produce a multi-frame history; and 
 perform a write-back of the multi-frame history to memory communicatively coupled to the pixel modification circuitry; and 
 
 drive compensation circuitry, wherein the drive compensation circuitry is configured to:
 retrieve the multi-frame history from the memory; and 
 determine a drive compensation value based at least in part on third input pixel data, a temperature associated with the third input pixel data, and the multi-frame history, wherein an electronic display is configured to drive a pixel of a display panel based at least in part on the drive compensation value. 
 
 
     
     
       2. The pixel drive compensation circuitry of  claim 1 , wherein the first input pixel data corresponds to a first image frame displayed on the display panel at a first time, wherein the second input pixel data corresponds to a second image frame displayed on the display panel at a second time before the first time, and wherein the third input pixel data corresponds to a third image frame displayed on the display panel at a third time after the first time. 
     
     
       3. The pixel drive compensation circuitry of  claim 1 , wherein the first input pixel data comprises a gray level of the pixel of the display panel. 
     
     
       4. The pixel drive compensation circuitry of  claim 1 , wherein the pixel modification circuitry comprises a plurality of sets of lookup tables, each of the plurality of sets of lookup tables associated with a temperature value of a vector of temperatures, wherein the pixel modification circuitry is configured to modify the first input pixel data based at least in part on an interpolation of the first input pixel data, the second input pixel data, and an output of a particular set of pixel modification lookup tables of plurality of sets of lookup tables that corresponds to a temperature value of the vector of temperatures that is closest to the temperature associated with the first input pixel data. 
     
     
       5. The pixel drive compensation circuitry of  claim 4 , wherein each of plurality of sets of lookup tables comprises a first set of lookup tables and a second set of lookup tables, wherein the first set of lookup tables comprises first pixel modification values calibrated based at least in part on a first range of a characteristic of the display panel, wherein the second set of lookup tables comprises second pixel modification values calibrated based at least in part on a second range of the characteristic of the display panel. 
     
     
       6. The pixel drive compensation circuitry of  claim 5 , wherein the characteristic comprises a brightness of the display panel. 
     
     
       7. The pixel drive compensation circuitry of  claim 1 , wherein the drive compensation circuitry comprises a plurality of sets of lookup tables, each of the plurality of sets of lookup tables associated with a temperature value of a vector of temperatures, wherein the drive compensation circuitry is configured to determine the drive compensation value based at least in part on an interpolation of the third input pixel data, the multi-frame history, and an output of a particular set of drive compensation lookup tables of the plurality of sets of lookup tables that corresponds to a temperature value of the vector of temperatures that is closest to the temperature associated with the third input pixel data. 
     
     
       8. The pixel drive compensation circuitry of  claim 7 , wherein the interpolation comprises a Barycentric interpolation, a hybrid Barycentric-bilinear interpolation, or a combination thereof. 
     
     
       9. The pixel drive compensation circuitry of  claim 1 , wherein the pixel modification circuitry is configured to perform the write-back in response to determining that a pixel modification mode of the pixel drive compensation circuitry is enabled and that the second input pixel data corresponds to a gray level of zero. 
     
     
       10. The pixel drive compensation circuitry of  claim 9 , wherein the pixel modification circuitry is configured to, in response to determining that the pixel modification mode of the pixel drive compensation circuitry is disabled or that the second input pixel data corresponds to a non-zero gray level or in response to a starting condition, perform a write-back of the first input pixel data to the memory without modification, wherein the starting condition corresponds to a first frame to begin generation of the multi-frame history. 
     
     
       11. The pixel drive compensation circuitry of  claim 1 , wherein the pixel modification circuitry is configured to modify the first input pixel data in response to determining that a pixel modification mode of the pixel drive compensation circuitry is enabled and that the second input pixel data corresponds to a gray level of zero. 
     
     
       12. The pixel drive compensation circuitry of  claim 1 , comprising temperature identification circuitry, configured to:
 identify a grid of temperature values spanning the display panel; and 
 identify the temperature associated with the first input pixel data and the temperature associated with the third input pixel data based upon the grid of temperature values. 
 
     
     
       13. The pixel drive compensation circuitry of  claim 12 , wherein the temperature identification circuitry is configured to:
 identify a tile made up of four grid points of the grid of temperature values; 
 interpolate, from temperature values associated with the four grid points, a tile temperature for the tile; and 
 use the tile temperature as the temperature associated with the first input pixel data, the temperature associated with the third input pixel data, or both. 
 
     
     
       14. The pixel drive compensation circuitry of  claim 12 , wherein the grid is defined by two independent arrays of grid points and the grid points are non-uniformly spaced to enable finer resolution at various positions within the grid. 
     
     
       15. A method for operating a pixel drive compensation circuitry implemented in an electronic device, comprising:
 modifying first input pixel data based at least in part on second input pixel data and a temperature associated with the first input pixel data to produce a multi-frame history; and 
 performing a write-back of the multi-frame history to memory communicatively coupled to the pixel drive compensation circuitry; 
 retrieving the multi-frame history from the memory; and 
 determining a drive compensation value based at least in part on third input pixel data, a temperature associated with the third input pixel data, and the multi-frame history, wherein an electronic display is configured to drive a pixel of a display panel based at least in part on the drive compensation value. 
 
     
     
       16. The method of  claim 15 , comprising:
 identifying a grid of grid points spatially spanning an electronic display panel, each grid point associated with a temperature value; 
 identifying tiles within the grid, each tile made up of four of the grid points; 
 interpolating, from temperature values associated with grid points making up each tile, tile temperature values for each tile in the grid; and 
 performing pixel drive compensation based at least in part upon the tile temperature values for each tile in the grid, by selecting compensation data derived from one or more lookup tables of a plurality of lookup tables, wherein the one or more lookup tables are selected based upon at least one of the tile temperature values. 
 
     
     
       17. The method of  claim 16 , comprising:
 dynamically selecting the compensation data for each tile based upon a temperature corresponding to that tile. 
 
     
     
       18. An electronic device comprising:
 a display panel; 
 a memory; and 
 a display pipeline coupled between the memory and the display panel, wherein the display pipeline comprises:
 pixel drive compensation circuitry, comprising pixel modification circuitry, wherein the pixel modification circuitry is configured to: 
 modify first input pixel data based at least in part on second input pixel data and a temperature associated with the first input pixel data to produce a multi-frame history and a temperature associated with the first input pixel data to produce a multi-frame history; and
 perform a write-back of the multi-frame history to memory
 communicatively coupled to the pixel modification circuitry; and 
 
 
 drive compensation circuitry, wherein the drive compensation circuitry is configured to:
 retrieve the multi-frame history from the memory; and 
 determine a drive compensation value based at least in part on third input pixel data, a temperature associated with the third input pixel data, and the multi-frame history, wherein an electronic display is configured to drive a pixel of a display panel based at least in part on the drive compensation value; 
 
 wherein the display pipeline is configured to provide the modified first input pixel data for rendering at the display panel. 
 
 
     
     
       19. The electronic device of  claim 18 , wherein the temperature associated with the first input pixel data comprises a tile temperature interpolated from temperature values associated with four grid points of a grid of grid points spanning a display panel. 
     
     
       20. The electronic device of  claim 19 , wherein the pixel drive compensation circuitry is configured to select particular compensation values from a plurality of available compensation values based upon a comparison of temperatures associated with sets of lookup tables used to derive the plurality of available compensation values and the tile temperature.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application claims priority from and the benefit of U.S. Provisional Application Ser. No. 63/078,284, entitled “Temperature-Based Pixel Drive Compensation,” filed Sep. 14, 2020, which is hereby incorporated by reference in its entirety for all purposes. 
    
    
     BACKGROUND 
     The present disclosure relates generally to electronic displays and, more particularly, to pixel drive compensation, which may selectively be determined based at least in part on display panel temperatures. 
     This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art. 
     Numerous electronic devices—computers, mobile phones, portable media devices, tablets, televisions, virtual-reality headsets, and vehicle dashboards, among many others—often use an electronic display to present visual representations of information such as text, still images, or video. To display an image, an electronic display may control light emission of its display pixels based on corresponding image data. In general, the amount of light emitted by each display pixel depends on an analog electrical signal based on the image data that is programmed into the pixel each frame. In some cases, however, transitioning between different target luminance levels may cause visible artifacts, such as edge-ghosting (e.g., edge shadow), spatial stretching and/or compression, color fringing, color shift, and/or the like to appear on the display panel. These artifacts may be particularly noticeable when colors on the display are generally warmer, such as during night mode operations where blue light reduction is in place and/or during True Tone mode operations where warmer colors are used to compensate for ambient lighting. Red shadow or tail artifacts may arise while scrolling otherwise neutral content with sharp transitions, such as black text on a white background. 
     SUMMARY 
     A summary of certain embodiments disclosed herein is set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of these certain embodiments and that these aspects are not intended to limit the scope of this disclosure. Indeed, this disclosure may encompass a variety of aspects that may not be set forth below. 
     The present disclosure generally relates to applying pixel drive compensation that is selectively determined based at least in part on a temperature variations within a display panel. More specifically, the present disclosure relates to techniques for pixel drive compensation that selectively modify image data and/or selectively use modified image data to mitigate artifacts caused by temperature variations. In particular, to facilitate improving perceived image quality, an electronic device may include a display pipeline (e.g., image data processing circuitry) that processes image data before an electronic display uses the image data to display a corresponding image (e.g., image frame). Moreover, to reduce transient response variations, which may produce perceivable visual artifacts in the pixels of a display, the display pipeline may be implemented to process image data corresponding to a current image based at least in part on image data corresponding to one or more previous images (e.g., image frames) displayed prior to the current image and/or temperature variations observed within a display panel. To that end, the display pipeline may be implemented to determine drive compensation for the image data corresponding to the current image based at least in part on a multi-frame history and/or one or more display panel temperature measurements. 
     Accordingly, in some embodiments, the display pipeline may be implemented to store and/or retrieve image data related to the previous images in memory (e.g., system memory). Further, the display pipeline may be implemented to retrieve the stored image data from the memory to provide drive compensation for current image data based at least in part on the stored image data. However, the total memory bandwidth, which may refer to the rate at which data stored in memory may be fetched (e.g., read) or stored (e.g., written) by a system using a memory bus per direct memory access (DMA) cycle, may be fixed for accessing (e.g., fetching from and/or storing to) memory. Moreover, portions of the memory bandwidth may be used to access memory to store and/or retrieve additional data, such as burn-in statistics, configuration data, and/or the like. As such, storing and/or retrieving respective data for each of multiple previous images may reduce the memory bandwidth available for other operations, which may reduce the operational efficiency of the electronic display. 
     Thus, in some embodiments, image data for a current image frame may be modified (e.g., processed) before storage based at least in part on image data for an image frame directly previous to the current image frame (e.g., a previous image frame) to effectively produce a multi-frame history. For example, in some embodiments, the multi-frame history may be produced based at least in part on an interpolation of a lookup table value, image data for the current image frame, and/or image data for the previous image frame. Moreover, the drive compensation of a subsequent image frame (e.g., an image frame directly following the current image frame) may be determined based at least in part on the multi-frame history. Accordingly, the memory bandwidth and/or power consumed to use a multi-frame history to determine a drive compensation may be reduced. 
     Further, to reduce or eliminate image artifacts due to temperature variations in the display panel, pixel drive compensation may compensate image data for local temperature variations across the display panel. Indeed, these local temperature variations may be due to the placement of components such as a system-on-chip (SoC) processor core complex or other integrated circuits, camera module, as well as the LEDs of the 2D backlight. Drive-compensated pixel values thus may be calculated at least in part on characteristics such as pixel temperature, color, and frame duration. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Various aspects of this disclosure may be better understood upon reading the following detailed description and upon reference to the drawings in which: 
         FIG.  1    is a block diagram of an electronic device, in accordance with an embodiment; 
         FIG.  2    is an example of the electronic device of  FIG.  1   , in accordance with an embodiment; 
         FIG.  3    is another example of the electronic device of  FIG.  1   , in accordance with an embodiment; 
         FIG.  4    is another example of the electronic device of  FIG.  1   , in accordance with an embodiment; 
         FIG.  5    is another example of the electronic device of  FIG.  1   , in accordance with an embodiment; 
         FIG.  6    is a block diagram of a portion of the electronic device of  FIG.  1   , including a display pipeline with pixel drive compensation circuitry, in accordance with an embodiment; 
         FIGS.  7 A and  7 B  (collectively referred to as  FIG.  7   ) are an example of the pixel drive compensation circuitry of  FIG.  6   , in accordance with an embodiment; 
         FIG.  8    is a flow diagram of a process for providing drive compensation to a current input pixel value based at least in part on display panel temperature measurements, in accordance with an embodiment; 
         FIG.  9    is a schematic diagram, illustrating temperature grid points used to identify tiles within an electronic display panel, in accordance with an embodiment; and 
         FIG.  10    is a schematic diagram, illustrating calculation of a tile temperature using bilinear interpolation, in accordance with an embodiment. 
     
    
    
     DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS 
     One or more specific embodiments will be described below. In an effort to provide a concise description of these embodiments, not all features of an actual implementation are described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers&#39; specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure. 
     When introducing elements of various embodiments of the present disclosure, the articles “a,” “an,” and “the” are intended to mean that there are one or more of the elements. The terms “comprising,” “including,” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements. Additionally, it should be understood that references to “one embodiment” or “an embodiment” of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the recited features. 
     As mentioned above, numerous electronic devices—computers, mobile phones, portable media devices, tablets, televisions, virtual-reality headsets, and vehicle dashboards, among many others often use an electronic display to present visual representations of information such as text, still images, or video. To display an image, an electronic display may control light emission of its display pixels based on corresponding image data. In general, the amount of light emitted by each display pixel depends on an analog electrical signal based on the image data that is programmed into the pixel each frame. To that end, when image data indicates a first non-zero target luminance (e.g., gray level), a first analog electrical signal may be supplied to the display pixel, and when the image data indicates a second non-zero target higher (e.g., brighter) than the first non-zero target, a second analog electrical signal with a greater magnitude than the magnitude of the first analog electrical signal may be supplied to the display pixel. Moreover, to achieve zero target luminance (e.g., black), the display pixel may be maintained in an off state and/or a block state. 
     Slow gray-to-gray transient response on display panels may result in motion blur or other artifacts. The interaction of this motion blur with features such as True Tone, which modifies display colors based upon ambient lighting conditions, and/or other color altering modes of operation, which tend to move content to warmer color temperatures, may result in red shadow/tail artifacts when scrolling perceptually neutral content with sharp transitions, such as black text on a white/gray background. The transient response varies based on several factors such as start and target gray levels for the transition, temperature, frame duration and color component. As such, the transition of the display pixel between different target luminance levels may vary, which may result in the transient response variations (e.g., transient response deficiencies). This could cause visible artifacts, such as edge-ghosting (e.g., edge shadow), spatial stretching and/or compression, color fringing, color shift, and/or the like to appear on the display panel. In order to address these visual artifacts, Pixel Drive Compensation (PDC) may be used to modify values driven to the panel to compensate for the characterized/calibrated transient response deficiencies. 
     With the foregoing in mind, an electronic device  10 , which may utilize an electronic display  12  to display images with reduced or eliminated artifacts due to transient response variations, is shown in  FIG.  1   . As will be described in more detail below, the electronic device  10  may be any suitable computing device, such as a handheld computing device, a tablet computing device, a notebook computer, and/or the like. Thus, it should be noted that  FIG.  1    is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in the electronic device  10 . 
     In the depicted embodiment, the electronic device  10  includes the electronic display  12 , one or more input devices  14 , one or more input/output (I/O) ports  16 , a processor core complex  18  having one or more processor(s) or processor cores, memory  20  that may be local to the electronic device  10 , a main memory storage device  22 , a network interface  24 , a power source  26 , and image processing circuitry  27 . The various components described in  FIG.  1    may include hardware elements (e.g., circuitry), software elements (e.g., a tangible, non-transitory computer-readable medium storing instructions), or a combination of both hardware and software elements. It should be noted that the various depicted components may be combined into fewer components or separated into additional components. For example, the memory  20  and the main memory storage device  22  may be included in a single component. Additionally, the image processing circuitry  27  (e.g., a graphics processing unit (GPU)) may be included in the processor core complex  18 . 
     As depicted, the processor core complex  18  is operably coupled with memory  20  and the main memory storage device  22 . In some embodiments, the memory  20  and/or the main memory storage device  22  may be tangible, non-transitory, computer-readable media that stores instructions executable by the processor core complex  18  and/or data to be processed by the processor core complex  18 . For example, the memory  20  may include random access memory (RAM) and the main memory storage device  22  may include read only memory (ROM), rewritable non-volatile memory such as flash memory, hard drives, optical discs, and/or the like. 
     In some embodiments, the processor core complex  18  may execute instructions stored in memory  20  and/or the main memory storage device  22  to perform operations, such as allocating total memory bandwidth to the image processing circuitry  27 , determining temperature measurements and/or variations of the display  12  panel and/or determining a multi-frame history. As such, the processor core complex  18  may include one or more general purpose microprocessors, one or more application specific processors (ASICs), one or more field programmable logic arrays (FPGAs), or any combination thereof. 
     Additionally, as depicted, the processor core complex  18  is operably coupled with the network interface  24 . Using the network interface  24 , the electronic device  10  may communicatively couple to a communication network and/or other electronic devices. For example, the network interface  24  may connect the electronic device  10  to a personal area network (PAN), such as a Bluetooth network, a local area network (LAN), such as an 802.11x Wi-Fi network, and/or a wide area network (WAN), such as a 4G or LTE cellular network. In this manner, the network interface  24  may enable the electronic device  10  to transmit image data to a network and/or receive image data from the network for display on the electronic display  12 . 
     Furthermore, as depicted, the processor core complex  18  is operably coupled with I/O ports  16 , which may enable the electronic device  10  to interface with various other electronic devices. For example, a portable storage device may be connected to an I/O port  16 , thereby enabling the processor core complex  18  to communicate data with a portable storage device. In this manner, the I/O ports  16  may enable the electronic device  10  to output image data to the portable storage device and/or receive image data from the portable storage device. 
     As depicted, the processor core complex  18  is also operably coupled to the power source  26 , which may provide power to the various components in the electronic device  10 . The power source  26  may include any suitable source of energy, such as a rechargeable lithium polymer (Li-poly) battery and/or an alternating current (AC) power converter. Furthermore, as depicted, the processor core complex  18  is operably coupled with input devices  14 , which may enable a user to interact with the electronic device  10 . In some embodiments, the inputs devices  14  may include buttons, keyboards, mice, trackpads, and the like. Additionally or alternatively, the electronic display  12  may include touch components that enable user inputs to the electronic device  10  by detecting occurrence and/or position of an object touching its screen (e.g., outer surface of the electronic display  12 ). 
     The electronic display  12  may use, for example, organic light-emitting diode (OLED) or liquid-crystal display (LCD) technology to present visual representations of information by display images, such as on a graphical user interface (GUI) of an operating system, an application interface, a still image, or video content. As described above, the electronic display  12  may display the images based on image data received from memory  20 , an external storage device  22 , and/or another electronic device  10 , for example, via the network interface  24  and/or the I/O ports  16 . The electronic display  12  may display the images once the image data has been fetched from memory  20  and processed by the image processing circuitry  27 . 
     Temperature variations in the display  12  panel may arise due to components placed near certain portions of the display  12  panel. For example, System on Chip (SoC), camera sensor, LEDs, etc. placed at various positions behind the display  12  panel may cause temperature variations at these various positions. If unmitigated, these temperature variations may cause image artifacts to be rendered at the display  12 . As mentioned herein, the image processing circuitry  27  may include pixel drive compensation processing logic that modifies image data based at least upon temperature variations of the display  12  panel, as will be described in detail below. 
     As described above, the electronic device  10  may be any suitable electronic device. To help illustrate, one example of a suitable electronic device  10 , specifically a handheld device  10 A, is shown in  FIG.  2   . In some embodiments, the handheld device  10 A may be a portable phone, a media player, a personal data organizer, a handheld game platform, and/or the like. For illustrative purposes, the handheld device  10 A may be a smart phone, such as any iPhone® model available from Apple Inc. 
     As depicted, the handheld device  10 A includes an enclosure  28  (e.g., housing). In some embodiments, the enclosure  28  may protect interior components from physical damage and/or shield them from electromagnetic interference. Additionally, as depicted, the enclosure  28  surrounds the electronic display  12 . In the depicted embodiment, the electronic display  12  is displaying a graphical user interface (GUI)  30  having an array of icons  32 . By way of example, when an icon is selected either by an input device  14  or a touch-sensing component of the electronic display  12 , an application program may launch. 
     Furthermore, as depicted, input devices  14  open through the enclosure  28 . As described above, the input devices  14  may enable a user to interact with the handheld device  10 A. For example, the input devices  14  may enable the user to activate or deactivate the handheld device  10 A, navigate a user interface to a home screen, navigate a user interface to a user-configurable application screen, activate a voice-recognition feature, provide volume control, and/or toggle between vibrate and ring modes. As depicted, the I/O ports  16  also open through the enclosure  28 . In some embodiments, the I/O ports  16  may include, for example, an audio jack to connect to external devices. 
     To further illustrate, another example of a suitable electronic device  10 , specifically a tablet device  10 B, is shown in  FIG.  3   . For illustrative purposes, the tablet device  10 B may be any iPad® model available from Apple Inc. A further example of a suitable electronic device  10 , specifically a computer  10 C, is shown in  FIG.  4   . For illustrative purposes, the computer  10 C may be any Macbook® or iMac® model available from Apple Inc. Another example of a suitable electronic device  10 , specifically a watch  10 D, is shown in  FIG.  5   . For illustrative purposes, the watch  10 D may be any Apple Watch® model available from Apple Inc. As depicted, the tablet device  10 B, the computer  10 C, and the watch  10 D each also includes an electronic display  12 , input devices  14 , I/O ports  16 , and an enclosure  28 . 
     As described above, an electronic display  12  may display images based at least in part on image data, for example, retrieved from the local memory  20  and/or the main memory storage device  22 . Additionally, as described above, image data may be processed before being used to display a corresponding image on the electronic display  12 , for example, to facilitate improving perceived image quality. In some embodiments, image data may be fetched and processed by the display pipeline implemented in the electronic device  10 . 
     To help illustrate, a portion  34  of the electronic device  10  including a display pipeline  36  with one or more image data processing blocks  58  is shown in  FIG.  6   . As depicted, the portion  34  of the electronic device  10  also includes external memory  38  (e.g., memory storage device  22 ) and a controller  40 . In some embodiments, the controller  40  may control operations of the display pipeline  36 , the external memory  38 , and/or other portions of the electronic device  10 . The various functional blocks shown in  FIG.  6    may include hardware elements (including circuitry), software elements (including computer code stored on a computer-readable medium) or a combination of both hardware and software elements. It should be noted that  FIG.  6    is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in electronic device  10 . 
     To facilitate the controlling operation, the controller  40  may include a controller processor  42  and controller memory  44 . In some embodiments, the controller processor  42  may execute instructions stored in the controller memory  44 . Thus, in some embodiments, the controller processor  42  may be included in the processor core complex  18 , the image processing circuitry  27 , a timing controller in the electronic display  12 , a separate processing module, or any combination thereof. Additionally, in some embodiments, the controller memory  44  may be included in local memory  20 , the main memory storage device  22 , external memory  38 , internal memory of a display pipeline  36 , a separate tangible, non-transitory, computer readable medium, or any combination thereof. Although depicted as a single controller  40 , in some embodiments, one or more separate controllers  40  may be implemented to control operation of the electronic device. 
     For example, the electronic device  10  may include a pipeline controller  40  that controls operation of the display pipeline  36  and a supervisory controller  40  that coordinates operation of the display pipeline  36  with one or other sub-systems, such as a touch sensing sub-system, implemented in the electronic device  10 . In some embodiments, the supervisory controller  40  may coordinate access to the external memory  38  by allocating memory access bandwidth (e.g., per DMA cycle) between the various sub-systems. For example, the supervisory controller  40  may allocate the display pipeline  36  a portion of the total memory access bandwidth implemented in the electronic device  10  based at least in part on an image data fetch bandwidth floor, a processing data fetch bandwidth floor, a configuration data fetch bandwidth floor, a statistics data storage bandwidth floor, and/or a combined display pipeline bandwidth floor (e.g., sum of bandwidth floor associated with memory access requester implemented in the display pipeline  36 ). 
     As described above, the display pipeline  36  may operate to process image data retrieved (e.g., fetched) from the external memory  38 , for example, based at least on other data retrieved from the external memory  38 . In some embodiments, the display pipeline  36  may be implemented via circuitry, for example, packaged as a system-on-chip (SoC). Additionally or alternatively, the display pipeline  36  may be included in the processor core complex  18 , the image processing circuitry  27 , a timing controller (TCON) in the electronic display  12 , other one or more processing units, other processing circuitry, or any combination thereof. 
     To simplify discussion, the functions (e.g., operations) performed by the display pipeline  36  are divided between various blocks including a direct memory access (DMA) circuitry  46  (e.g., circuitry and/or logic), a fetch circuitry  59 , an input buffer  61 , and one or more image data processing block(s)  58  (e.g., circuitry or modules). In particular, the direct memory access (DMA) circuitry  46  may provide the display pipeline  36  access to the external memory  38 . For example, the direct memory access (DMA) circuitry  46  may store (e.g., write) data from the display pipeline  36  into the external memory  38 . Additionally or alternatively, the direct memory access (DMA) circuitry  46  may retrieve (e.g., read or fetch) image data from external memory  38 , for example, based on a request identifying the image data received from the fetch circuitry  59  for subsequent processing via one or more image data processing block(s)  58 . 
     In some instances, the fetch circuitry  59  may request a portion of the total memory access bandwidth when requesting image data to be input to the display pipeline  36 . For example, to ensure enough image data is stored within the input buffer  61  such that the display pipeline  36  may operate efficiently, the fetch circuitry  59  may request more image data to be fetched by the direct memory access (DMA) circuitry  46  and thus, may request a greater portion of the total memory access bandwidth. 
     In some embodiments, the input buffer  61  may act as a reservoir to temporarily hold image data requested, for example, by the fetch circuitry  59  and retrieved from external memory  38  via the direct memory access (DMA) circuitry  46 . Further, by acting as a reservoir, the input buffer  61  may allow for opportunistic allocation of total memory access bandwidth to the fetch circuitry  59 . For example, to reduce likelihood of underrun conditions in the display pipeline  36 , the fetch circuitry  59  may be allocated a greater portion of the total memory access bandwidth than the minimum bandwidth originally allotted, thereby enabling the fetch circuitry  59  to retrieve a greater amount of image data. In such instances, the input buffer  61 , may hold the additional image data until, for example, downstream image data processing block(s)  58  are ready to process the image data. This may ensure that the display pipeline  36  has retrieved enough image data to prevent underruns. 
     Additionally or alternatively, in some embodiments, an image data processing block  58  request a portion of the total memory access bandwidth. The one or more image data processing block(s)  58  may process image data to facilitate improving perceived image quality when the display panel  56  uses the image data to display a corresponding image. For example, the pixel drive compensation (PDC) circuitry  48  may process image data to compensate for display pixel non-uniformity, such as transient response variations. A transient response variation could arise when a pixel emits a first amount of light during one frame and a different amount of light in a second frame. Further, the transient response may be further impacted by temperature variations that exist within the display panel. The PDC circuitry  48  may reduce or eliminate visual artifacts that could arise due to a transient response by adjusting the input pixel data by an amount that causes the pixel in the display panel  56  to properly emit the targeted amount of light in the second frame. Indeed, in at least in some instances, transient response variations may affect electrical energy stored in a display pixel and, thus, actual (e.g., perceived) luminance of the display pixel. In fact, display pixel non-uniformity may result in the actual luminance of the display pixel differing from its target luminance indicated by corresponding image data, which, at least in may be perceivable as a visible artifact, such as edge-ghosting (e.g., edge shadow), spatial stretching and/or compression, color fringing, color shift, and/or the like. 
     Accordingly, in some embodiments, the PDC circuitry  48  may be implemented to compensate for transient response variations by applying offset values (e.g., voltage, gain values, drive compensation values, and/or the like) to image data corresponding to one or more display pixels. For example, in some embodiments, the PDC circuitry  48  may be implemented to apply drive compensation values to achieve a target luminance (e.g., gray level) indicated by the image data in the corresponding one or more display pixels. In some embodiments, the drive compensation values to be applied to image data may be determined based at least in part on an offset map (e.g., lookup table (LUT)). Moreover, in some embodiments, the drive compensation values to be applied may be determined based at least in part on image data history of the display pixels and/or temperature variations occurring within the display panel. For example, to account for the electrical energy previously stored in the display pixel, a drive compensation value may be determined based at least in part on current image data and previous image data, such as the image data supplied to the display pixel immediately prior to the current image data. For instance, the previous image data value may correspond to pixel values of a frame displayed immediately prior to the current frame, and the previous image data may correspond to the same display pixel location in the previous frame as the display pixel location the current image data corresponds to in the current image frame. Further, in some cases, such as after the display pixel is driven to a zero target luminance (e.g., black), the drive compensation value may be determined based at least in part on multiple (e.g., two or more) previous image data values, as described in greater detail below. 
     Additionally and/or alternatively, the presence of components such as the SoC, camera sensor, LEDs, etc. at various positions behind the display panel may cause temperature variations across the display panel. Drive compensation may be dependent on temperature, which may result in inconsistent pixel drive compensation, if these temperature variations across the display panel are not accounted for. Accordingly, display panel temperature measurements/variations may be used it identify drive compensation value adjustments, as will be discussed in more detail below. 
     As described herein, the image data processing blocks  58  may process the image data to account for the operational behavior of the electronic display  12 . It should be appreciated that the image data processing block(s)  58  may include additional process blocks such as a burn-in compensation (BIC) block, a burn-in statistics (BIS) block, ambient adaptive pixel (AAP) block, a dynamic pixel backlight (DPB) block, a white point correction (WPC) block, a sub-pixel layout compensation (SPLC) block, a panel response correction (PRC) block, a dithering block, an image signal processor (ISP) block, a content-dependent frame duration (CDFD) block, an ambient light sensing (ALS) block, or any combination thereof. Future references to image data processing block(s)  58  may include image processing blocks, such as those described and mentioned above, or other processing blocks. 
     The display pipeline  36  may further include internal memory that may be used as, for example, an output buffer  54 . The output buffer  54  may temporarily store image data processed by from the image data processing block(s)  58  prior to another system component (e.g., display panel  56 ) retrieving the image data, for example, for display of a corresponding image on an electronic display  12 . The output buffer  54 , by acting as a reservoir for image data, may reduce likelihood of perceivable lag when displaying new image content on the electronic display  12  when requested by the display panel  56 . 
     Turning now to  FIG.  7   , a schematic block diagram of the PDC circuitry  48  is illustrated. As illustrated, in some embodiments, the PDC circuitry  48  may include drive compensation circuitry  100  (e.g., circuitry and/or logic, software, firmware), as well as pixel modification circuitry  102  (e.g., circuitry and/or logic, software, firmware). As described in greater detail below, the drive compensation circuitry  100  may be implemented to modify image data, such as an input pixel value (e.g., sub-pixel value), driven to the display panel  56  to compensate for characterized transient response deficiencies. Further, in some embodiments, the pixel modification circuitry  102  may be implemented to modify image data before it is stored (e.g., written-back) to memory, such as external memory  38 . More specifically, the pixel modification circuitry  102  may modify the image data such that the drive compensation circuitry  100  may use the modified image data as multi-frame history to determine the drive compensation provided by the drive compensation circuitry  100 . 
     As mentioned above, the PDC circuitry  48  may account for temperature variations in a display panel  56 .  FIG.  8    is a flowchart, illustrating a process  120  that may be implemented to account for temperature variations in a display panel  56 . For simplicity,  FIGS.  7  and  8    will be discussed together. 
     As mentioned above, drive compensation may be dependent on temperature and temperature can vary across the display panel  56  due to the presence of components such as the SoC, camera sensor, LEDs, etc. at various positions behind the display panel  56 . In order to accurately determine an estimate of the local temperature, a grid of temperatures  70  (e.g., an 18×18 2D grid) may be defined/generated (block  122  of  FIG.  8   ), which splits the frame into tiles (e.g., a rectangular area defined by four neighboring grid points). For example, in some embodiments, the display panel  56  may be defined as 17×17 tiles. 
     In order to accommodate for finer resolution at various positions, the 2D grid has the ability to be non-uniformly spaced. For example, in the case of an 18×18 grid, two independent  18  entry 1D vectors (one for each dimension), temp_grid_points_x[ ] and temp_grid_points_y[ ], may represent the grid points. The values at these grid points may be represented in u13 notation allowing for a maximum panel dimension of 8191 pixels. The first entry may be assumed to be 0 and is hence implicit. In such an embodiment, only the next 17 entries will be programmed. 
     In some embodiments, each tile starts at a grid point and ends one pixel prior to the next grid point. Hence, for uniform handling in hardware, at least one grid point (typically, the last one) may be located a minimum of one pixel outside the frame dimension. All grid points need not necessarily be used. For example, if the whole frame dimension of 512×512 is to be used as a single tile, temp_grid_points_x[0] and temp_grid_points_y[0] may each be programmed to 512. Other values in the vectors may be considered “don&#39;t care” values, as they will not be accessed. 
     In some embodiments, spacing between successive grid points may be restricted to be a minimum of 16 pixels and a maximum of 1024 pixels. In some embodiments, all points in each of the two vectors, temp_grid_points_x[ ]  74  and temp_grid_points_y[ ]  76 , may be programmed to be monotonically increasing, until the point that lies outside the frame dimension. An example illustration of such a grid is shown in  FIG.  9   . 
     In  FIG.  9   , the grid  140  includes grid points  142  in both an X direction (e.g., the input frame width  144 ) and a Y direction (e.g., the input frame width  146 ). As mentioned above, in some embodiments, the grid  140  can include a maximum of 18×18 grid points  142 , though other maximum numbers of grid points  142  could be used in other embodiments. In the example of  FIG.  8   , the grid  140  is made up of 12 grid points  142  in the X direction and 18 grid points  142  in the Y direction. 
     Tile picking logic  72  may be used to traverse positions of each tile formed by four grid points  142 . Temperature at each grid point  142  of the tiles is obtained (e.g., as a U7.3 value). Additionally, in some embodiments, two independent step size vectors (one for each dimension), temp_grid_step_x[ ]  78  and temp_grid_step_y[ ]  80 , may be programmed to avoid division in hardware (typically, programmed dependent on the corresponding tile sizes as (1&lt;&lt;20)/(tile width) and (1&lt;&lt;20)/(tile height) respectively). These vectors, in embodiments where 18×18 grids are used, may include 17 entries. 
     Indexes id_x and id_y, as well as current offsets, offset_x and offset_y, may be maintained in hardware. The offsets are incremented by temp_grid_step_x[id_x]  82  and temp_grid_step_y[id_y]  84  every time the input position is incremented by one along the respective dimension. Offsets reset to 0 when tile boundaries are crossed in the respective dimension. Offsets may be stored in U0.20 notation and saturate when the maximum value is exceeded. 
     Interpolation logic  85  may calculate, based on the current x position  86  and y position  88 , interpolated tile temperatures from the grid (e.g., temperature values for each tile) (block  124  of  FIG.  8   ), which may be represented as t xy .  FIG.  10    is a schematic diagram  160 , illustrating bilinear interpolation of a tile temperature based upon surrounding grid points, though other forms of interpolation, such as curvature of linear interpretation, may be used. 
     Optionally, the local temperature calculation can be turned off and a fixed temperature value, t reg , provided through a register can be used instead. The final temperature value, T, (computation shown below) which may be unique per pixel is then used in the temperature interpolation stage of Drive Compensation and Pixel Modification. A monotonically increasing vector of temperatures, (e.g., in the case of 4 temperatures, T 0 , T 1 , T 2 , T 3 , which may be represented using u7.3 values) at which LUT sets for Drive Compensation and Pixel Modification are defined is programmed. The inverse of the spacing between two successive temperature values, T K  and T K+1 , at which the LUT sets are defined may also be programmed (typically, as floor((1&lt;&lt;20)/(T K+1 −T K ))) in order to avoid division in hardware. 
     In some embodiments, the drive compensation circuitry  100  may include sets of drive compensation lookup tables  108  for each temperature T of the vector of temperatures, such as a first set of drive compensation lookup tables  108 A and a second set of drive compensation lookup tables  108 B (e.g., in the case of 4 temperature values in the vector of temperatures, 4 drive compensation lookup tables  108 A and 4 drive compensation lookup tables  108 B may be provided, one for each of the 4 temperature values, as illustrated in  FIG.  7   . 
     The drive compensation lookup tables  108  may be implemented as two-dimensional (2D) lookup tables. In the example of  FIG.  7   , the first set of drive compensation lookup tables  108 A and the second set of drive compensation lookup tables  108 B each include three 17×17 tables, one for each pixel color component of red, green, and blue. Further, there are four sets of these tables  108 , one for each temperature in the monotonically increasing vector of temperatures (T 0 , T 1 , T 2 , T 3 ). However, there may be more or fewer entries and, in some cases, the tables may not be symmetric. Moreover, in other examples, the drive compensation lookup tables  108 A and  108 B may have more dimensions than two (e.g., 3D or higher dimensions). The drive compensation lookup tables  108  may be populated based at least in part on a calibration of the electronic device  10  and/or a characterization of the influence of certain factors (e.g., a temperature, brightness, age, and/or the like of the display panel  56 ) on the luminance for a given pixel value (e.g., gray level). For instance, the first set of drive compensation lookup tables  108 A may include drive compensation values (e.g., voltage levels, gray values, or fractional gray values) mapped to corresponding input pixel values for a brightness of the display panel  56  below a first threshold and/or within a first range (e.g., a low global panel brightness). Similarly, the second set of drive compensation lookup tables  108 B may include drive compensation values mapped to corresponding input pixel values for a brightness of the display panel  56  above a second threshold and/or within a second range (e.g., a high global panel brightness), which may be the same as or different from the first threshold or first range, respectively. Moreover, in some embodiments, the first set of drive compensation lookup tables  108 A and the second set of drive compensation lookup tables  108 B may include a respective drive compensation lookup table for each component (e.g., color component) of a pixel, such as red (R), green (G), and blue (B). To that end, drive compensation values may be mapped to input pixel values corresponding to each component of the pixel for the different brightness settings (e.g., low global brightness, high global brightness, and/or the like) of the display panel  56 . While the drive compensation lookup tables  108  are described herein as being populated based at least in part on a brightness of the display panel  56 , the drive compensation lookup tables  108  may additionally or alternatively be populated based on any suitable characteristic of the electronic device  10  and/or the display panel  56 . For example, the drive compensation lookup tables  108  may be populated based at least in part on a temperature, age, current, voltage, and/or the like of the electronic device  10  and/or the display panel  56 . Thus, embodiments described herein are intended to be illustrative and not limiting. 
     In operation, the drive compensation lookup tables  108  may output a respective drive compensation value based at least in part on a current input pixel value and a previous input pixel value. Because there are drive compensation lookup tables  108  for each of the temperature values in the vector of temperatures, output values may be provided for each of the temperature values. Accordingly, the processes performed on the outputs described below may be performed for each set of outputs for each of the temperature values in the vector of temperatures, as illustrated in  FIG.  7   . 
     As an exemplary embodiment, at a first time (t 1 ), the drive compensation lookup tables  108  may output a respective drive compensation value based at least in part on an input pixel value (P 1 ) and a previous input pixel value (P 0 ), which was supplied to the display panel  56  at a time (t 0 ) immediately prior to the first time. Before continuing, it should be noted that the previous input pixel value represents a historical pixel value that may take different values. In some cases, the previous input pixel value (P 0 ) may represent a historical pixel value that is the pixel value was supplied to the display panel  56  at a time (t 0 ) immediately prior to the first time. In other cases, the previous input pixel value (P 0 ) may represent a historical pixel value that represents a multi-frame history of pixel values (accounted for in a single value) due to changes from at least two historical frames. In one particular example, the previous input pixel value (P 0 ) may represent a historical pixel value that represents a multi-frame history of pixel values when there is a transition from zero (pixel is off) in a first frame to some non-zero value (pixel is on) in a second frame. To account for effects of turning the pixel on in the first frame that may linger beyond the second frame and into a third frame, the previous input pixel value (P 0 ) may represent a historical pixel value that accounts for not just the second frame (when the pixel is on) but also the first frame (when the pixel was off) when determining drive compensation values for the third frame. This will be discussed further below with respect to the pixel modification circuitry  102 . 
     In some embodiments, a lookup table value from a first of the first set of drive compensation lookup tables  108 A may be determined for a respective color component in the current pixel image data using an index to the first of the first set of drive compensation lookup tables  108 A. Such an index may be determined based at least in part on the current input pixel value (P 1 ) for the respective color component (e.g., a gray level of the current input pixel value (P 1 )), the previous input pixel value for the respective color component (e.g., a gray level of the previous input pixel value (P 0 )), or a combination thereof. Because the first set of drive compensation lookup tables  108 A may map drive compensation values to a subset of input pixel values and/or vice versa, the lookup table value may then be interpolated with the current pixel input value (P 1 ) and the previous pixel input value (P 0 ). In some embodiments, for example, the lookup table value may be interpolated using Barycentric interpolation, a hybrid Barycentric-bilinear interpolation (e.g., Barycentric interpolation in areas within some distance of a diagonal of the LUT, bilinear interpretation in other areas), bilinear-interpolation, and/or the like. 
     Moreover, the result of the interpolation may correspond to the portion of a first drive compensation value (D 1 ) output by the first set of drive compensation lookup tables  108 A that corresponds to the respective component. The remaining portions of the first drive compensation value (D 1 ), which correspond to the other components of the current input pixel value (P 1 ), may be determined as described above using respective lookup tables (e.g., a second and a third lookup table, respectively) in the first set of drive compensation lookup tables  108 A. Further, a second drive compensation value (D 2 ) may be determined as described above with reference to the first drive compensation value (D 1 ) by using the second set of drive compensation lookup tables  108 B. 
     Further, in some embodiments, third drive compensation value (D 3 ) may be determined based at least in part on the first drive compensation value (D 1 ) and the second drive compensation value (D 2 ). For instance, a respective weight (e.g., mixing factor) may be applied, based at least in part on the global brightness (brightness) of the display panel  56 , to each of the first drive compensation value (D 1 ) and the second drive compensation value (D 2 ). The weighted first and second drive compensation values may be combined to interpolate the third drive compensation value (D 3 ). Accordingly, as shown in the illustrated embodiment, selection circuitry  109 A (e.g., a multiplexer (mux)) may be implemented to select between the first drive compensation value (D 1 ), the second drive compensation value (D 2 ), and the third drive compensation value (D 3 ) based at least in part on a select signal (Select). In some embodiments, the select signal may be provided based at least in part on the current pixel input data (P 1 ), the global panel brightness level, and/or the like. Moreover, the output of the selection circuitry  109 A may be driven to the pixel (e.g., to the display panel  56 ) and/or to the output buffer  54 . 
     As mentioned above, multiple sets of interpolated values may be generated, one set for each temperature value in the vector of temperatures. A set of interpolated values may be selected from the multiple sets of interpolated values based upon the set of interpolated values that corresponds to the temperature value that is closes to the determined tile temperature. This may be performed by the temperature adaptation logic  119 A. Thus, as illustrated in  FIG.  7   , one output pixel value, which is based upon the closest match to the pixel/tile temperature, is provided as output by the temperature adaptation logic  119 A. In this manner, the pixel drive compensation values may account for temperature variations of each tile temperature t xy . Thus, the current input pixel data may be compensated based at least in part upon the pixel/tile temperatures (block  126  of  FIG.  8   ). 
     As such, the pixel value output to the display panel  56  may be determined based at least in part on a current input pixel value (P 1 ) and a previous pixel value (P 0 ) (e.g., a pixel value displayed directly prior to the current input pixel value) and tile temperature values. However, in some embodiments, compensating the image data driven to the display panel (e.g., overdriving a pixel, under driving a pixel, and/or the like) based in part on a single frame history (e.g., the previous input pixel value (P 0 )) may not be sufficient to compensate for transient response deficiencies in the display panel  56 . For instance, transitioning a pixel from a zero gray value (e.g., black) to a non-zero gray value using a single frame history during the pixel drive compensation may result in visible artifacts, such as transient response deficiencies. Accordingly, in some embodiments, the drive compensation values (e.g., first drive compensation value (D 1 ), the second drive compensation value (D 2 ), and the third drive compensation value (D 3 )) may be determined based at least in part on a multi-frame history. To that end, multiple input pixel values output to the display panel  56  prior to the current input pixel value (P 1 ) may be used to determine the drive compensation values. For example, in some embodiments, two previous frames of image data may be suitable to determine the drive compensation values. 
     Accordingly, in some embodiments, multiple input pixel values may be read (e.g., retrieved) from memory, such as external memory  38  and/or memory  20 , to be used for drive compensation of a current pixel input value. That is, for example, image data corresponding to each of a number of frames displayed before the current pixel input value may be retrieved from memory to provide a multi-frame history useful to the drive compensation of the current input pixel value. However, as discussed above, the total memory bandwidth may be fixed for accessing (e.g., fetching from and/or storing to) memory. Moreover, portions of the memory bandwidth may be used to access memory to store and/or retrieve additional data, such as burn-in statistics, configuration data, and/or the like. As such, storing and/or retrieving respective data for each of multiple previous images may reduce the memory bandwidth available for other operations, which may reduce the operational efficiency of the electronic display. Further, image data corresponding to each of a number of frames may consume additional power in the electronic device  10 . 
     Thus, in some embodiments, the pixel modification circuitry  102  may be used to produce a historical pixel value that effectively provides a multi-frame history, which may subsequently be used by the drive compensation circuitry  100  to determine the drive compensation values. To achieve the multi-frame history, the pixel modification circuitry  102  may be implemented to modify the current input pixel value (P 1 ) (e.g., the value of the current input pixel value (P 1 ) before drive compensation) based at least in part on the previous input pixel value (P 0 ) (e.g., the value of the previous input pixel value (P 0 ) before drive compensation). Thus, as described in greater detail below, the value produced by the pixel modification circuitry  102  may capture the multi-frame history of P 1  and P 0  (and/or pixel values prior to P 0 ) such that at a second time (t 2 ) directly after the first time (t 1 ), the multi-frame history (H) may be used in the drive compensation of a new current input pixel value (P 2 ). 
     As illustrated, in some embodiments, the pixel modification circuitry  102  may modify the current input pixel value (P 1 ) using a set of pixel modification lookup tables (LUTs)  110 . 
     As with the drive compensation lookup tables  108 , there may be multiple sets of pixel modification lookup tables  110 , one for each temperature value in the temperature vector (e.g., (e.g., in the case of 4 temperatures, T 0 , T 1 , T 2 , T 3 ), as illustrated in  FIG.  7   . 
     Each set of pixel modification lookup tables  110  may include lookup tables, such as a first set of pixel modification lookup tables  110 A and a second set of pixel modification lookup tables  110 B. In the example of  FIG.  7   , the first set of pixel modification lookup tables  110 A and the second set of pixel modification lookup tables  110 B each include three 17×17 tables, one for each pixel color component of red, green, and blue. However, there may be more or fewer entries. For instance, the first set of pixel modification lookup tables  110 A may include pixel modification values (e.g., pixel input modification values and/or image data modification values) mapped to corresponding input pixel values for a brightness of the display panel  56  below a first threshold and/or first range (e.g., a low global panel brightness). Similarly, the second set of pixel modification lookup tables  110 B may include pixel modification values mapped to corresponding input pixel values for a brightness of the display panel  56  above a second threshold and/or range (e.g., a high global panel brightness), which may be the same as or different from the first threshold or first range, respectively. Moreover, as described above with reference to the drive compensation lookup tables  108 , the first set of pixel modification lookup tables  110 A and the second set of pixel modification lookup tables  110 B may include a respective pixel modification lookup table for each component (e.g., color component) of a pixel, such as red (R), green (G), and blue (B). To that end, pixel modification values may be mapped to input pixel values corresponding to each component of the pixel for the different brightness settings (e.g., low global brightness, high global brightness, and/or the like) of the display panel  56 . Further, while the set of pixel modification lookup tables  110  are described herein as being populated based at least in part on a brightness of the display panel  56 , the set of pixel modification lookup tables  110  may additionally or alternatively be populated based on any suitable characteristic of the electronic device  10  and/or the display panel  56 . 
     Similar to the operation of the drive compensation lookup tables  108 , the sets of pixel modification lookup tables  110  may output respective pixel modification values based at least in part on the current input pixel value (P 1 ) and the previous input pixel value (P 0 ). Because there are pixel modification lookup tables  110  for each of the temperature values in the vector of temperatures, output values may be provided for each of the temperature values. Accordingly, the processes performed on the outputs described below may be performed for each set of outputs for each of the temperature values in the vector of temperatures, as illustrated in  FIG.  7   . 
     For example, for each set of pixel modification lookup tables  110  corresponding to a particular temperature value, a lookup table value from a first of the first set of pixel modification lookup tables  110 A may be determined for a respective color component in the current pixel image data using an index to the first of the first set of pixel modification lookup tables  110 A. The index may be determined based at least in part on the current input pixel value (P 1 ) for the respective color component (e.g., a gray level of the current input pixel value (P 1 )), the previous input pixel value for the respective color component (e.g., a gray level of the previous input pixel value (P 0 )), or a combination thereof. Because the first set of pixel modification lookup tables  110 A may map pixel modification values to a subset of input pixel values and/or vice versa, the lookup table value may then be interpolated with the current pixel input value (P 1 ) and the previous pixel input value (P 0 ). In some embodiments, for example, the lookup table value may be interpolated using linear interpolation, Barycentric interpolation, a hybrid Barycentric-linear interpolation (e.g., Barycentric interpolation in areas within some distance of a region of the LUT, linear interpretation in other areas), and/or the like. 
     Moreover, the result of the interpolation may correspond to the portion of a first pixel modification value (M 1 ) output by the first set of pixel modification lookup tables  110 A that corresponds to the respective component. The remaining portions of the first pixel modification value (M 1 ), which correspond to the other components of the current input pixel value (P 1 ), may be determined as described above using respective lookup tables (e.g., a second and a third lookup table, respectively) in the first set of pixel modification lookup tables  110 A. Further, a second pixel modification value (M 2 ) may be determined as described above with reference to the first pixel modification value (M 1 ) by using the second set of pixel modification lookup tables  110 B. 
     Further, in some embodiments, a third pixel modification value (M 3 ) may be determined based at least in part on the first pixel modification value (M 1 ) and the second pixel modification value (M 2 ). For instance, a respective weight (e.g., mixing factor) may be applied, based at least in part on the global brightness (brightness) of the display panel  56 , to each of the first pixel modification value (M 1 ) and the second pixel modification value (M 2 ), and the weighted first and second pixel modification values may be combined to interpolate the third pixel modification value (M 3 ). Accordingly, as shown in the illustrated embodiment, selection circuitry  109 B may be implemented to select between the first pixel modification value (M 1 ), the second pixel modification value (M 2 ), and the third pixel modification value (M 3 ) to produce a multi-frame history (H) based at least in part on a select signal (Select). Moreover, the multi-frame history (H) may be routed to temperature adaptation logic  119 B, where one of the multi-frame history values (H) derived from the pixel modification LUTs  110  corresponding to the closest temperature value to the pixel/tile temperature may be selected. This selected multi-frame history value (H) may then be provided to subsequent selection circuitry  109 C. 
     As illustrated, the selection circuitry  109 C may be implemented to select between the multi-frame history (H) and the current input pixel value (P 1 ) driven to the display panel  56 , which at the second time (t 2 ), mat correspond to the previous input pixel value. More specifically, the selection circuitry  109 C may be implemented to select between the two values based at least in part on the value of the previous input pixel value (P 0 ) and a pixel modification mode. To that end, the selection circuitry  109 C may be implemented to select the multi-frame history (H) when the value of the previous input pixel value (P 0 ) meets a particular condition (e.g., is less than a threshold value, is zero), which may correspond to black (e.g., a target luminance of zero) or some relatively low, and the pixel modification mode is enabled. On the other hand, if the previous pixel input value is non-zero and/or the pixel modification mode is disabled, the selection circuitry  109 C may select the current input pixel value P 1 . In some embodiments, for example, the pixel modification mode may be disabled to conserve power, enable the use of other features, such as a certain refresh rate, and/or the like. 
     Additionally or alternatively, in some embodiments, the pixel modification circuitry  102  may be implemented such that the multi-frame history (H) is calculated in response to determining the pixel modification mode is enabled and the previous input pixel value (P 0 ) is zero. Accordingly, in some embodiments, the multi-frame history (H) is not calculated when the pixel modification mode is disabled and/or the previous input pixel value (P 0 ) is non-zero. In such embodiments, the pixel modification circuitry  102  may be implemented to output the multi-frame history when the multi-frame history (H) is calculated and to output the current input pixel value (P 1 ) when the multi-frame history (H) is not calculated. 
     The value output by the selection circuitry  109 C (e.g., the current input pixel value (P 1 ) or the multi-frame history (H)) may be written-back to memory  38  via the DMA circuitry  46 , for example. Moreover, as illustrated, prior to writing the output back to memory  38 , the output may be transformed and/or compressed. As such, the PDC circuitry  48  may include a transform circuitry  112  (e.g., transform circuitry and/or logic) and a compression circuitry  114  (e.g., compression circuitry and/or logic). In some embodiments, the transform circuitry  112  may be implemented to optionally convert the output from a first image data format (e.g., 4:4:4 RGB image data) to a second image data format (e.g., GUV image data and/or a 4:2:2 sub-sampling image format). To that end, in some embodiments, the output may be transformed to an image format that is easier to store, such as an image format occupying less memory. Further, the compression circuitry  114  may be implemented to compress the output using, for example, lossless compression. Accordingly, in some embodiments the memory bandwidth used to access the memory  38  for storage and/or retrieval of the output may be minimized. 
     To use the multi-frame history (H) produced by the pixel modification circuitry  102  the PDC circuitry  48  and/or the display pipeline  36  (e.g., fetch circuitry  59 ) may be implemented to retrieve the compressed multi-frame history from the external memory  38 . Subsequently, the PDC block may, using a decompression circuitry  116 , decompress the compressed multi-frame history (H). Further, an additional transform circuitry  118  may reverse the format transformation (e.g., conversion) performed by the transform circuitry  112 . For instance, the additional transform circuitry  118  may return the multi-frame history (H) from the second image data format (e.g., GUV image data and/or a 4:2:2 sub-sampling image format) to the first image format (e.g., 4:4:4 RGB image data) output by the selection circuitry  109 C. 
     Accordingly, the drive compensation circuitry  100  may use the multi-frame history (H) in place of a previous input pixel value to determine the drive compensation to be driven to the display panel  56 . That is, for example, the multi-frame history (H) may, along with the current input pixel value (P 2 ), serve as an input to the drive compensation lookup tables  108 . Thus, the drive compensation value selected at the selection circuitry  109 A may be determined based at least in part on the current input pixel value (P 2 ) at the second time (t 2 ) and the previous two input pixel values (P 0  and P 1 ) captured in the multi-frame history (H). Moreover, because the drive compensation is determined based at least in part on the multi-frame history (H), transient response deficiencies resulting from an input pixel value of zero prior to the current input pixel value (P 2 ) may be reduced or eliminated. 
     Additionally or alternatively, if the selection circuitry  109 C selected the current input pixel value (P 1 ), at the second time (t 2 ) the PDC circuitry  48  may be implemented to retrieve the stored input pixel value (P 1 ) as the previous input pixel value (P 1 ). In such embodiments, the drive compensation circuitry  100  may be implemented to determine the drive compensation to be driven to the display panel  56  based at least in part on the current input pixel value (P 2 ) and the previous input pixel value (P 1 ), as described above with reference to the values P 1  and P 0 , respectively, at the first time (t 1 ). 
     The specific embodiments described above have been shown by way of example, and it should be understood that these embodiments may be susceptible to various modifications and alternative forms. For example, while the techniques are described herein with reference to values at a first time (t 1 ) and a second time (t 2 ), the techniques may be repeated and/or extended to any suitable number of time points. It should be further understood that the claims are not intended to be limited to the particular forms disclosed, but rather to cover all modifications, equivalents, and alternatives falling within the spirit and scope of this disclosure. 
     The techniques presented and claimed herein are referenced and applied to material objects and concrete examples of a practical nature that demonstrably improve the present technical field and, as such, are not abstract, intangible or purely theoretical. Further, if any claims appended to the end of this specification contain one or more elements designated as “means for [perform]ing [a function] . . . ” or “step for [perform]ing [a function] . . . ”, it is intended that such elements are to be interpreted under 35 U.S.C. 112(f). However, for any claims containing elements designated in any other manner, it is intended that such elements are not to be interpreted under 35 U.S.C. 112(f).

Metadata:
Filing Date: 20210514
Publication Date: 20230711
Grant Date: 20230711
Priority Date: 20200914
Inventors: CHAPPALLI, MAHESH B.
Assignee: APPLE INC
CPC Classifications: [{"code": "G09G2360/122", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/0626", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G5/10", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G2320/0693", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G5/06", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G3/2007", "inventive": true, "first": true, "tree": "[]"}, {"code": "G09G2330/021", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G5/393", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G2320/041", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2340/16", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2350/00", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G5/393", "inventive": true, "first": true, "tree": "[]"}, {"code": "G09G3/2007", "inventive": true, "first": true, "tree": "[]"}, {"code": "G09G2360/122", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2350/00", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/0242", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G5/06", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G2354/00", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2340/02", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/041", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G5/346", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2330/12", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2360/06", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2360/16", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G5/06", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G5/10", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G5/393", "inventive": true, "first": false, "tree": "[]"}, {"code": "G09G2320/041", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2330/021", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/0693", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2320/0626", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2360/122", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2350/00", "inventive": false, "first": false, "tree": "[]"}, {"code": "G09G2340/16", "inventive": false, "first": false, "tree": "[]"}]
Family ID: 80627898