PATENT DOCUMENT

Publication Number: US-10770965-B2
Application Number: US-201916365100-A
Country: US
Kind Code: B2

Title: Control of series-parallel mode (SPM) clamped flyback converter

Abstract:
This disclosure describes a flyback converter with a series-parallel mode (SPM) active clamp. The active clamp, coupled in parallel with the primary coil, may include a clamp switch, two or more snubber capacitors, and associated diodes. The active clamp may be configured to absorb and retain the leakage energy from the leakage inductance of the flyback converter. The clamp switch may be turned on selectively as the primary switch approaches one of a plurality peak values to adjust frequencies of the switching devices. With the active clamp circuit, the flyback converter may first re-capture the leakage energy in the active clamp circuit and then recover it back to the power source.

Claims:
The invention claimed is: 
     
       1. A power conversion apparatus, comprising:
 a primary coil configured to receive an input voltage; 
 a secondary coil electromagnetically coupled to the primary coil and configured to provide an output voltage; 
 a first switch coupled to the primary coil and configured to control a flow of current through the primary coil; 
 a second switch configured to control a flow of current through an active clamp circuit, the active clamp circuit coupled in parallel with the primary coil and configured to absorb a leakage energy from a leakage inductance associated with the primary coil and the secondary coil, the active clamp circuit comprising a first capacitor and a second capacitor; and 
 a controller coupled to the first switch and the second switch, the controller configured to:
 turn the first switch on, so as to store energy in the primary coil; 
 turn the first switch off, so as to charge the first and the second capacitors in series; 
 turn the second switch on when a voltage across the first switch approaches a peak value, so as to discharge the first and the second capacitors in parallel; and 
 turn the second switch off when at least one of: a voltage across the first capacitor and a voltage across the second capacitor, falls to a predetermined voltage level. 
 
 
     
     
       2. The power conversion apparatus of  claim 1 , wherein the first switch is turned on when a current is flowing through a body diode of the first switch or when the voltage across the first switch is determined to reach a minimum non-zero voltage. 
     
     
       3. The power conversion apparatus of  claim 1 , wherein the first capacitor and the second capacitor have equivalent capacitance. 
     
     
       4. The power conversion apparatus of  claim 1 , wherein the active clamp circuit further comprises a first diode. 
     
     
       5. The power conversion apparatus of  claim 4 , wherein the first diode is coupled in series with the first capacitor and the second capacitor to block any reverse current from discharging the first capacitor and the second capacitor in series. 
     
     
       6. The power conversion apparatus of  claim 4 , wherein the active clamp circuit further comprises a second diode and a third diode. 
     
     
       7. The power conversion apparatus of  claim 6 ,
 wherein the second diode is coupled in parallel with the first capacitor and the first diode, 
 wherein the third diode is coupled in parallel with the second capacitor and the first diode, and 
 wherein the second diode and the third diode are configured to allow a flow of reverse current to discharge the first capacitor and the second capacitor in parallel. 
 
     
     
       8. The power conversion apparatus of  claim 1 ,
 wherein the voltage across the first switch, after the first switch is turned off and before the second switch is turned on, represents a sinusoidal voltage that includes a plurality of peak values, and 
 wherein the second switch is turned on when the voltage across the first switch approaches one of the plurality of peak values. 
 
     
     
       9. A method for operating a power conversion apparatus, comprising:
 receiving an input voltage at a primary coil; 
 providing an output voltage at a secondary coil, the secondary coil electromagnetically coupled to the primary coil; 
 controlling a flow of current through the primary coil by using a first switch; and 
 controlling a flow of current through an active clamp circuit by using a second switch, the active clamp circuit coupled in parallel with the primary coil and configured to absorb a leakage energy from a leakage inductance associated with the primary coil and the secondary coil, the active clamp circuit comprising a first capacitor and a secondary capacitor, 
 wherein the first switch and second switch are controlled by a controller, the controller configured to:
 turn the first switch on, so as to store energy in the primary coil; 
 turn the first switch off, so as to charge the first and the second capacitors in series; 
 turn the second switch on when a voltage across the first switch approaches a peak value, so as to discharge the first and the second capacitors in parallel; and 
 turn the second switch off when at least one of: a voltage across the first capacitor and a voltage across the second capacitor, falls to a predetermined voltage level. 
 
 
     
     
       10. The method of  claim 9 , wherein the first switch is turned on when a current is flowing through a body diode of the first switch or when the voltage across the first switch is determined to reach a minimum non-zero voltage. 
     
     
       11. The method of  claim 9 , wherein the first capacitor and the second capacitor have equivalent capacitance. 
     
     
       12. The method of  claim 9 , wherein the active clamp circuit further comprises a first diode. 
     
     
       13. The method of  claim 12 , wherein the first diode is coupled in series with the first capacitor and the second capacitor to block any reverse current from discharging the first capacitor and the second capacitor in series. 
     
     
       14. The method of  claim 12 , wherein the active clamp circuit further comprises a second diode and a third diode. 
     
     
       15. The method of  claim 14 ,
 wherein the second diode is coupled in parallel with the first capacitor and the first diode, 
 wherein the third diode is coupled in parallel with the second capacitor and the first diode, and 
 wherein the second diode and the third diode are configured to allow a flow of reverse current to discharge the first capacitor and the second capacitor in parallel. 
 
     
     
       16. The method of  claim 9 ,
 wherein the voltage across the first switch, after the first switch is turned off and before the second switch is turned on, represent a sinusoidal voltage that includes a plurality of peak values, and 
 wherein the second switch is turned on when the voltage across the first switch approaches one of the plurality of peak values. 
 
     
     
       17. A power converter, comprising:
 a primary coil coupled in series with a first switch, the primary coil configured to receive an input voltage; 
 a secondary coil electromagnetically coupled to the primary coil, the secondary configured to provide an output voltage; 
 an active clamp circuit coupled in parallel to the primary coil, the active clamp circuit comprising a second switch coupled in series with a first capacitor and a second capacitor; and 
 a controller coupled to the first switch and the second switch, the controller configured to:
 turn the first switch on, so as to store energy in the primary coil; 
 turn the first switch off, so as to charge the first and the second capacitors in series; 
 turn the second switch on when a voltage across the first switch approaches a peak value, so as to discharge the first and the second capacitors in parallel; and 
 turn the second switch off when at least one of: a voltage across the first capacitor and a voltage across the second capacitor, falls to a predetermined voltage level. 
 
 
     
     
       18. The power conversion apparatus of  claim 17 , wherein the first switch is turned on when a current is flowing through its body diode or when the voltage across the first switch is determined to reach a non-zero minimum voltage. 
     
     
       19. The power conversion apparatus of  claim 17 , wherein the first capacitor and the second capacitor have the same capacitance. 
     
     
       20. The power conversion apparatus of  claim 17 , wherein the active clamp circuit further comprises a first diode. 
     
     
       21. The power conversion apparatus of  claim 20 , wherein the first diode is coupled in series with the first capacitor and the second capacitor to block any reverse current from discharging the first capacitor and the second capacitor in series. 
     
     
       22. The power conversion apparatus of  claim 20 , wherein the active clamp circuit further comprises a second diode and a third diode. 
     
     
       23. The power conversion apparatus of  claim 22 ,
 wherein the second diode is coupled in parallel with the first capacitor and the first diode, 
 wherein the third diode is coupled in parallel with the second capacitor and the first diode, and 
 wherein the second diode and the third diode are configured to allow a flow of reverse current to discharge the first capacitor and the second capacitor in parallel. 
 
     
     
       24. The power conversion apparatus of  claim 17 ,
 wherein the voltage across the first switch, after the first switch is turned off and before the second switch is turned on, represents a sinusoidal voltage that includes a plurality of peak values, and 
 wherein the second switch is turned on when the voltage across the first switch approaches one of the plurality of peak values.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 15/847,008, which claims priority to U.S. Provisional Patent Application No. 62/447,036. This application is also a continuation-in-part of U.S. patent application Ser. No. 15/829,253, which is a continuation of U.S. patent application Ser. No. 15/585,715, which is a continuation of U.S. patent application Ser. No. 15/042,885, which claims priority to U.S. Provisional Patent Application No. 62/175,881. This application claims priority to each of the foregoing applications, each of which is also hereby incorporated by reference in its entirety. 
    
    
     TECHNICAL FIELD 
     This disclosure relates generally to the field of power converters and, in particular, to the control of flyback converters with series-parallel mode (“SPM”) active clamps. 
     BACKGROUND 
     Flyback converters are commonly used as isolated power supplies for electronic devices. For example, a flyback converter typically includes two coils that are electromagnetically coupled with each other, like primary and secondary windings of a transformer. The primary coil is coupled to an input circuit/power source, and the secondary coil is coupled to an output circuit/load, thus providing desired isolation between the input and output. By controlling a flow of current through the primary coil using a primary switch, a flyback converter may produce a regulated output voltage of a desired target value at the output. 
     The primary and secondary coils may have parasitic leakage inductances that also capture energy (“leakage energy”). The leakage inductances may cause additional losses unless the energy stored therein is recovered. Thus, some form of leakage energy recovery circuitry may be included in a flyback converter. Additionally, a drive toward miniaturization and portability in the consumer electronic industry pushes such power converters to be packaged in smaller and smaller volumes. Simply decreasing the size and/or component count, however, typically makes it harder to achieve a desired level of efficiency, because operations at high switching frequencies that can facilitate miniaturization may otherwise negatively affect efficiency. Thus, what is needed is a flyback converter adapted to recover the leakage energy to improve efficiency that also provides flexibility to avoid operating at unnecessarily high frequencies. 
     SUMMARY 
     Described herein are various devices and methods for operating flyback converters with serial-parallel mode (“SPM”) active clamps, in which leakage energy is absorbed and retained by clamps and then returned to the input power source. In some embodiments described herein, the converters may transfer the leakage energy from the leakage inductance to snubber capacitors by charging the snubber capacitors in series. Further, the converter embodiments described herein may retain the leakage energy in the snubber capacitors, while the normal “working” energy is being delivered through the transformer to a load of the output circuitry. Still further, when all the “working” energy stored in the transformer is delivered to the load, the converter embodiments described herein may then start a resonance between the primary coil (and leakage inductance) and a parasitic capacitance of the primary switch. The resonance may create a sinusoidal voltage across the primary switch, which may include a plurality of peak values. When the primary switch&#39;s voltage approaches a peak value, the clamp switch may reach a valley voltage. Still further, the converter embodiments described herein may turn on the clamp switch selectively near one of the primary switch&#39;s peak values, thus minimizing the clamp switch&#39;s turn-on losses. The clamp switch may be turned on at the first peak of the primary switch&#39;s voltage, or may be delayed to the subsequent peaks to extend the cycles and slow down the switching frequency. The converter embodiments described herein may then start a transfer of leakage energy from the snubber capacitors to the primary coil, by discharging the snubber capacitors in parallel and driving a primary winding current in an opposite direction. Still further, the converter embodiments described herein may turn off the clamp switch adaptively, and after a delay, at zero-voltage switching (ZVS) or a minimum non-zero voltage turn on the main primary switch, thus returning the leakage energy back to the input power source. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Various embodiments of the disclosed concepts are illustrated by way of example and not by way of limitation in the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an”, “one” or “another” embodiment in this disclosure are not necessarily to the same or different embodiment, and they mean at least one. In order to be concise, a given figure may be used to illustrate the features of more than one embodiment, or more than one species of the disclosure, and not all elements in the figure may be required for a given embodiment or species. 
         FIG. 1  is schematic diagram illustrating exemplary SPM clamped flyback converter  100  in accordance with one embodiment. 
         FIG. 2  shows the operation of exemplary flyback converter  100  in Operational Stage I in accordance with one embodiment. 
         FIG. 3  shows the operation of exemplary flyback converter  100  in Operational Stage II in accordance with one embodiment. 
         FIG. 4  shows the operation of exemplary flyback converter  100  in Operational Stage III in accordance with one embodiment. 
         FIG. 5  shows the operation of exemplary flyback converter  100  in Operational Stage IV in accordance with one embodiment. 
         FIG. 6  shows the operation of exemplary flyback converter  100  in Operational Stage V in accordance with one embodiment. 
         FIG. 7  shows waveforms of exemplary flyback converter  100  in accordance with one embodiment. 
         FIG. 8  shows the turn-on adjustments of a clamp switch of exemplary flyback converter  100  in accordance with one embodiment. 
         FIG. 9  shows the turn-on adjustments of a clamp switch of exemplary flyback converter  100  in accordance with another embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed concepts. As part of this description, some of this disclosure&#39;s drawings represent structures and devices in block diagram form in order to avoid obscuring the disclosure. In the interest of clarity, not all features of an actual implementation are described in this disclosure. Moreover, the language used in this disclosure has been principally selected for readability and instructional purposes, and may not have been selected to delineate or circumscribe the disclosed subject matter, resort to the claims being necessary to determine such disclosed subject matter. 
       FIG. 1  is a schematic diagram illustrating exemplary clamped flyback converter  100 . As shown in  FIG. 1 , converter  100  may include primary coil P 1   105  and secondary coil S 1   110 , which are electromagnetically coupled with each other. Primary coil P 1   105  may receive an input voltage V IN  from power source  115 , while secondary coil S 1   110  may supply an output voltage V OUT  to load  120  (e.g., resistance R LOAD ) through secondary switch Q 3   130 . To simplify explanation, it is assumed herein that primary coil P 1   105  and secondary coil S 1   110  possess an ideal electromagnetic coupling, meaning that all of the energy stored in primary coil P 1   105  will be transferred to secondary coil S 1   110  without losses. Any losses associated with the electromagnetic coupling between the two coils is represented by a lump-sum leakage inductance L 1   135 , as shown in  FIG. 1 . Accordingly, leakage inductance L 1   135  may capture a leakage energy that is the energy not transferred from the real, non-ideal primary coil to the real, non-ideal secondary coil. 
     Flyback converter  100  may further comprise primary switch Q 1   125 , e.g., a first metal-oxide semiconductor field-effect transistor (MOSFET), coupled in series with primary coil P 1   105 . Other types of switching devices could also be used. Additionally, flyback converter  100  may include active clamp circuit (“clamp”)  170 , which may be coupled in parallel with primary coil P 1   105  (and leakage inductance L 1   135 ). In the illustrated embodiment, clamp  170  may comprise clamp switch Q 2   140 , e.g., a second MOSFET (or other type of switching device), in series with snubber capacitors C 4   145  and C 5   150  and diode D 4   155 . Clamp  170  may further include diodes D 5   160  and D 6   165 , wherein diode D 5   160  may be coupled in parallel with snubber capacitor C 5   150  and diode D 4   155 , and diode D 6   165  may be coupled in parallel with snubber capacitor C 4   145  and diode D 4   155 . Other active clamp circuit arrangements are also possible. Secondary switch Q 3   130  may be controlled in coordination with primary switching Q 1   125 , providing synchronous rectification to load  120 . Note that switch Q 3   130  may also be implemented by a diode. Smoothing capacitor C 3  may be coupled between secondary output terminal and ground, as a filter for output voltage V OUT . 
     Flyback converter  100  may include one or more controller(s)  175 , which may be coupled to and generate respective control signals for switches Q 1   125 , Q 2   140 , and/or Q 3   130 .  FIG. 1  also depicts gate drive circuits for primary switch Q 1   125  (comprising voltage source V 1  and resistor R 1 ) and clamp switch Q 2   140  (comprising voltage source V 2  and resistor R 2 ), respectively. Note that switches Q 1   125  and Q 2   140  may also comprise an intrinsic anti-parallel body diode (e.g., diodes D 1  and D 2 ) and a parallel parasitic capacitance (e.g., capacitor C 1 ) as shown in  FIG. 1 . Additionally, as an alternative to MOSFETs, flyback converter  100  may use other types of semiconductor switching devices, for example, insulated gate bipolar transistors (IGBTs), junction gate field-effect transistors (JFETs), silicon carbine and/or gallium nitride devices. 
     Operations of flyback converter  100  may be explained in sequential Operational Stages I-V, which are schematically illustrated in  FIGS. 2-6 .  FIG. 2  illustrates the operation of flyback converter  100  in Operational Stage I. In Operational Stage I, clamp switches Q 2   140  and secondary switch Q 3   130  remain open, and converter  100  may turn on primary switch Q 1   125 . When primary switch Q 1   125  is closed, power source  115  causes a primary winding current I P1  in primary coil P 1   105 , as illustrated by lines  205 - 230 . Because secondary switch Q 3   130  remains open, and primary winding current I P1  builds up in primary coil P 1   105 , energy is accumulated/stored in primary coil P 1   105 . Additionally, as primary winding current I P1  also flows through leakage inductance L 1   135 , a leakage energy may be captured by leakage inductance L 1   135 . 
       FIG. 3  illustrates the operation of flyback converter  100  in Operational Stage II. In Operational Stage II, flyback converter  100  may turn off primary switch Q 1   125  and turn on secondary switch Q 3   130 . In Operational Stage II, primary winding current I P1  may start to decline because primary coil P 1   105  is disconnected from power source  115 . This may create an induced voltage across secondary coil S 1   110  that causes a current to flow through closed secondary switch Q 3   130 , thus transferring the stored energy from primary coil P 1   105 , through secondary coil S 1   110 , to load  120 . Meanwhile, primary winding current I P1  may be forced to flow into snubber capacitors C 4   145  and C 5   150  through clamp switch Q 2   140 &#39;s body diode D 2  and diode D 4   155 , as shown by lines  305 - 330 , thus charging snubber capacitors C 4   145  and C 5   150  in series. As aforementioned, it is assumed that all energy stored in primary coil P 1   105  will be transferred to secondary coil S 1   110  without losses; the losses being modeled by leakage inductance L 1   135 . Thus, only leakage energy may be delivered from leakage inductance L 1   135  into snubber capacitors C 4   145  and C 5   150 . Operational Stage II may continue until both of the currents through primary coil P 1   105  and secondary coil S 1   110  reduce to zero, which indicates that all the normal “working” energy is transferred through the transformer to load  120 . 
     Referring to  FIG. 3 , in Operational Stage II, each snubber capacitor C 4   145  and C 5   150  may develop respective clamp voltages V C4  and V C5  by the charging current. The conduction of body diode D 2  brings the clamp switch Q 2   125 &#39;s voltage V Q2  to approximately zero (e.g., a forward voltage drop across diode D 2 ), thus the clamp voltages V C4  and V C5  and primary switch Q 1   125 &#39;s voltage V Q1  may be determined according to equations (1) and (2):
 
 V   C4   +V   C5   =V   OR   +V   L1 =( V   OUT   +V   Q3 )×( Np/Ns )+ V   L1   (1)
 
 V   Q2   =V   IN   +V   C4   +V   C5   (2)
 
where V OR  is the reflected output voltage across primary coil P 1   105 , V L1  is an induced voltage of leakage inductance L 1   135 , V OUT  is the output voltage of converter  100 , V Q3  is the voltage drop across secondary switch Q 3   130  (a small voltage when Q 3   130  conducts), and Np/Ns represents the turns-ratio between primary coil P 1   105  and secondary coil S 1   110 . For example, if converter  100  converts 300V input voltage (e.g., V IN =300V) to 5V voltage (e.g., V OUT =5V), turns-ratio Np/Ns between primary and secondary coils is 14:1, and voltage drop of secondary switch Q 3   130  is 0.7V, then according to equation (1) reflected output voltage V OR  may be (5+0.7)×14=79.8V. To simplify explanation, it is assumed herein that snubber capacitors C 4   145  and C 5   150  have equal capacitances. Thereby, each snubber capacitor C 4   145  and C 5   150  may be charged to a voltage equal to half of reflected voltage V or  plus half of induced leakage voltage V L1 . Following the exemplary numbers, if snubber capacitors C 4   145  and C 5   150  each is charged to 50V, then approximately 40V (i.e., 79.8V/2) comes from reflected output voltage V OR  and the additional 10V (to reach 50V) is contributed by the leakage energy of leakage inductance L 1   135 . Between the two voltages V OR  and V L1 , reflected output voltage V OR  is typically dominant. Thereby, respective clamp voltages V C4  and V C5  of snubber capacitors C 4   145  and C 5   150  may remain substantially constant with a regulated output voltage V OUT . According to equation (2), voltage VQ 1  over primary switch Q 1   125  may reach 400V (e.g., 300+50+50=400V). Note that if snubber capacitors C 4   145  and C 5   150  have different capacitances, they may be charged to different clamp voltages. This may slightly affect the discharging sequence of snubber capacitors C 4   145  and C 5   150 , which will be discussed in the following descriptions.
 
     Once the leakage energy has been transferred from leakage inductance L 1   135  to snubber capacitors C 4   145  and C 5   150 , diode D 4   155  that is in series with the snubber capacitors may block any reverse current. Since respective clamp voltages V C4  and V C5  are less than the total voltage (V or +V L1 ) across primary coil P 1   105  and leakage inductance L 1   135 , diodes D 5   160  and D 6   165  may become reverse biased. Thus, snubber capacitors C 4   145  and C 5   150  may be disconnected from primary coil P 1   105 , which causes C 4   145  and C 5   150  to retain the leakage energy absorbed from leakage inductance L 1   135 . As the body diode D 2  stops conducting, a voltage V Q2  may be built up across clamp switch Q 2   140 . Voltage V Q2  may be determined according to equation (3):
 
 V   Q2   =V   IN   +V   C4   +V   C5   −V   Q1   (3)
 
where input voltage V IN  and clamp voltages V C4  and V C5  may remain substantially constant. Thus, clamp switch Q 2   140 &#39;s voltage V Q2  may be inversely proportional to the primary switch Q 1   125 &#39;s voltage V Q1 . In other words, voltage V Q2  may reach a valley value when voltage V Q1  approaches a peak value.
 
     Operational Stage II continues until all the stored energy is transferred from primary coil P 1   105  to secondary coil  110  and load  120 . Converter  100  may turn off secondary switch Q 3   130  and enter Operational Stage III. Referring to  FIG. 4 , in Operational Stage III, primary coil P 1   105  (and leakage inductance L 1   135 ) is placed in series with the parasitic capacitance C 1  of primary switch Q 1   125  forming an inductor-capacitor (LC) resonant circuit. Under the stimulation of power source  115 , this LC circuit may generate an oscillating primary winding current I P1 , as shown by lines  405 - 430 , and a sinusoidal voltage V Q1  over primary switch  125 . This sinusoidal voltage V Q1  may include a plurality of peak values. As described in  FIG. 3 , each peak value may correspond to a valley voltage for V Q1  of clamp switch Q 2   140 . Because switching losses of a semiconductor switching devices heavily depend on its switching voltages, it may thus be desirable to turn on clamp switch Q 2   140  selectively near one of voltage V Q1 &#39;s peak values, i.e., near one of voltage V Q2 &#39;s valley values. 
     The operation of power converter  100  in Operational Stage IV is shown in  FIG. 5 , after clamp switch Q 2   140  is turned on. With the falling of voltage V Q1  during the LC resonance, diodes D 5   160  and D 6   165  may become forward biased and start to conduct. This may discharge snubber capacitors C 4   145  and C 5   150  in parallel and generate a primary winding current I P1  in an opposite direction, as indicated by lines  505 - 530 . This may interrupt the resonance and transfer the absorbed leakage energy from C 4   145  and C 5   150  to primary coil P 1   105 . As aforementioned, when snubber capacitors C 4   145  and C 5   150  have different capacitances, snubber capacitors C 4   145  and C 5   150  may be charged to different clamp voltages. Therefore, the snubber capacitor with the lower clamp voltage may be discharged first. Once the diode (e.g., diode D 5   160  or D 6   165 ) of the other snubber capacitor with the higher clamp voltage becomes forward biased, the other snubber capacitor may start to discharge, and then snubber capacitors C 4   145  and C 5   150  may be discharged in parallel together. 
     The respective clamp voltage V C4  and V C5  of snubber capacitors C 4   145  and C 5   150  may decline as the absorbed leakage energy is depleted. As described in  FIG. 3 , snubber capacitors C 4   145  and C 5   150 &#39;s clamp voltages (e.g., 50V) are contribute by the reflected output voltage V OR  (e.g., 40V) and leakage energy of leakage inductance L 1   135  (e.g., the additional 10V). Therefore, when snubber capacitors C 4   145  and C 5   150 &#39;s clamp voltages fall to, for example, 40V, all the leakage energy will have been delivered to primary coil P 1   105 . Power converter  100  may then turn off clamp switch Q 2   140  and enter Operational Stage V. As shown in  FIG. 6 , the reverse primary winding current I P1  may continuously flow into primary coil P 1   105  through the body diode D 1  of primary switch Q 1   125 , as shown by lines  605 - 630 , thus further delivering the leakage energy from primary coil P 1   105  back to power source  115 . The conduction of the body diode D 1  may bring primary switch Q 1   125 &#39;s voltage V Q1  close to zero (e.g., a forward voltage drop of the body diode D 1 ). Thereby, after a predetermined delay, converter  100  may turn on primary switch Q 1   125  to achieve ZVS for minimal losses. After primary switch Q 1   125  is closed, power converter  100  may start the next cycle with Operational Stage I as described in  FIG. 2 . It is also possible that the energy in the reverse primary winding current IN is insufficient to discharge the sum of the parasitic capacitances of switches Q 1   125 , Q 2   140 , transformer (including primary coil P 1   105  &amp; secondary coil S 1   110 ), and the reflected capacitance of secondary switch Q 3   130  into the primary side completely to conduct the body diode D 1 . Therefore, alternatively primary switch Q 1   125  may be turned on at a minimum non-zero voltage (e.g., near ZVS). In either case (i.e., with or without the conduction of body diode D 1 ), primary switch Q 1   125  may be turned on at a minimum voltage point to reduce turn-on losses. 
       FIG. 7  shows waveforms of exemplary power converter  100  during Operational Stages I-V in accordance with one embodiment. As shown in  FIG. 7 , the horizontal axis represents time, the first vertical axis on the left represents voltage, and the second vertical axis on the right represents current. Waveform  705  depicts primary switch Q 1   125 &#39;s voltage V Q1 , while waveform  710  depicts primary winding current I P1 .  FIG. 7  includes four sections (A, B, C and D) associated with four transitions ( 1 ,  2 ,  3 , and  4 ). Among them, section A corresponds to Operational Stage I described in  FIG. 1 , after power converter  100  turns on primary switch Q 1   125 . Thereby, as shown herein, waveform  705  is close to zero to represent the small conduction voltage over primary switch Q 1   125 , and waveform  710  increases because of the building-up of primary winding current I P1  through primary coil P 1   105 . 
     Transition  2  occurs when converter  100  turns off primary switch Q 1   125  and turns on secondary switch Q 3   130 , corresponding to Operational Stage II described in  FIG. 3 . Operational Stage II may start with some dynamic transients, as shown by waveform  705  during section B and transition  4 , to represent the transfer of leakage energy from leakage inductance L 1   135  to snubber capacitors C 4   145  and C 5   150  (by charging the snubber capacitors in series). Meanwhile, stored energy in primary coil P 1   105  may be also delivered to secondary coil S 1   110 . Thus, primary winding current I P1  declines as shown by waveform  710 . After all the leakage energy is transferred to snubber capacitors C 4   145  and C 5   150 , primary switch Q 1   125 &#39;s voltage V Q1  may settle down, as shown by waveform  705 , to 400V, for example, according to equation (2) in  FIG. 3 . Snubber capacitors C 4   145  and C 5   150  may then be disconnected from primary coil P 1   105 , retaining the absorbed leakage energy and remaining at substantially constant clamp voltages, as shown by waveform  705 , during section C, while the storage energy of primary coil P 1   105  is being continuously transferred to secondary coil S 1   110  and load  120 . 
     Once the stored energy is transferred to the secondary side, power converter  100  may turn off secondary switch Q 3   130  and enter Operational Stage III, as shown by transition  3  in  FIG. 7 . With reference to the descriptions in  FIG. 4 , primary coil P 1   105  and the parasitic capacitance C 1  of primary switch Q 1   125  may form a LC resonant circuit, which may result in a sinusoidal voltage V Q1  depicted by waveform  705  in  FIG. 7 . Note that waveform  705  shows only half of the first sine waveform. 
     Converter  100  may turn on clamp switch Q 2   140  and enter Operational Stage IV. As described in  FIG. 5 , with the falling of voltage V Q1  during the LC resonance, diodes D 5   160  and D 6   165  may become forward biased and start to conduct. Snubber capacitors C 4   145  and C 5   150  may start to discharge in parallel, generating a primary winding current I P1  in an opposite direction as shown by waveform  710  during section D. As the absorbed leakage energy is transferred to primary coil P 1   105 , respective clamp voltages V C4  and V C5  of snubber capacitors C 4   145  and C 5   150  decrease. According to equation (2), voltage V Q1  declines accordingly, as shown by waveform  705 . 
     By the end of section D, respective clamp voltages V C4  and V C5  fall to half of the reflected output voltage V OR  (e.g., 40V), and all the leakage energy has been delivered to primary coil P 1   105 . Converter  100  may turn off clamp switch Q 2   140  and enter Operational Stage V, as shown by transition  1  in  FIG. 7 . According to the descriptions in  FIG. 6 , Operational Stage V may occupy only a short delay between turn-off of clamp switch Q 2   140  and turn-on of primary switch Q 1   125 . The delay is inserted to allow for the conduction of the body diode D 1  or to maximize the discharge of the parasitic capacitances as described in Operational Stage V. This may bring primary switch Q 1   125 &#39;s voltage V Q1  to approximately zero, as shown by waveform  705 , thus permitting primary switch Q 1   125  to be turned on to achieve ZVS or near ZVS. Converter  100  may start the next cycle with duration A. 
     When the load of converter  100  becomes lighter, for example, by increasing resistance R LOAD , less energy needs to be transferred from primary to secondary. Thus, sections A-D may become shorter. Correspondingly, the switching frequencies for switches Q 1   125 , Q 2   140  and Q 3   130  may become higher. For efficiency, EMI concerns, or other reasons, it may be desirable to avoid such high frequency operations. One way to reduce the switching frequency is to adjust the turn-on point of clamp switch Q 2   140  (and the subsequent section D).  FIG. 8  shows the adjustments of turn-on point for clamp switch Q 2   140  in accordance with one embodiment. As shown herein, the adjustments will be explained in view of exemplary waveform  800  of voltage V Q1  and corresponding gating signals for switches Q 1   125  and Q 2   140 . Note that the horizontal axes represent time, and the numbers (0, 1) along the vertical axes represent (logic low, logic high) respectively, in  FIG. 8 . 
     As described above, after the leakage energy is absorbed by snubber capacitors C 4   145  and C 5   150 , converter  100  may enter a LC resonance between primary coil P 1   105  (and leakage inductance L 1   135 ) and the parasitic capacitance C 1  of primary switch Q 1   125 . The resonance may create a sinusoidal voltage V Q1 , as shown by waveform  800 , for primary switch Q 1   125 . Sinusoidal voltage V Q1  may include a plurality of peak values  805 ,  820  and  835 , each of which may correspond to a valley voltage V Q2  over clamp switch Q 2   140 . To minimize switching losses, it is thus desirable to turn on clamp switch Q 2   140  selectively when voltage V Q1  approach one of its peak values. 
     Referring to  FIG. 8 , clamp switch Q 2   140  may be turned on at V Q1 &#39;s first peak value  805  by gating signal  850 . Subsequently, instead of continuing oscillation as shown by line  845 , converter  100  may enter Operational Stage IV (section D in  FIG. 7 ) as shown by dashed line  815 . Snubber capacitors C 4   145  and C 5   150  may be discharged, and when their respective clamp voltage fall under a certain value, as indicated by corner  810 , all leakage energy is transferred to primary coil P 1   105 . Clamp switch Q 2   140  may be turned off by gating signal  850 , and after a predetermined delay, voltage V Q1  may decline to approximately zero due to the conduction of body diode D 1  of primary switch Q 1   125 . Primary switch Q 1   125  may be turned on by gating signal  855  to achieve ZVS. 
     Following the same principle, converter  100  may wait after the first full sinusoidal cycle of voltage V Q1 , and turn on clamp switch Q 2   140  at voltage V Q1 &#39;s second peak value  820  by gating signal  860 . Similarly, instead of continuing oscillation as shown by line  845 , converter  100  may enter Operational Stage IV (section D in  FIG. 7 ) as shown by dashed line  830 . Subsequently, when the leakage energy is transferred from snubber capacitors C 4   145  and C 5   150  to primary coil P 1   105 , as indicated by corner  810 , converter  100  may turn off clamp switch Q 2   140  by gating signal  860 . After the predetermined delay, primary switch Q 1   125  may be turned on by gating signal  865  to achieve ZVS. 
     Turn-on of clamp switch Q 2   140  may be further delayed to voltage V Q1 &#39;s third peak value  835 , as shown by gating signal  870  in  FIG. 8 . In this case, primary switch Q 1   125  may experience two full sinusoidal cycles before it starts to decline, as shown by solid line  845 . Accordingly, clamp switch Q 2   140  may be turned off after the leakage energy is transferred to primary coil P 1   105  (as indicated by corner  840 ) by gating signal  870 . Subsequently, after the predetermined delay, converter  100  may turn on primary switch Q 1   125  by gating signal  875  to achieve ZVS. 
     Alternatively, flyback converter  100  may turn on primary switch Q 1   125  at a minimum non-zero voltage (e.g., near ZVS) without the conduction of its body diode D 1  as described in Operational Stage V. From top to bottom,  FIG. 9  shows waveform  900  of voltage V Q1  of primary switch Q 1   125 , and gating signals for switches Q 1   125  and Q 2   140  corresponding to turning on clamp switch Q 2   140  at the first, second and third peak voltages of V Q1 , respectively. Similar to the above descriptions in  FIG. 8 , clamp switch Q 2   140  may be turned on at V Q1 &#39;s first peak value  905  by gating signal  950 . Subsequently, instead of continuing oscillation as shown by line  945 , converter  100  may enter Operational Stage IV (section D in  FIG. 7 ) as shown by dashed line  915 . After switch Q 2   140  turns off by gating signal  950 , without the conduction of the body diode D 1 , switch Q 1   125  may be turned on by gating signal  955  when its voltage V Q1  reaches a minimum non-zero voltage, as shown by sharp falling edge  917 . 
     Following the same principle, converter  100  may wait until voltage V Q1 &#39;s second peak value  920  and then turn on clamp switch Q 2   140  by gating signal  960 . Similarly, instead of continuing oscillation as shown by line  945 , converter  100  may enter Operational Stage IV (section D in  FIG. 7 ) as shown by dashed line  930 . When voltage V Q1  reaches a minimum non-zero voltage, flyback converter  100  may turn on primary switch Q 1   125  near ZVS by gating signal  965 , as shown by sharp falling edge  932 . 
     Finally, turn-on of clamp switch Q 2   140  may be further delayed to voltage V Q1 &#39;s third peak value  935 , as shown by gating signal  970  in  FIG. 9 . In this case, primary switch Q 1   125  may experience two full sinusoidal cycles before it starts to decline, as shown by solid line  945 . Accordingly, converter  100  may turn on primary switch Q 1   125  by gating signal  975  at a minimum non-zero voltage, as shown by sharp falling edge  947 . 
     The peak values of voltage V Q1  may be detected by monitoring falling edges of voltage V Q1 . Controller(s)  175  may also receive detection signal(s) for transitions of voltage V Q1  from reflected output voltage (e.g., 80V) to half of the reflected output voltage (e.g., 40V), where each transition may be indicative of one sinusoidal cycle. Based on those feedback signals, controller(s)  175  may determine the corresponding peak values of voltage V Q1  and thus the point to turn on clamp switch Q 2   140  accordingly. Further, when the load of converter  100  reduces, converter  100  may enter a discontinuous conduction mode (DCM). In DCM, the switching of clamp switch Q 2   140  may become asynchronous with sinusoidal voltage V Q1 . For example, clamp switch Q 2   140  may be turned on at points other than at a peak value of voltage V Q1 . 
     The various embodiments described above are provided by way of illustration only and should not be constructed to limit the scope of the disclosure. Various modifications and changes can be made to the principles and embodiments herein without departing from the scope of the disclosure and without departing from the scope of the claims.

Metadata:
Filing Date: 20190326
Publication Date: 20200908
Grant Date: 20200908
Priority Date: 20150615
Inventors: DAVILA, MARCO A.
ANDRES, JOAO L.
BUCHERU, BOGDAN T.
PHADKE, VIJAY
Assignee: APPLE INC
CPC Classifications: [{"code": "H02M3/33569", "inventive": true, "first": false, "tree": "[]"}, {"code": "H02M3/01", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M3/33569", "inventive": true, "first": false, "tree": "[]"}, {"code": "H02M3/01", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M1/346", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M1/346", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M1/342", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M1/34", "inventive": true, "first": true, "tree": "[]"}, {"code": "H02M1/34", "inventive": true, "first": true, "tree": "[]"}, {"code": "H02M3/33576", "inventive": false, "first": false, "tree": "[]"}, {"code": "Y02B70/10", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M3/33576", "inventive": false, "first": false, "tree": "[]"}, {"code": "Y02B70/10", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M1/08", "inventive": true, "first": false, "tree": "[]"}, {"code": "H02M2001/346", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M2001/342", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M1/34", "inventive": true, "first": true, "tree": "[]"}, {"code": "H02M1/08", "inventive": true, "first": false, "tree": "[]"}, {"code": "H02M3/33576", "inventive": false, "first": false, "tree": "[]"}, {"code": "H02M3/33569", "inventive": true, "first": false, "tree": "[]"}, {"code": "Y02B70/1491", "inventive": false, "first": false, "tree": "[]"}]
Family ID: 62841626