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麒麟系列產品 > 9000系列

| 型号 | 工艺 | CPU> 指令集(ARM) | CPU> 微架构 | CPU> 核心数 | CPU> 频率(GHz) | GPU> 微架構 | GPU> 频率(MHz) | 内存支援> 樣式 | 内存支援> 總線帶寬(bit) | 内存支援> 頻寬 | 卫星定位 | 通讯技术支援> 类型 | 通讯技术支援> 总线宽度 (bit) | 通讯技术支援> 带宽(GB/s) | 样品发布时间 | 采用产品 |
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| Kirin 9000L | TSMC 5 nm FinFET (EUV) | ARMv8.2-A | Cortex-A77  Cortex-A55  DynamIQ | (1+2)+3 | 3.13 (A77 H) 2.54 (A77 L) 2.05 (A55) | Mali-G78 MP22 | 759 MHz (176 EUs, 1408 ALUs) (2137.3 GFLOPS FP32) | LPDDR4X-2133  LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) |  |  | Q4 2020 | Mate 40E Pro |
| Kirin 9000E | TSMC 5 nm FinFET (EUV) | ARMv8.2-A | Cortex-A77  Cortex-A55  DynamIQ | (1+3)+4 | 3.13 (A77 H) 2.54 (A77 L) 2.05 (A55) | Mali-G78 MP22 | 759 MHz (176 EUs, 1408 ALUs) (2137.3 GFLOPS FP32) | LPDDR4X-2133  LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) | 不適用 | 不適用 | Q4 2020 |  列表  華為Mate 40系列   |
| Kirin 9000 | TSMC 5 nm FinFET (EUV) | ARMv8.2-A | Cortex-A77  Cortex-A55  DynamIQ | (1+3)+4 | 3.13 (A77 H) 2.54 (A77 L) 2.05 (A55) | Mali-G78 MP24 | 759 MHz (176 EUs, 1408 ALUs) (2137.3 GFLOPS FP32) | LPDDR4X-2133  LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) | 不適用 | 不適用 | Q4 2020 |  列表 華為Mate 40 Pro 華為 Mate 40 Pro+ 華為Mate 40 RS Porsche Design  |
| Kirin 9000S | SMIC 7 nm FinFET (DUV) | ARMv8.2-A | HiSilicon Taishan microarchitecture Cortex-A510 | (2+6)+4 | 2.62 (TaiShanV120) 2.15 (TaiShanV120) 1.53 (Cortex-A510) | Maleoon 910 MP4 | 750 MHz | LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) | 不適用 | 不適用 | Q2 2023 |  列表  華為Mate 60系列   |
| Kirin 9000SL/WM | SMIC 7 nm FinFET (DUV) | ARMv8.2-A | HiSilicon Taishan microarchitecture Cortex-A510 | 1+2+3 | 2.35 (TaiShanV120) 2.15 (TaiShanV120) 1.53 (Cortex-A510) | Maleoon 910 MP4 | 750 MHz | LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) | 不適用 | 不適用 | Q4 2023 | 华为Nova12 Ultra 华为MatePad11.5"S灵动版 |
| Kirin 9000S1/W/WL/WE (Kirin T90/KC10) | SMIC 7 nm FinFET (DUV) | ARMv8.2-A | HiSilicon Taishan microarchitecture Cortex-A510 |  |  | Maleoon 910 MP4 | 750 MHz | LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) |  |  | 2024 | 華為Pura 70 华为MatePad Pro13.2 2024/11 2024 华为MatePad Air12 2024 华为MatePad11.5"S柔光版 |
| Kirin 9010 | SMIC 7 nm FinFET (DUV) | ARMv8.2-A | HiSilicon Taishan microarchitecture Cortex-A510 | (2+6)+4 | 2.35 (TaiShanV120) 2.15 (TaiShanV120) 1.53 (Cortex-A510) | Maleoon 910 MP4 | 750 MHz | LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) | 不適用 | 不適用 | Q1 2024 | 华为Pura 70 pro/ultra 华为Mate XT 华为Mate70 |
| Kirin 9010E/W/A (Kirin T91) | SMIC 7 nm FinFET (DUV) | ARMv8.2-A | HiSilicon Taishan microarchitecture Cortex-A510 |  |  | Maleoon 910 MP4 | 750 MHz | LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) |  |  | 2024 | 華為Pura 70 北斗卫星信息版 华为MatePad Pro12.2 2024 |
| Kirin 9010L | SMIC 7 nm FinFET (DUV) | ARMv8.2-A | HiSilicon Taishan microarchitecture Cortex-A510 |  |  | Maleoon 910 MP4 | 750 MHz | LPDDR5-2750 | 64-bit(4x16-bit) Quad-channel | 34.1 (LPDDR4X) 44 (LPDDR5) | Galileo | Balong 5000 (Sub-6-GHz only; NSA & SA) |  |  | 2024 | 华为Nova12 Ultra 星耀版 |
| Kirin 9020 | SMIC 7 nm FinFET (DUV) | ARMv8-A |  | (2+6)+4 | 2.5 (TaiShanV121) 2.15 (TaiShanV120) 1.6 (Taishan-Little) | Maleoon 920 | 840 MHz | LPDDR5X |  |  |  |  |  |  | Q4 2024 |  列表 华为Mate 70 Pro 华为Mate 70 Pro+ 华为Mate 70 RS Ultimate Design 华为Mate X6  |
| Kirin 9020A | SMIC 7 nm FinFET (DUV) | ARMv8-A |  | (2+6)+4 | 2.4 (TaiShanV121) 2.00 (TaiShanV120) 1.60 (Taishan-Little) | Maleoon 920 | 840 MHz | LPDDR5X |  |  |  |  |  |  | 2025 | 华为Mate 70 Pro优享版 |