笠原博徳
主な著作等

H. Kasahara, S. Narita, "Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing", IEEE Trans. on Computers, Vol. C-33, No. 11, pp.1023-1029, Nov. 1984.
H. Kasahara, S. Narita, "Parallel Processing of Robot Arm Control Computation on a Multimicroprocessor System", IEEE Journal of Robotics and Automation, Vol. RA-1, No. 2, Jun. 1985.
H. Kasahara, T. Fujii, H. Nakayama, S. Narita, L. Chua, "A Parallel Processing Scheme for the Solution of Sparse Linear Equations Using Static Optimal Multiprocessor Scheduling Algorithms", Proc. 2nd Int. Conf. on Supercomputing, May. 1987.
H. Kasahara, H. Fujii, M. Iwata, "Parallel Processing of Robot Motion Simulation", Proc. IFAC 10th World Congress, pp.329-336, Jul. 1987.
H. Kasahara, H. Honda, S. Narita, "Parallel Processing of Near Fine Grain Tasks Using Static Scheduling on OSCAR (Optimally Scheduled Advanced Multiprocessor)", Proceedings of IEEE Supercomputing '90, pp.856-864, Nov. 1990.
笠原博徳,　並列処理技術,　コロナ社, 1991.
“アドバンスト並列化コンパイラ技術の研究開発～並列コンピュータを10倍速くするソフトウェアを開発～”, Focus NEDO, Vol.3 NO.9, pp12-13, 2003.5. https://dl.ndl.go.jp/view/prepareDownload?itemId=info%3Andljp%2Fpid%2F8731710&contentNo=1
NEDO「半導体アプリケーションチッププロジェクト（情報家電用半導体アプリケーションチップ技術開発）」評価委員会: 資料6-1 テーマ別評価資料:  (1) リアルタイム情報家電用マルチコア技術の研究開発, 2008, https://www.nedo.go.jp/content/100086679.pdf
“NEDO半導体アプリケーションチッププロジェクト（情報家電分野）：情報家電用ヘテロジニアス・マルチコア技術の研究開発“, 2012, https://www.nedo.go.jp/activities/ZZ_00363.html
Masayuki Ito, Toshihiro Hattori, Yutaka Yoshida, Kiyoshi Hayase, Tomoichi Hayashi, Osamu Nishii, Yoshihiko Yasu, Atsushi Hasegawa, Masashi Takada, Masaki Ito, Hiroyuki Mizuno, Kunio Uchiyama, Toshihiko Odaka, Jun Shirako, Masayoshi Mase, Keiji Kimura, Hironori Kasahara, "An 8640 MIPS SoC with Independent Power-off Control of 8 CPU and 8 RAMS by an Automatic Parallelizing Compiler", Proc. of IEEE International Solid State Circuits Conference (ISSCC2008), Feb. 2008.
Y. Yuyama, M. Ito, Y. Kiyoshige, Y. Nitta, S. Matsui, O. Nishii, A.Hasegawa, M. Ishikawa, T. Yamada, J. Miyakoshi, K. Terada, T. Nojiri, M. Satoh, H. Mizuno, K. Uchiyama, Y. Wada, K. Kimura, H. Kasahara, H.Maejima, "A 45nm 37.3GOPS/W Heterogeneous Multi-Core SoC", IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC 2010), San Francisco, Feb. 8. 2010.
Hironori Kasahara, "Automatic Multigrain Parallelization, Memory Optimization and Power Reduction Compiler for Multicore Systems", Keynote Speech at ICS-2018: The 32nd ACM International Conference on Supercomputing, Jun. 13. 2018.
IEEE Computer Society - Multicore Video Series,  https://ieeetv.ieee.org/ondemand/IEEE-CS-Multicore/372
Hironori Kasahara, "Satisfaction and Sustainability", Computer IEEE Computer Society, pp4-6, Jan. 2018.　https://ieeexplore.ieee.org/document/8267985
Hironori Kasahara, "2018 CS PRESIDENT’S MESSAGE --Collaboration for the Future--", Computer, January 2019, IEEE Computer Society, pp72-76, Mar. 2019.　https://ieeexplore.ieee.org/document/8666648
Jean-Luc Gaudiot, Hironori Kasahara, "Computer Education in the Age of COVID-19", Computer, January 2020, IEEE Computer Society, Vol. 53, No. 10, pp.114-118, Oct. 2020. (Open Access:  https://ieeexplore.ieee.org/document/9206411 )
笠原博徳, “早稲田大学におけるオンライン/ハイブリッド教育”, 国立情報学研究所【第16回】4月からの大学等遠隔授業に関する取組状況共有サイバーシンポジウム 遠隔・対面ハイブリッド講義に向けての取り組み, 2020年9月11日. https://www.youtube.com/watch?v=tZW3uxBhLlM
笠原博徳，“早稲田大学オープンイノベーションエコシステムの展開”,　 https://www.youtube.com/watch?v=f2pCW09fEiI