Q:

Can I do a mysql Select, Update and Delete in one query?

Can I say that one of many ways to optimize mysql is to reduce the number of queries?
If that so, can I do this:
- Select "data" => $A from table X
- Update $A from table Y
- Delete $A from table X

in one query?

A:

You can't reduce the number of queries - they all do different things - but you could reduce the number of round trips to the database and the number of parses by wrapping it all as a PLSQL function.
However you can't select the data after you've deleted it.....but consider:
CREATE PROCEDURE s_u_d(a)
BEGIN

UPDATE tab_x SET tab_x.avalue=1 WHERE tab_x.another=a;

DELETE FROM tab_y WHERE tab_y.avalue=a;

SELECT *
FROM tab_x
WHERE tab_x.another=a;

END;

NB - you can also run multiple selects in the same procedureQ:

authenticate telnet connection

I tried connecting to tor in TBB 3.5.1, OS X 10.8.5 using telnet localhost 9151 but since CookieAuthentication is set it requires authentication.
From the manual

CookieAuthentication 0|1 If this option is set to 1, allow connections
  on the control port when the connecting process knows the contents of
  a file named "control_auth_cookie", which Tor will create in its data
  directory. This authentication method should only be used on systems
  with good filesystem security. (Default: 0)

I checked RFCs and other sources for TELNET/telnet but I couldn't find any information on this matter.
How can I authenticate using the cookie?

A:

Locate the file control_auth_cookie
Enter hexdump -e '32/1 "%02x""\n"' $COOKIEFILE where $COOKIEFILE is the location of the file from step 1.
Copy the output
Open a shell and enter telnet


that everyone believes in equality for men and women – in her recently published book (5), Joanne Lipman points out that in a global survey carried out last year, 1 in 5 men said they believe that women are inferior to men, and in the data from Russia and India, half of both the women and the men surveyed shared that belief – and this is in 2017!

So there is no doubting the need for change, and the past year has seen public debate at unprecedented levels about the role and treatment of women across a range of areas; gender pay, the arts, politics and business.

In response to that, I have 3 closing pleas;

Let women be women – we will only get the advantages of diverse thinking if-oriented campaign as a conservative Democrat and small businessman rather than as the Grand Dragon of the Ku Klux Klan.” He did not use anti-Semitic materials to promote his efforts, it continues, but rather hammered away on his apposition to immigration, especially from Latin American countries. The report, compiled by Alisa Kesten of the AJ Committee’s Trends Analysis Department, points out that the campaign took place during the time when a wave of Cuban refugees was arriving in the United States, and while rioting of newly-arrived Cubans took place at Fort Chafee in Arkansas.

The report also points out that Metzger’s program included attacks on big business, opposition to affirmative action, stopping entry of foreigners into the U.S. for at least five years, and cutting off welfare for the


Dr. Jadliwala receives funding from the National Science Foundation for a three year project focusing on wearable device security and privacy!

Dr. Jadliwala receives funding from the National Science Foundation for his three year project on wearable device security and privacy. He is working with Dr. Jibo He on this project, who is also the Co-PI on this project. The award abstract for this project can be found here.Q:

Salesforce certificate issue : sun.security.validator.ValidatorException: PKIX path building failed

When connecting to Salesforce through WSO2, I an receiving the following error.
Unable to sendViaPost to url[https://semtech.my.salesforce.com/services/Soap/c/26.0/xxxxxJelG/0xxxxk] {org.apache.axis2.transport.http.HTTPSender}
org.apache.axis2.AxisFault: Connection has been shutdown: javax.net.ssl.SSLHandshakeException: sun.security.validator.ValidatorException: PKIX path building failed: sun.security.provider.certpath.SunCertPathBuilderException: unable to find valid certification path to requested target
    at com.sun.net.ssl.internal.ssl.SSLSocketImpl.checkEOF(SSLSocketImpl.java:1293)
    at com.sun.net.ssl.internal.ssl.SSLSocketImpl.checkWrite(SSLSocketImpl.java:1305)
    at com.sun.net.ssl.internal.ssl.AppOutputStream.write(AppOutputStream.java:43)
    at java.io.BufferedOutputStream.flushBuffer(BufferedOutputStream.java:65)
    at java.io.BufferedOutputStream.flush(BufferedOutputStream.java:123)
    at org.apache.commons.httpclient.ChunkedOutputStream.flush(ChunkedOutputStream.java:191)
    at com.ctc.wstx.io.UTF8Writer.flush(UTF8Writer.java:99)
    at com.ctc.wstx.sw.BufferingXmlWriter.flush(BufferingXmlWriter.java:214)
    at com.ctc.wstx.sw.BufferingXmlWriter.close(BufferingXmlWriter.java:194)
    at com.ctc.wstx.sw.BaseStreamWriter.finishDocument(BaseStreamWriter.java:1690)
    ... 43 more

Seems like there is a certificate change on Salesforce side. This is affecting our production site. How can I resolve this?

A:

First find out the salesforce api version you


Preventing dementia by promoting physical activity and the long-term impact on health and social care expenditures.
Preventing dementia has been proposed to increase population health as well as reduce the demand for health and social care. Our aim was to evaluate whether preventing dementia by promoting physical activity (PA) a) improves population health or b) reduces expenditure for both health and social care if one takes into account the additional demand in health and social care caused by increased life expectancy. A simulation model was developed that models the relation between PA, dementia, mortality, and the use of health care and social care in England. With this model, scenarios were evaluated in which different assumptions were made about the increase in PA level in (part of) the population. Lifetimethat defines a plurality of integral lanes with a separator disposed between the lanes, and tearing the web material along the separator to disconnect at least one lane from at least one other lane. The selected lane is unwound from the roll while continuing to tear the web material along the separator and maintaining the other lane on the roll.
With this method, the parent roll can contain a relatively wide web of material that consists of a plurality of lanes of web material. The parent roll can provide a high degree of roll stability to minimize damage to the material during handling and storage operations. The individual lanes of web material can be unwound sequentially from the parent roll. In this way, only the number of lanes that


issued Jan. 12, 1999 to Stokes et al.
Hook type fasteners typically comprise a fabric or material having a base or backing structure and a plurality of hook members extending upwardly from at least one surface of the backing structure. In contrast to the loop type fasteners which desirably comprise a very flexible fabric, the hook material advantageously comprises a more resilient material to minimize unintentional disengagement of the fastener components as a result of the hook material becoming deformed and catching on clothing or other items. The term xe2x80x9cresilientxe2x80x9d as used herein refers to an interlocking material having a predetermined shape and the property of the interlocking material to resume the predetermined shape after being engaged and disengaged from a mating, complementary interlocking material. Suitable hook material canthem will become more apparent, and the invention itself will be better understood by reference to the drawings and the following description of the drawings.
Within the context of this specification, each term or phrase below will include the following meaning or meanings.
xe2x80x9cBondedxe2x80x9d refers to the joining, adhering, connecting, attaching, or the like, of two elements. Two elements will be considered to be bonded together when they are bonded directly to one another or indirectly to one another, such as when each is directly bonded to intermediate elements.
xe2x80x9cComprisingxe2x80x9d is inclusive or open-ended and does not exclude additional, unrecited elements or method steps.
xe2x80x9cConnectedxe2x80x9d refers to the joining, adhering, bonding, attaching, or the like, of two elements. Two elements will be considered to be connected together when they are connected directly


to one another or indirectly to one another, such as when each is directly connected to intermediate elements.
xe2x80x9cDisposablexe2x80x9d refers to articles which are designed to be discarded after a limited use rather than being laundered or otherwise restored for reuse.
xe2x80x9cDisposed,xe2x80x9d xe2x80x9cdisposed on,xe2x80x9d and variations thereof are intended to mean that one element can be integral with another element, or that one element can be a separate structure bonded to or placed with or placed near another element.
xe2x80x9cElasticxe2x80x9d xe2x80x9celasticizedxe2x80x9d and xe2x80x9celasticityxe2x80x9d mean that property of a material or composite by virtue of which it tends to recover its original size and shape after removal of a force causing a deformation.
xe2x80x9cFabricsxe2x80x9d is used to refer to all of the woven, knitted and nonwoven fibrous webs.
xe2x80x9cFlexiblexe2x80x9d refers to materials which arecompliant and which will readily conform to the general shape and contours of the wearer""s body.
xe2x80x9cForcexe2x80x9d includes a physical influence exerted by one body on another which produces acceleration of bodies that are free to move and deformation of bodies that are not free to move. Force is expressed in grams per unit area.
xe2x80x9cIntegralxe2x80x9d is used to refer to various portions of a single unitary element rather than separate structures bonded to or placed with or placed near one another.
xe2x80x9cLayerxe2x80x9d when used in the singular can have the dual meaning of a single element or a plurality of elements.
xe2x80x9cMemberxe2x80x9d when used in the singular can have the dual meaning of a single element or a plurality of elements.
xe2x80x9cNonwovenxe2x80x9d and xe2x80x9cnonwoven webxe2x80x9d refer to materials and webs of material


which are formed without the aid of a textile weaving or knitting process.
xe2x80x9cSurfacexe2x80x9d includes any layer, film, woven, nonwoven, laminate, composite, or the like, whether pervious or impervious to air, gas, and/or liquids.
These terms may be defined with additional language in the remaining portions of the specification.of retesting of two controversial pieces of forensic evidence presented at her trial.”

The CNN article talks about the media portrayal of Knox, saying “the sordid saga has played out in worldwide media long enough to have broken into dual narratives.” The article then makes a passing reference to journalists who “paint her as a licentious, manipulative young American still trying to get away with murder, despite an alleged confession, which she quickly recanted, and a conviction.”

This single sentence is “balanced” with fifty-eight sentences describing an innocent, endearing, beautiful, and quirky young woman who is “the kind of person who would pick up a spider and take it outside rather than kill it.”

So who is the real Amanda Knox?

According to Italian police, Knox was so spoiled and over-pampered by


Control of multidrug resistance gene mdr1 and cancer resistance to chemotherapy by the longevity gene sirt1.
Irreversible growth arrest (also called senescence) has emerged recently as a tumor suppressor mechanism and a key determinant of cancer chemotherapy outcome. Previous work from our laboratory suggested that the cellular ability to undergo or to escape senescence dictates its fate to become drug-sensitive or drug-resistant, respectively. In the present study, we made the hypothesis that longevity genes, by virtue of their ability to inhibit senescence, may contribute to the onset of drug resistance. We report that expression of the longevity gene sirt1 increased both at the RNA and protein levels in all the five drug-resistant cell lines tested when compared with their drug-sensitive counterparts. In addition, biopsies from cancer patients treated with '_system',
          `location=no,closebuttoncaption=Close,enableViewportScale=yes`
        )
      }

The button that trigger this code open a new window, but she’s remains empty. I tried with a wrong path, it shows an error so it’s not a path problem.
Any Idea ?

A:

Finaly I managed to display PDF on Android > 6. It’s not possible to display PDF through inappbrowser for Android > 6 (2 fulltime days of testing and googling...).
I used cordova-plugin-file-opener2. But what’s important to know (I didn’t until yesterday), you can’t test plugins via "phonegap serve" + phonegap app on device !! You need to build the apk, install it and then test it. This important point make me loose my


Nitrite reductase activity of sulphate-reducing bacteria prevents their inhibition by nitrate-reducing, sulphide-oxidizing bacteria.
Sulphate-reducing bacteria (SRB) can be inhibited by nitrate-reducing, sulphide-oxidizing bacteria (NR-SOB), despite the fact that these two groups are interdependent in many anaerobic environments. Practical applications of this inhibition include the reduction of sulphide concentrations in oil fields by nitrate injection. The NR-SOB Thiomicrospira sp. strain CVO was found to oxidize up to 15 mM sulphide, considerably more than three other NR-SOB strains that were tested. Sulphide oxidation increased the environmental redox potential (Eh) from -400 to +100 mV and gave 0.6 nitrite per nitrate reduced. Within the genus Desulfovibrio, strains Lac3 and Lac6 were inhibited by strain CVO and nitrate for the duration of the experiment, whereas inhibition of strains Lac15 and D. vulgaris Hildenborough+ 6. Let k = -0.2 + -0.04. Let o = k + f. Which is the nearest to 0?  (a) 0.2  (b) o  (c) 1/4
a
Let k = 43/6 + -7. Let d = -6 + 5. Let h = d + 6. Which is the closest to 1?  (a) h  (b) 4  (c) k
c
Let p = -3 + 4. Let g = -90 + 95. What is the nearest to 1/10 in p, g, -0.1?
-0.1
Let p = 382 + -383. Let f = 21 - 21.2. Which is the nearest to p?  (a) -1  (b) f  (c) -3/5
a
Let n = 1306 + -6532/5. Which is the closest to 0.1?  (a) n  (b) -3/2  (c) 3/79
c
Let


(b) z  (c) h
a
Let q = 1.1 - 0.1. Let t be (8/(-6))/2*(33 - 183). Let j = 109 - t. Which is the nearest to j?  (a) q  (b) -2  (c) -0.2
a
Let i = 4.94 - -0.06. Let j = -2 + i. Let z(x) = x**2 - 21*x - 47. Let s be z(-2). Which is the nearest to s?  (a) -0.4  (b) j  (c) 1/4
a
Suppose -4*a = 2*t + 6, -5*t - 3*a = a + 3. What is the closest to 0.5 in t, 5, 3?
t
Let p be (3/(-9)*-1)/(18/54). Suppose 4*l - 3 + 2 = -5*y, -y = l - 1. What is the nearest to p in -3/2, -22, y?
-3/2
Let l = -12.93 - -13.Create glowing phantom car using Photoshop CC

Create glowing phantom car using Photoshop CC. In this tutorial of Photoshop we consider the process of creating a flaming phantom car. The lesson is designed to have advanced Photoshop users. Da clipping path provides best Photoshop services at affordable prices. for more information please feel free to contact with us.

The materials used in the lesson:

The image of the bridge;

Image vehicle;

Fiery brush;

Abstract brushes;

Open the image of the bridge – the File> the Open (File> Open / Shortcut keys “Ctrl + O”). Leave the image size as it is:

HOME |ABOUT US | CONTACT US | REQUEST A QUOTE | FREE TRIAL

Next, cut the car. To do this, highlight the car using the Magic Wand Tool will Tool – Magic Wand (tool “Magic Wand”


         } else {
                    this.render('splash');
                }
            },
        });

Attempt 3:
    function completedProfile() {
        if (Meteor.user() && Meteor.user().profile.primary_email && Meteor.user().profile.display_name && Meteor.user().profile.university_id) {
            return true;
        } else {
            return false;
 landing route, but render() a splash page until the user is logged in.
if (this.ready() && completedProfile()) {
    this.render('bulletin')
} else {
    this.render('splash');
}

I don't think this.subscribe('users').wait(); helps. I'd remove it. I think you also want to use action instead of onBeforeAction since you are calling render() yourself.
See also: https://github.com/EventedMind/iron-router/issues/91. Sounds like instant login would work well for your use case.


Madison, WI 53706, USA
author:
- 'M.S. Berger$^a$ and Chung Kao$^b$'
title: |
     Production of $Z$ Boson Pairs via Gluon Fusion\
    in the Minimal Supersymmetric Model
---

ł \#1\#2 [\^[\#1]{}]{} \#1\#2 [\_[\#1]{}]{}

 Introduction
==============

One of the main purposes for constructing a hadron supercollider is to discover the mechanism responsible for the spontaneous breaking of the electroweak symmetry. A large amount of attention has been devoted recently to the ability of detecting a Higgs boson at the CERN Large Hadron Collider (LHC). Gluon fusion is the main mechanism of producing Higgs bosons at the LHC, and if a CP-even Higgs scalar is sufficiently heavy it can decay into $Z$ boson pairs. In the Standard Model, this is a useful detection channel for the Higgs boson with at=(p_1-p_3)^2\;, \quad u=(p_1-p_4)^2\;.\end{aligned}$$

In nonsupersymmetric extensions of the Higgs sector the adjustment to the calculations is clearly only in the diagrams containing the Higgs bosons for which the single s-channel contribution is replaced by multiple s-channel Higgs contributions with couplings that preserve the unitarity cancellations that occur in the Standard Model. Indeed in the MSSM the unitarity cancellation in the quark loop diagrams alone manifests itself as the contribution for the $h$ and $H$ Higgs bosons. The Standard Model contribution from quark loops to the production of longitudinal pairs (apart from an overall factor) $$\begin{aligned}
{\cal A}_{++00}^{\rm Higgs}&=&{{2m_q^2}\over {s-m_H^2+i\Gamma _Hm_H}}
{{s_2}\over {2\mz ^2}}\left (-2+s_4C_0(s)\right )\;, \end{aligned}$$ becomes $$\begin{aligned}
{\cal A}_{++00}^{\rm Higgs}&=&
{{s_2}\over {2\mz ^2}}\left (-2+s_4C_0(s)\right )\\ \nonumber
&&\times \left [{{2m_q^2}\over {s-m_h^2+i\Gamma _hm_h}}
{{\cos \alpha \sin (\beta -\alpha)}\over {\sin \beta}}
+{{2m_q^2}\over {s-m_H^2+i\Gamma _Hm_H}}
{{\sin \alpha \cos (\beta -\alpha)}\over


A}_{+--0}(-\beta)=-{\cal A}_{+-0-}(\beta)\;.\end{aligned}$$

The helicity amplitudes for top squark loop diagrams containing the Higgs bosons for the process $gg\rightarrow ZZ$ are:

$$\begin{aligned}
{\cal A}_{++00}^{\rm Higgs}&=&{{\alpha_s\alpha}\over
{\sin ^2\theta _w\cos ^2\theta _w}}\Bigg [\left ({{2m_t^2}\over {\mw}}
{{\sin \alpha}\over {\sin \beta}}+{{\mz}\over {2\cos \theta _w}}
\cos(\beta +\alpha )\right ){{\mz }\over {\cos \theta _w}}\nonumber \\
&&\quad \quad \times {s_2\over {2\mz ^2}}(1+2\ms ^2C_0(s))
{{\cos (\beta -\alpha )}\over {s-m_H^2+i\Gamma_Hm_H}}\nonumber \\
&&+\left ({{2m_t^2}\over {\mw}}
{{\cos \alpha}\over {\sin \beta}}-{{\mz}\over {2\cos \theta _w}}
\sin(\beta +\alpha )\right ){{\mz }\over {\cos \theta _w}}\nonumber \\
&&\quad \quad \times {s_2\over {2\mz ^2}}(1+2\ms ^2C_0(s))
{{\sin (\beta -\alpha )}\over {s-m_h^2+i\Gamma_hm_h}}\Bigg ]\;, \\
{\cal A}_{++++}^{\rm Higgs}&=&{{\alpha_s\alpha}\over
{\sin ^2\theta _w\cos ^2\theta _w}}\Bigg [\left ({{2m_t^2}\over {\mw}}
{{\sin \alpha}\over {\sin \beta}}+{{\mz}\over {2\cos \theta _w}}
\cos(\beta +\alpha )\right ){{\mz }\over {\cos \theta _w}}\nonumber \\
&&\quad \quad \times (1+2\ms ^2C_0(s))
{{\cos (\beta -\alpha )}\over {s-m_H^2+i\Gamma_Hm_H}}\nonumber \\
&&+\left ({{2m_t^2}\over {\mw}}
{{\cos \alpha}\over {\sin \beta}}-{{\mz}\over {2\cos \theta _w}}
\sin(\beta +\alpha )\right ){{\mz }\over {\cosQ:

Mysterious spacing on list items

Here is my code: http://jsfiddle.net/spadez/FbADY/11/
Despite me using this code:
 * {
    margin:0;
    padding:0;
}

There still seems to be a space between the items. In google chrome developer bar it says they dont have margin or padding to cause it.

A:

Demo Fiddle
It is because the li items display inline, and thus in your code as each item occurs on a new line, this outputs as a space. You can escape this by changing your CSS:
ul {
    font-size:0;
}

This makes the size of the 'erroneous' space between items a zero, e.g. not visible and therefore taking up no space. Inline elements are interpreted as effectively the same as textual content, so where in your code you separate them with newlines


  </a:Response>
  </GetAssetWarrantyResult>
</GetAssetWarrantyResponse>'

EXEC sp_xml_preparedocument @hDoc OUTPUT, @XML

SELECT CountryLookupCode
FROM OPENXML(@hDoc, 'GetAssetWarrantyResponse/GetAssetWarrantyResult/a:Response/a:DellAsset')
WITH
(
CountryLookupCode   [nvarchar](20)  'a:CountryLookupCode'
)

EXEC sp_xml_removedocument @hDoc
GO

A:

You need to specify the namespace prefixes when invoking sp_xml_preparedocument. In this case you have the a namespace and the default namespace (the one without prefix: xmlns="....") :
EXEC sp_xml_preparedocument
        @hDoc OUTPUT
        , @XML
        , '<root xmlns:d="http://tempuri.org/" xmlns:a="http://schemas.datacontract.org/2004/07/Dell.AWR.Domain.Asset"/>'

And use the registered prefixes properly :
SELECT CountryLookupCode
FROM OPENXML(@hDoc, 'd:GetAssetWarrantyResponse/d:GetAssetWarrantyResult/a:Response/a:DellAsset')
WITH
(
    CountryLookupCode   [nvarchar](20)  'a:CountryLookupCode'
)

terrible events to occur? If we could turn back the clock, would we learn that the framers would be shocked to hear of the license given Colt, Winchester, Remington, Glock, et al to shape national policy? In the next few hours we will learn more of the type of automatic weapon, the relative instability of the shooter, and the loose and simple means for him to acquire it. I know that I am a minority voice on this blog, but am I the only anti-gun person who visits l'Althouse? I hope not.

In 1966 I was in college when Richard Speck murdered 8 nursing students in Chicago and the next month Charles Whitman killed those 16 people at the University of Texas. Up until then these things really were


doors while other students tended the wounded. What more would you have done?

It would be really great if everybody -- the gun-control proponents, the gun-control opponents, and most of all, the blamers -- would drop the idea of using this tragedy as a chance to puff themselves up. Believe it or not, this is not about you.

First of all, 2600 acres is not "a small area". That's over four square miles.

Secondly, you keep harping on the word "assumed". I haven't seen any police officials quoted using that word. The quotes from campus police officials use terms like "determined" and "had some reason to believe" in relation to the theory that the shooter had left campus and that the original shooting was a domestic dispute.

Thirdly, *you* are apparently assumingmight as well blame the people who made the school a "gun-free zone", or the students who fled instead of trying to fight back, or any of a host of other people. Me, I'd recommend just blaming the gunman for now.

I would agree about backing off the blame game if it weren't for the flabbergasting idiocy of the police in this instance.

I'm ambivalent about guns and gun control, but knowing the police are so feckless pushes millions into the "It's up to me to defend myself" mindset.

P.S. I love it that Raymondv has already done a complete crime scene investigation and thus can confidently educate all of us as to the circumstances of each death, including factors like the meekness or cowardice of the victims.

Geez, guy, even the


require every high schooler to carry a semi-automatic weapon to school.

Looks like the shooter was from China. I give it all of about five minutes until they start blaming immigrants as well.

johnstodder said......All deaths like this are tragic, but there is something that really gets to me losing your child after you've sent him or her off to college. They made it through all the perils of childhood, and succeeded well enough to go to this fine school, only to have their lives snuffed out in seconds by a mental case/guy with a petty grudge. The pain.

The child you've sent off to college has a greater chance of dying due to a car accident, binge drinking, or suicide. Even high blood pressure is a greater cause of mortalityhas fled the campus, because two eyewitness saw him get into a car and speed away".

So no, your claim that the police are idiots is no more justified by the currently available evidence than Raymond's claim that the victims were cowards.

It seems to me that by acting, or in this case unacting based on this belief was, at a minimum, careless, given the proximity of so many potential victims.

It would only be careless if they had reason to believe that those people were in danger. If you have evidence that they should have believed such a thing, please share it with us.

If a couple had been murdered in the parking lot of an office building, you don't think the police might do something to protect the occupants of


the office building itself?

That's an irrelevant question, since the second (much worse) round of shootings happened on the far side of a 2600 acre campus, not in an adjacent building. So what you should be asking is this:

"If a couple had been murdered in the parking lot of an office building, you don't think the police might do something to protect everyone within a two-mile radius?"

The obvious answer: OF COURSE NOT, especially if the evidence they have indicates the person has left the area. Christ, I work downtown. Dozens of people have probably been murdered within two miles of my office since I started working here. I've never seen a cop stationed outside our building, nor do I ever expect to -- unless the police have reason toI just talked with my 14 year old son about what happened. It was made slightly worse by the fact that we are planning to visit Stanford and USC this summer to give him some idea of what a university is really like. He is having a hard time dealing the the VT situation as we've been talking about college quite a bit recently and he relates to these unfortunate people who were hurt and killed.

On a sickeningly related note, I had a free minute and was looking at CNN, FoxNews, and MSNBC for updates on the VT situation. I came across Keith Olberman and thought I would see what he knew about the matter. He was talking over stock footage of M16s about.. gun control and how


quit pestering Ann. It's tedious. Ann will post/comment when she has something to say, as you well know.

I'm not willing to tag the victims as cowards as Raymond has done, but I will mourn that they were all so wholly unprepared to do something, anything, to try and stop what happened today. That much at least seems obvious.

Tell me Joan: What would YOU have done? Shooter standing in the doorway with one or two automatic pistols. Doors are usually in corners of rooms. Going to rush him, Joan? Bang, your dead. You and three others going to rush him, Joan? Bang.Bang.Bang.Bang. Quicker than it took for me to write that all four of you are lying on the floor dead or wounded, Joan.

Those that could barricaded the doorsrational calculations, risk v. reward, "we're dead either way" type of analysis, not in 20 seconds, but in 20 minutes.

I think that's a pretty accurate depiction of how normal people would respond to a situation like this. It's too bad this asshole in Virginia didn't run into a bunch of Navy Seals or cold-blooded assassins. Instead, he attacked normal people who weren't given any time to do anything but try to survive one more second. I'm sure most of them acted as bravely as they could in the few seconds they had.

I agree the potential targets are screwed no matter what they do, Revenant. And your last paragraph was worth repeating:That's why it is incredibly offensive to call these people "cowards". They didn't wake up that morning expecting


said. “There (were) times where we’ll be out here, just talking football, just trying to get me better and that’s what I try to do with the young guys … He’s one of the greatest DBs we’ve ever had here, and obviously I want the young guys and myself to be one of the greatest when we leave.”

Grant, who started all 14 games last season, said Reeves is prepared to take that next step and be a go-to starter for the Buckeyes.

“I feel like he’s ready. He’s been playing well this spring,” Grant said Thursday. “He’s been working hard in the offseason, training, taking coaching. He’s leading also, his voice is up, passing the energy … And he has the experience also.”

Even though Reeves is likely to beH reflex analysis of segmental reflex excitability in flexor and extensor muscles.
In normal adults, H reflexes are commonly found only in the antigravity calf and flexor carpi radialis (FCR) muscles. However, these responses may be more widespread if agonist muscles contract. This study demonstrates that H reflexes may be found in the peroneal (P) and anterior tibialis (TA) muscles in the leg and the extensor digitorum communis (EDC) muscle in the arm on contraction of the antagonistic calf and flexor carpi radialis muscles, respectively. H reflexes were also elicited regularly in the EDC by passive extension of the wrist. The data indicate physiologic unity of comparably acting human antigravity muscles and their antagonists in both the upper and lower extremities, and imply an important functional role of group


ClassLoader found for grab
java.lang.RuntimeException: No suitable ClassLoader found for grab
at sun.reflect.GeneratedConstructorAccessor15.newInstance(Unknown Source)
at sun.reflect.DelegatingConstructorAccessorImpl.newInstance(DelegatingConstructorAccessorImpl.java:27)
at java.lang.reflect.Constructor.newInstance(Constructor.java:513)
at org.codehaus.groovy.reflection.CachedConstructor.invoke(CachedConstructor.java:77)
at org.codehaus.groovy.runtime.callsite.ConstructorSite$ConstructorSiteNoUnwrapNoCoerce.callConstructor(ConstructorSite.java:102)
at org.codehaus.groovy.runtime.callsite.AbstractCallSite.callConstructor(AbstractCallSite.java:198)
at groovy.grape.GrapeIvy.chooseClassLoader(GrapeIvy.groovy:173)
at groovy.grape.GrapeIvy$chooseClassLoader.callCurrent(Unknown Source)
at groovy.grape.GrapeIvy.grab(GrapeIvy.groovy:237)
at groovy.grape.Grape.grab(Grape.java:143)
at groovy.grape.GrabAnnotationTransformation.visit(GrabAnnotationTransformation.java:289)
at org.codehaus.groovy.transform.ASTTransformationVisitor$3.call(ASTTransformationVisitor.java:397)
at org.codehaus.groovy.control.CompilationUnit.applyToSourceUnits(CompilationUnit.java:956)
at org.codehaus.groovy.control.CompilationUnit.doPhaseOperation(CompilationUnit.java:587)
at org.codehaus.groovy.control.CompilationUnit.processPhaseOperations(CompilationUnit.java:563)
at org.codehaus.groovy.control.CompilationUnit.compile(CompilationUnit.java:540)
at org.codehaus.jdt.groovy.internal.compiler.ast.GroovyCompilationUnitDeclaration.processToPhase(GroovyCompilationUnitDeclaration.java:168)
at org.codehaus.jdt.groovy.internal.compiler.ast.GroovyParser.dietParse(GroovyParser.java:429)
at org.codehaus.jdt.groovy.integration.internal.MultiplexingParser.dietParse(MultiplexingParser.java:44)
at org.eclipse.jdt.internal.compiler.Compiler.internalBeginToCompile(Compiler.java:769)
at org.eclipse.jdt.internal.compiler.Compiler.beginToCompile(Compiler.java:389)
at org.eclipse.jdt.internal.compiler.Compiler.compile(Compiler.java:475)
at org.eclipse.jdt.internal.core.builder.AbstractImageBuilder.compile(AbstractImageBuilder.java:408)
at org.eclipse.jdt.internal.core.builder.BatchImageBuilder.compile(BatchImageBuilder.java:182)
at org.eclipse.jdt.internal.core.builder.AbstractImageBuilder.compile(AbstractImageBuilder.java:345)
at org.eclipse.jdt.internal.core.builder.BatchImageBuilder.build(BatchImageBuilder.java:61)
at org.eclipse.jdt.internal.core.builder.JavaBuilder.buildAll(JavaBuilder.java:257)
at org.eclipse.jdt.internal.core.builder.JavaBuilder.build(JavaBuilder.java:176)
at org.eclipse.core.internal.events.BuildManager$2.run(BuildManager.java:728)
at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:42)
at org.eclipse.core.internal.events.BuildManager.basicBuild(BuildManager.java:199)
at org.eclipse.core.internal.events.BuildManager.basicBuild(BuildManager.java:239)
at org.eclipse.core.internal.events.BuildManager$1.run(BuildManager.java:292)
at org.eclipse.core.runtime.SafeRunner.run(SafeRunner.java:42)
at org.eclipse.core.internal.events.BuildManager.basicBuild(BuildManager.java:295)
at org.eclipse.core.internal.events.BuildManager.basicBuildLoop(BuildManager.java:351)
at org.eclipse.core.internal.events.BuildManager.build(BuildManager.java:374)
at org.eclipse.core.internal.events.AutoBuildJob.doBuild(AutoBuildJob.java:143)
at org.eclipse.core.internal.events.AutoBuildJob.run(AutoBuildJob.java:241)
at org.eclipse.core.internal.jobs.Worker.run(Worker.java:54)

By default STS Grails plugin includes grails-app/conf into project sources and my current workaround is to exclude it - after that Eclipse gets usable again.Q:

Is script type text/javascript required for IE8?

I'm debugging Javascript issue on IE8, and I want to make sure that the problem is not because of this. I can't quite tell if the problem is because of this or because of something else. I search on the whole internet, but I feel it's very hard to get a very straightforward answer on this. Even w3school (people said that it's unreliable) that usually has "which browser support what feature starting from what version" is removing that information for this script tag. I understand there's many similar question on stack overflow that asking if it is okay to omit type attribute on script in general, and the usual answer is yes. But the client decided that the website must support IE8


too, and that's why I just need a straightforward answer:
Can I omit type attribute on script tag, on IE8?
If I omit it, will it has a problem, like raising Javascript error box, code not run properly, or anything, on IE8?
Thanks.

A:

The type attribute is optional if you use HTML5 and pass the proper doctype
<!doctype html>

Unfortunately, IE8 doesn't recognize this doctype so in theory it should require the type attribute specified. Fortunately, no one follows that particular standard, so running this code
<!doctype html>
<html>
    <head>
        <script>
            alert('It works!');
        </script>
    </head>
    <body></body>
</html>

results in working JS under IE8,study to explore the cursor dragging kinematics (not cursor movement) in healthy participants. The directional effect on the parameter of movement time and movement units was found and the leftward dragging movement showed an obvious advantage when comparing with other directions \[[@b10-sensors-12-01919]\]. Based on the results of cursor dragging kinematics, it is believed that further investigation in cursor movement would provide comprehensive information about computer access for clinical applications. In this study, we will report the characteristics of cursor movement kinematics in healthy subjects.

Some studies related to the effect of direction on cursor movement have been conducted ([Table 1](#t1-sensors-12-01919){ref-type="table"}). Most studies demonstrated that moving towards the left direction is more efficient than moving towards other directions. In 1998, Phillips *et al.* instructed the participants to use the Accupoint


*Eta^2^* = 0.448) and peak velocity (F(3, 69) = 10.058; *p* = 0.000; *Eta^2^* = 0.304) ([Table 2](#t2-sensors-12-01919){ref-type="table"}).

3.3.. The Post Hoc LSD Tests
----------------------------

The mean values of each variable in each direction are listed in [Table 3](#t3-sensors-12-01919){ref-type="table"}. *Post hoc* LSD tests ([Table 3](#t3-sensors-12-01919){ref-type="table"}) showed that average velocity upward moving is higher than downward and leftward moving is higher than any of the other three directions. Fewer movement units and less movement time were found in upward and leftward moving when compared with downward moving and any other three direction movement. Regarding the peak velocity, moving upward is slower than the other three directions, and moving downward is slower than leftward.

3.4.. The Figure of Velocity PSD
--------------------------------

[Figure 4](#f4-sensors-12-01919){ref-type="fig"} shows the result of velocity PSD among the four cursor moving directions. Theaforementioned studies were right handed and were required to move a mouse (not to drag the mouse). Therefore, we infer that the best cursor moving efficiency occurred in the left direction in right handed persons while moving a mouse.

The directional effects reflect a superiority of the left movement for cursor moving in right handed people \[[@b2-sensors-12-01919]\]. Morgan *et al.* mentioned that adductive movements (*i.e.*, leftwards) with a digital pen were of shorter duration and more accurate than abductive movements (*i.e.*, rightwards) \[[@b11-sensors-12-01919]\]. Philips, *et al.* studied cursor trajectories as controlled by an accupoint and supported the biomechanical statement made by Morgan *et al.* Moreover, they emphasized that lateral movements involve only single joints and therefore were faster than vertical movements which involve multiple arm-segments \[[@b1-sensors-12-01919]\]. However, the biomechanics


proves that the process does work. The question is: how often does it work? The execution can be repeated and results measured.

Test Run 1

I ran nohup script/harden > harden.log & on our kops bastion node before going to sleep. I checked in morning after it ran for about 9 hours. Here are the results:

28 consecutive successes

1 failure

29 consecutive failures

The 28 consecutive successes surprised me. Earlier in the week I could not get a single success of one market, let alone all 4 in succession. Then everything broke. Something happened on the 29th run that broke itself and each after it. Was it cluster itself? Was it a bad node? Did helm/tiller break in some way? So went wrong? Let’s turn to the log:

All test-efritin pods running. Done! ---pods: operation timeout: context deadline exceeded

Apr 30 06:18:37 ip-172-20-46-113 kubelet[22362]: E0430 06:18:37.298097 22362 kubelet.go:1522] Unable to mount volumes for pod "test-bikroy-kviberg-bikr-payment-service-db_development(e0c34301-2d53-11e7-a00a-02409e88de25)": timeout expired waiting for volumes to attach/mount for pod "development"/"test-bikroy-kviberg-bikr-payment-service-db". list of unattached/unmounted volumes=[default-token-1b86g]; skipping pod

Apr 30 06:18:37 ip-172-20-46-113 kubelet[22362]: E0430 06:18:37.298504 22362 pod_workers.go:184] Error syncing pod e0c34301-2d53-11e7-a00a-02409e88de25, skipping: timeout expired waiting for volumes to attach/mount for pod "development"/"test-bikroy-kviberg-bikr-payment-service-db". list of unattached/unmounted volumes=[default-token-1b86g]

Apr 30 06:18:37 ip-172-20-46-113 kubelet[22362]: E0430 06:18:37.299065 22362 kubelet.go:1522] Unable to mount volumes for pod "test-bikroy-kviberg-bikr-review-service-thrift-52563960-tw388_development(e0e7d017-2d53-11e7-a00a-02409e88de25)": timeout expired waiting for volumes to attach/mount for pod "development"/"test-bikroy-kviberg-bikr-review-service-thrift-52563960-tw388". list of unattached/unmounted volumes=[default-token-1b86g]; skipping pod

Apr 30 06:18:37 ip-172-20-46-113 kubelet[22362]: E0430 06:18:37.299085 22362 pod_workers.go:184] Error syncing pod e0e7d017-2d53-11e7-a00a-02409e88de25, skipping: timeout expired waiting for volumes to attach/mount for pod "development"/"test-bikroy-kviberg-bikr-review-service-thrift-52563960-tw388". list of unattached/unmounted volumes=[default-token-1b86g]

Apr 30 06:18:41 ip-172-20-46-113 kubelet[22362]: I0430 06:18:41.511963


is an effective agent for cervical ripening prior to labor induction in term pregnancies. The mechanism of action of INH on cervical dilatation is similar to that of NO donors. The results of some studies showed that INH affects cervical dilatation via production of NO \[[@b14-ogs-19170]\]. El-Khayat et al. \[[@b20-ogs-19170]\] showed that primary cervical dilatation and the duration of dilatation were higher with vaginal misoprostol than with Foley catheter plus vaginal isosorbide mononitrate, but there was no significant difference between the 2 groups in terms of the duration of surgery or difficult in dilatation. The lack of a statistically significant difference in their study might be due to different sample sizes or methods from those used in the present study. On the other hand, Waddell et al. \[[@b21-ogs-19170]\]Preutthipan et al. \[[@b24-ogs-19170]\], vaginal misoprostol was found to reduce dilatation time in premenopausal women. Another study by Sordia-Hernández et al. \[[@b25-ogs-19170]\] showed that the time of hysteroscopic surgery in the vaginal misoprostol group was significantly shorter than that in the placebo and sublingual misoprostol groups.

The strength of this study is that it compares the effect of vaginal misoprostol with that of other vaginal medications. In many studies, vaginal misoprostol groups have been compared with placebo groups or rectal, oral, or sublingual misoprostol administration. This method made it possible to compare the effect of 2 different drugs on vaginal dilatation.

A study conducted by Inal et al. \[[@b26-ogs-19170]\] showed that dinoprostone had a greater effect on cervical dilatation than misoprostol. In the present study, the OR obtained for hysteroscopic


entrance in the misoprostol and INH groups was 0.57 (0.43--0.75), which indicated that the likelihood of hysteroscope entry into the uterus in the misoprostol group was 43% lower than that of the INH group. This means that cervical dilatation in the women receiving misoprostol was less than in the INH recipients.

INH can be simply used as a ripening agent before hysteroscopy. It is easily available and does not seem to have any complications. However, its underlying mechanism of cervical ripening is unknown. Our study was limited by its small sample size. Further research is needed to determine the mechanisms of action and clinical efficacy of INH against that of other ripening agents to find the best dosage and timing of INH for ripening of cervix before hysteroscopy.

In conclusion,   1.00
   1 delivery            3 (15.8)      13 (28.9)            0.143       0.53 (0.23--1.23)
   2 delivery            7 (36.8)      9 (20.0)             0.582       0.78 (0.33--1.83)
   3 and more delivery   3 (15.8)      13 (28.9)            0.195       0.54 (0.22--1.27)


16?
True
Is 1121428675 a multiple of 24?
False
Is 181 a factor of 528058473?
False
Does 722 divide 336046236?
True
Does 148 divide 15063588?
True
Is 23 a factor of 152021904?
True
Is 506065347 a multiple of 22?
False
Is 406921320 a multiple of 39?
True
Is 512 a factor of 41453284?
False
Does 8334 divide 3212131950?
True
Is 25239240 a multiple of 312?
True
Is 1003 a factor of 19171342?
True
Is 125 a factor of 1240750?
True
Is 259696710 a multiple of 37?
True
Is 10054800 a multiple of 42?
True
Is 732 a factor of 519575064?
True
Is 141 a factor of 390572428?
False
Is 4 a factor of 140381233?
False
Does 61 divide 39259618?
False
Does 48 divide 445043486?
False
Is 71509779 a multiple of 443?
False
Is 102 a factor of 45662748?
True
Does 58 divide 272095980?
True
Is 36250100 a multiple of 10?
True
Is 1699 a factor of 14318672?
False
Is 141 a factor of 107033382?
True
Is 266861398 a multiple of 36?
False
Is 4 a factor of 678521?
False
Does 23 divide 87800741?
False
Does 10<?php
/*
 * This file is part of sebastian/comparator.
 *
 * (c) Sebastian Bergmann <sebastian@phpunit.de>
 *
 * For the full copyright and license information, please view the LICENSE
 * file that was distributed with this source code.
 */
namespace SebastianBergmann\Comparator;

/**
 * Compares values for type equality.
 */
class TypeComparator extends Comparator
{
    /**
     * Returns whether the comparator can compare two values.
     *
     * @param mixed $expected The first value to compare
     * @param mixed $actual   The second value to compare
     *
     * @return bool
     */
    public function accepts($expected, $actual)
    {


from
// the output of ShortestDistance. 'distance' is the shortest distance from the
// initial state when 'reverse == false' and to the final states when
// 'reverse == true'.
template <class Arc>
typename Arc::Weight ComputeTotalWeight(
    const Fst<Arc> &fst,
    const vector<typename Arc::Weight> &distance,
    bool reverse) {
  if (reverse)
    return fst.Start() < distance.size() ?
        distance[fst.Start()] : Arc::Weight::Zero();

  typename Arc::Weight sum = Arc::Weight::Zero();
  for (typename Arc::StateId s = 0; s < distance.size(); ++s)
    sum = Plus(sum, Times(distance[s], fst.Final(s)));
  return sum;
}

// Divide the weight of every accepting path by 'w'. The weight 'w' is
// divided at the final states if 'at_final == true' and at the
// initial state otherwise.
template <classQ:

Comparing data field to today's date - Oracle

I have a date field called Acceptance_Date.
Acceptance_Date = 10/10/2011 (MM/DD/YYYY)
I have to compare Acceptance_Date to Sysdate and return true or false.
How can I compare dates?

A:

Assuming Acceptance_Date is of type Date:
select decode(Acceptance_Date, trunc(sysdate), 1, 0)
from table

else, add to_date(Acceptance_Date,'mm/dd/yyyy') instead of just Acceptance_Date


to premiere the Costume Institute's annual exhibit. Here's a l...14:48, 05/03/2019

Celebrating 244 years of Tucson TUCSON – Tucson celebrated turning 244 on Tuesday, August 20.
The birthday celebration was held at The Presidio San Agustin Museum.
The Presidio...12:16, 08/21/2019

Anthony Davis through the years A look at the career of NBA superstar Anthony Davis, from Kentucky to the New Orleans Pelicans to the Los Angeles Lakers.
...18:48, 06/16/2019

The 50 Best Memoirs of the Past 50 Years Our critics Dwight Garner, Parul Sehgal and Jennifer Szalai explain their choices; and Daniel Okrent discusses “The Guarded Gate,” his history of Amer...23:16, 07/05/2019

We’re 24 years apart and crazy in love After city planner Lorena Matarrita started a new job a few years ago, her boss casually asked about a photograph she had on her desk.a blood or urine test and did not mention the option of a breathalyzer test. McHugh told Rossi he did not think he could produce a urine sample within a short period of time, and he did not want to submit to a blood draw because of his bad experiences with needles and blood draws in the past. He asked to have a breathalyzer test, but Rossi refused his request and told him he must provide either a urine or blood test and a blood draw would be forced if necessary.

II

THE SUPPRESSION MOTION
McHugh moved to suppress the results of the blood-alcohol test. He asserted Rossi exceeded his authority when he stopped McHugh's car, and therefore the stop and subsequent arrest were unreasonable and required suppression of the fruits


may carry firearms only if authorized and under terms and conditions specified by their employing agency. [¶] . . . [¶] (b) Persons employed as members of a police department of a school district pursuant to Section 38000 of the Education Code. . . ."
Under that provision, Rossi's power to effect an arrest extended to any place in the state, provided he had probable cause to believe McHugh had committed an offense in Rossi's presence (Pen.Code, § 836, subd. (a)(1)) that presented an immediate danger to person or property. Substantial evidence supports the trial court's findings that McHugh was driving in a reckless and dangerous manner when Rossi first observed him, and thereafter exacerbated the dangers presented by his reckless conduct in refusing to yield to Rossi andlab assistant class that included a phlebotomist class and a 120-hour internship, and a four-month phlebotomist class that included both classroom instruction and a 90-hour internship. During her training she received instruction from doctors or clinical laboratory bioanalysts about phlebotomy and performed more than 10 venipunctures under their supervision.
[6]  Under Proposition 8, we are not free to exclude evidence merely because it was obtained in violation of a state statutory limitation on a peace officer's powers of arrest if the stop and arrest was otherwise reasonable under federal law. (People v. McKay (2002) 27 Cal.4th 601, 608-615, 117 Cal.Rptr.2d 236, 41 P.3d 59.) "[S]o long as the officer has probable cause to believe that an individual has committed a criminal offense, a custodial arresteven one effected in


the optically active compound. In the '360 patent, there is disclosed a thermal transfer ribbon including a partially crystalline polymer, which polymer can be derived from an acid containing at least one carboxylic acid moiety.
Moreover, toner and developer compositions containing charge enhancing additives, especially additives which impart a positive charge to the toner resin, are well known. Thus, for example, there is described in U.S. Pat. No. 3,893,935 the use of certain quaternary ammonium salts as charge control agents for electrostatic toner compositions. There is also described in U.S. Pat. No. 2,986,521 reversal developer compositions comprised of toner resin particles coated with finely divided colloidal silica. According to the disclosure of this patent, the development of images on negatively charged surfaces is accomplished by applying a developer compositionsaid external devices.

7. The digital computer system of claims 1, 2, 5 or 6 wherein said data mover means has a first port connected from each of said plurality of data channel devices and a second port connected from said selected means of said digital computer
system for conducting said operands therebetween; and

said first port has a data transmission interface compatible with each of said plurality of data channel devices and said second port has a data transmission interface compatible with said selected means of said digital computer system.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

The present patent application is related to other patent applications assigned to the assignee of the present application.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a digital data processing system and, more particularly,


modifications may include changes in internal memory capacity, such as the addition or deletion of special purpose subsystems, for example, floating point or
array processors. In addition, such modifications have significantly affected the users interface with the system. Ideally, the actual physical structure and operation of the data processing system should not be apparent at the user interface.

The present invention provides data processing system improvements and features which solve the above-described problems and limitations.

SUMMARY OF THE INVENTION

The present invention relates to structure and operation of a data processing system suitable for use in interconnected data processing networks, which internal structure is flexible, protected from users, effectively invisible to users, and
provides a flexible and simplified interface to users. The data processing system provides an addressing mechanism allowing permanent and uniqueidentification of all information generated for use in or by operation of the system, and an extremely large
address space which is accessible to and common to all such data processing systems. The addressing mechanism provides addresses which are independent of the physical configuration of the system and allow information to be completely identified, with a
single address, to the bit granular level and with regard to information type or format. The present invention further provides a protection mechanism wherein variable access rights are associated with individual bodies of information. Information, and
users requesting access to information, are uniquely identified through the system addressing mechanism. The protection mechanism also prevents use of Trojan Horse arguments. And, the present invention provides an instruction structure wherein high
level user language instructions are transformed into


be reused. UIDs provide an addressing base common to all CS 101 systems which
may ever exist, through which any Object ever created may be permanently and uniquely identified.

As described above, UIDs are 128 bit values and are thus larger than may be conveniently handled in present embodiments of CS 101. In each CS 101, therefore, those Objects which are active (currently being used) in that system are assigned 14
bit Active Object Numbers (AONs). Each Object active in that system will have a unique AON. Unlike UIDs, AONs are only temporarily assigned to particular Objects. AONs are valid only within a particular CS 101 and are not unique between systems. An
Object need not physically reside in a system to be assigned an AON, but can be active in thatcontained in the stack frame belonging to INVOKER's
invocation. When a name interpreter resolved C's name, it placed the descriptor in a register. Call Microcode 1001 takes this descriptor, converts it to a pointer, and stores the pointer above Header 1104.

Since the FP ABP points to the location following the last pointer to an actual argument, Call Microcode 1001 can now calculate that location, convert it into a descriptor, and place it in a FU Register 1004 reserved for FP. The next step is
providing storage for EXAMPLE's local variables. EXAMPLE's Procedure Object 1006 contains the size of the storage required for the local variables, so Call Microcode 1001 obtains this information from Procedure Object 1006 and adds that much storage to
Frame 1102. Using the new value of FP and


the instruction stream of a user's program is provided to FU 120's Instruction Buffer (IB) 1962
through MOD Bus 140. FU 120's Parser (P) 1964 separates out, or parses, Names from IB 1962 and provides those Names as address inputs to NC 1924. NC 1924 in turn provides logical descriptor outputs to LD Bus 1902, and thus to input of ATU 1928. NC
1926 input from LD Bus 1902 allows logical descriptors resulting from evaluation of Name Table Entries to be written into NC 1926. FU 120's Protections Cache (PC) 1934 is a cache mechanism having an input connected from LD Bus 1902 and providing
information, as described further below, regarding protection aspects of references to data in MEM 112 by user's programs. NC 1926, ATU 1928, and PC 1934 areand Names of this instruction stream are transferred from MOD Bus 140 into IB 1962 as they are provided from MEM 112. IB 1962
includes two 32 bit (one word) registers. IB 1962 also includes prefetch circuitry for reading for SOPs and Names of the instruction stream from MEM 112 in such a manner that IB 1962 shall always contain at least one SOPs or Name. FU 120 includes (P)
1964 which reads and separates, or parses, SOPs and Names from IB 1962. As previously described, P 1964 provides those Names to NC 1926, which accordingly provides logical descriptors to ATU 1928 so as to read the corresponding operands from MEM 112.

SOPs parsed by P 1964 are provided as inputs to Fetch Unit Dispatch Table (FUDT) 1904 and Execute Unit


in efficiently performing multiplication and division
operations. FPC 2002's leading zero detector examines the characters or bits of two operands to be multiplied or divided, starting from the highest, to determine which, if any, contain zeros so as not to require a multiplication or division operation.
FPC 2002 accordingly left shifts the operands to effectively eliminate those characters or bits, thus reducing the number of operations to multiply or divide the operands and accordingly reducing the time required to operate upon the operands.

Finally, EU 122 utilizes a unique method, with associated hardware, for performing arithmetic operations on decimal operands by utilizing circuitry which is otherwise conventionally used only to perform operations upon floating point operands.
As described above, MULT 2074 is designed to operate with packed decimal operands, that is operands120 controls transfer of arithmetic results from EU 122 to MEM 112. In doing so, FU 120 generates a logical descriptor describing the size of MEM 112 address space, or "container", that result is to be
transferred into. In certain arithmetic operations, for example integer operations, an arithmetic result may be larger than anticipated and may contain more bits than the MEM 112 "container". Container Size Check Circuit (CSC) 2052 compares actual size
of arithmetic results and L fields of MEM 112 "container" logical descriptors. CSC 2052 generates an output indicating whether an MEM 112 "container" is smaller than an arithmetic result.

Having briefly described certain features of CS 101 structure and operation in the above overview, these and other features of CS 101 will be described in further detail next


program into an S-language program. Operating system programs
are groups of procedures internal to CS 10110 for allocation and control of CS 10110 resources. Operating system programs also define interfaces within CS 10110. For example, as will be discussed further below all operands in a program are referred to
by "NAME". An operating system program translates operand NAME into the physical locations of the operands in MEM 10112. The NAME translation program thus defines the interface between operand NAME (name space addresses) and MEM 10112 physical
addresses.

A process is an independent locus of control passing through physical, logical or virtual address spaces, or, more particularly, a path of execution through a series of programs (i.e., procedures). A process will generally include a user program
and data plus one or more utility programsthe sequence of execution of programs to make most effective use of CS 10110's resources. This is referred to as multiprogramming. In this regard, CS 10110 may
temporarily suspend execution of one program, for example when a resource or certain information required for that program is not immediately available, and proceed to execute another program until the required resource or information becomes available.
For example, particular information required by a first program may not be available in MEM 10112 when called for. JP 10114 may, as discussed further below, suspend execution of the first program, transfer a request for that information to IOS 10116,
and proceed to call and execute a second program. IOS 10116 would fetch the requested information from ED 10124 and transfer it into MEM 10112. At some


in part, CS 10110 micromachine state for each stacked VP 10310 procedure. Referring to FIG. 105, a partial schematic representation of a SS 10336
Stack Frame 10510 is shown. SS 10336 Stack Header 10512 and Frame Headers 10514 contain information similar to that in MAS Stack Headers 10410 and Frame Headers 10414. Again, the information contained therein locates certain points within SS 10336
structure, and threads together SS 10336 with MAS's 10328 to 10334.

Having briefly described Virtual Processes 10212, FURSM 10214 will be described next. As stated above, EURSM 10216 is similar in operation to FURSM 10214 and will be described in following detailed descriptions of CS 10110 structure and
operation.

3. FURSM 10214 (FIG. 103)

Referring again to FIG. 103, FURSM 10214 includes CS 10110 micromachine information structures used internally to CSa Procedure Base Pointer (PBP), and
a Static Data Pointer (STP). As discussed above with reference to KOSPO 10318, these ABPs reside in the procedure's PEDs. When a procedure is called, these ABP's are transferred from that procedure's PED to ABR's 10364 and reside therein for the
duration of that procedure. As indicated in FIG. 103, FP points between Linkage Pointer Block 10416 and Local Pointer Blocks 10418 of Procedure 11's Frame 10412 on KOSMAS 10334. PBP points to the reference point from which the elements of KOSPO 10318
are located. SDP points to KOSSDA 10326. If Procedure 11 calls, for example, a Procedure 12, Procedure 11's ABPs will be transferred onto Procedure Pointer Block 10516 of SS 10336 Stack Frame 10510 for Procedure 11. Upon return to Procedure 11,
Procedure 11's


in SS 10336, these RCWS 10358 entries are stored within their associated
MRFs 10518. That portion of RCWS 10358 associated with MOS 10370 similarly operates in parallel with MOS 10370 and, like MOS 10370, is not an extension of an MEM 10112 resident stack.

In summary, each process active in CS 10110 exists as a separate, complete, and self-contained entity, or Virtual Process, and is structurally organized on a domain basis. Each Virtual Process includes, besides procedure and data objects, a set
of MAS's for storing local data of that processes procedures. Each Virtual Process also includes a CS 10110 micromachine stack, SS 10336, for storing CS 10110 micromachine state pertaining to each stacked procedure of the Virtual Process. CS 10110
micromachine includes a set of information structures, register 10360, MIS 10368,The capacities of GR 10360, MIS 10368, and MOS 10370, may therefore be adjusted, as required for optimum CS 10110 efficiency, by reassignment of GRF 10354's address space. In other embodiments of
CS 10110, GRs 10360, MIS 10368, and MOS 10370 may be implemented as functionally separate registers arrays.

Having briefly described the structure and operation of Process Structures 10210, VP State Block 10218 will be described next below.

Referring again to FIG. 102, VP State Blocks 10218 is used in management and control of processes. VP State Blocks 10218 contains a VP State Block for each Virtual Process (VP) selected for execution by CS 10110. Each such VP State Block
contains at least the following information:

(1) the state, or identification number of a VP;

(2) entries identifying the particular principle and particular


time. Least significant bit of
architectural clock represents increments of 600 picoseconds, and most significant bit represents increments of 127 years. In the present embodiment of CS 10110, certain most significant and least significant bits of architectural clock time are
disregarded as generally not required practice. Time indicated by architectural clock is measured relative to an arbitrary, fixed point in time. This point in time is the same for all CS 10110s which will ever be constructed. All CS 10110s in
existence will therefore indicate the same architectural clock time and all UIDs generated will have a common basis. The use of an architectural clock for generation of OSNs is advantageous in that it avoids the possibility of accidental duplication of
OSNs if a CSC 10110 fails and is subsequently reinitiated.

As statedto SS 10336 and in doing so is translated into the corresponding UID.
Again, a particular data segment in an object may be addressed by means of an AON logical address comprising the object's AON plus associated 32 bit Offset (O) and Length (L) fields.

Each operand appearing in a process is assigned a Name and all references to a process's operands are through those assigned Names. As indicated in FIG. 106B, in the present embodiment of CS 10110 each Name is an 8, 12, or 16 bit number. All
Names within a particular process will be of the same length As will be described in a following discussion, Names appearing during execution of a process may be resolved, through a procedure's Name Table 10350 or through Name Cache 10226, to


and address resolution is indirect, B Field again specifies an ABR 10364 containing an AON/O pointer. The contents of PR Field are added to the O Field of the AON/O pointer to provide
an AON Logical Address of a Base Pointer. The Base Pointer AON Logical Address is evaluated, as described below, and the Base Pointer fetched from MEM 10112. The contents of D Field are added to the O Field of the Base Pointer and the result is the AON
Logical Address of the operand.

NTE types 3 and 4 correspond, respectively to NTE types 1 and 2 and are resolved in the same manner except that B Field contains a Name. The B Field Name is resolved through another NTE to obtain an AON/O pointer which is used inof Procedure X's Frame 10412 in MAS. To pass arguments a, b, and c from Procedure W to Procedure X, the NTEs of arguments a, b, and c are resolved t AON Logical Addresses (i.e., AON/O form). Arguments a, b, and c's AON
Logical Addresses are then translated to corresponding UID addresses which are placed in Procedure X's Linkage Pointer Block 10416 at those places pointed to by Procedure X's NTEs for u, v, and w. When Procedure X is executed, the resolution of Procedure
X's NTEs for u, v, and w will be resolved to locate the pointers, in Procedure X's Linkage Pointer Block 10416 to arguments a, b, and c. When arguments are passed in this manner, the data type and length information are obtained from the called
procedure's


including the relationship between UIDs, Names, AONs, and Physical Addresses and the mechanisms by which CS 10110 manages the available address space of MEM
10112, CS 10110's protection structures will be described next below.

As previously discussed, access rights to objects are arbitrated on the basis of subjects. A subject has been defined as a particular combination of a Principle, Process, and Domain (PPD), each of which is identified by a corresponding UID.
Each object has associated with it an Access Control List (ACL) 10918 containing an ACL Entry (ACLE) for each subject having access rights to that object.

When an object becomes active in CS 10110 (i.e., is assigned an AON) each ACLE in that object's ACL 10918 is written into APAM 10910. Concurrently, each subject having access rights to that(FU 10120, EU 10122, MEM 10112, and IOS 10116) comprising CS 10110. thereby providing common, system wide bit granular addressing which
includes format information. In particular, MEM 10112 responds to the type information fields of descriptors by performing formatting operations to provide requestors with data in the format specified by the requestor in the descriptor. MEM 10112 also
accepts data in a format specified in a descriptor and reformats that data into a format most efficiently used by MEM 10112 to store the data.

As previously described, all operands are referred to in CS 10110 by Names wherein all Names within a particular S-Language dialect are of a uniform, fixed size and format. A K value specifying Name size is provided to FU 10120, at each change
in S-Language dialect, and is


by MEM 10112, and information regarding operand length. Request address information received and stored in JOPAR 20710, JIPAR 20712, and IOPAR 20714 is retained therein until MEM 10112 has initiated service of the corresponding requests.
MEM 10112 will accept further request address information into a given port register only after a previous request into that port has been serviced or aborted. Address information outputs from JOPAR 20710, JIPAR 20712, and IOPAR 20714 are transferred
through PRMUX 20720 to Bus 20738 and from there to RM 20722, MC 20116, and FIU 20120 as service of individual requests is initiated. As will be described below, this address information will be transferred through PRMUX 20720 and Bus 20738 to LP 20724
for use in servicing a cache miss upon occurrence of a MC 20116miss.

PC 20716 receives command and control signals pertinent to each requested memory operation from JP 10114 and IOS 10116 through JPMC Bus 10147 and IOMC Bus 10131. PC 20716 includes request arbitration logic and port state logic. Request
arbitration logic determines the sequence in which IO, JI, JO ports are serviced, and when each port is to be serviced. In determining the sequence of port service, request arbitration logic uses present port state information for each port from the
port state logic, information from JPMC Bus 10147 and IOMC Bus 10131 regarding each incoming request, and information from RM 20722 concerning the present state of operation of MEM 10112. Port state logic selects each particular port to be serviced and,
by control signals through Bus 20738, enables transfer of each port's


MEM 10112 operations. Inputs of RM 20722 include request address information from IOPAR
20714, JIPAR 20212, and JOPAR 20210, including information regarding the type of MEM 10112 operation to be performed in servicing a particular request, interrupt signals from other MEM 10112 control elements, and, for example, start signals from PC
20716's request arbitration logic. RM 20722 provides control signals to FIU 20120, MC 20116, and most other parts of MEM 10112's control structure.

Referring to FIG. 201, MC 20116's cache is, for example, an 8 Kilo-byte, four set associative cache used to provide rapid access to a subset of data stored in MSB 20110. The subset of MSB 20110 data stored in MC 20116's cache at any time is the
data most recently used by JP 10114 or IOS 10116. MCIn this regard, BC 20114 performs two error detection and correction operations. In the first, BC 20114 detects
single and double bit errors in data read from MSB 20110 and corrects single bit errors. In the second, BC 20114 reads data stored in MA's 20112 during refresh operations and performs single bit error detection. Whenever an error is detected, during
either read operations or refresh operations, BC 20114 makes a record of that error in an error log contained in BC 20114 (described further in a following description). Both JP 10114 and IOS 10116 may read BC 20114's error log, and information from BC
20114's error log may be recorded in a CS 10110 maintenance log and to assist in repair and trouble shooting of CS 10110. BC 20114's error log


10112 includes 36 bits of information which may comprise either a memory request comprising a physical address, a true length, and command bits. These memory requests and
data are multiplexed onto IOM 10130 by IOS 10116.

Data transfers from IOS 10116 to MEM 10112 each comprise a single 32 bit data word (IOM(0-31)) and four bits of odd parity (IOMP(0-3)) or one parity bit per byte. Such data transfers are received by either BYF 20118 or FIU 20120.

Each IOS 10116 memory request to MEM 10112, as described above, includes an address field, a length field, and an operation code field. Address and length fields occupy the 32 IOM Bus 10130 lines used for transfer of data to MEM 10112 in IOS
10116 write operations. Length field includes four bits of informationin this regard as a 40 bit bus. Each such request includes an address field, a length field, an FIU field specifying data formating operations
to be performed, operation code field, and a destination code field specifying destination of data read from MEM 10112. Address field includes a 13 bit physical page number field, (JPPN(0-12)), and a 14 bit physical page offset field, (JPPO(0-13)).
Length field includes 6 bits of length information, (JLNG(0-5)), and expresses true length of the data item to be written to or read from MEM 10112. As JPD Bus 10142 and MOD Bus 10144 are each capable of transferring 32 bits of data in a single MEM
10112 read or write cycle, 6 bits of length information are required to express true length. As will be described


control signals between JPO Port 21010 and JP 10114. Among these control signals is Load JO Request (LJOR), which is asserted by JP 10114 when JP 10114 wishes to load a request into MEM
10112. LJOR is asserted concurrently with presentation of the memory request to MEM 10112 through PD Bus 10146. JO Port Available (JOPA) is asserted by MEM 10112 when JPO Port 21010 is available to accept a new memory request from JP 10114. If LJOR
and JOPA are asserted concurrently, MEM 10112 accepts the memory request from JP 10114 and MEM 10112 drops JOPA to indicate that memory request has been accepted. As previously discussed, MEM 10112 may assert JOPA while a previous request is being
executed and the PD Bus 10146 information, that is the memory requestthat is the data item extends across a word boundary. This occurence is indicated by setting to one an IO Cross Word (IOCW) flag which is stored in IOPRR 21218.

Encode Logic (ENC) 21242 is a Read Only Memory (ROM) and combinatorial logic receiving the three bit operation code field, five least significant bits of PPO of address, and four bits of BLN. ENC 21242 encodes this information to generate a four
bit Next IO Operation (OP) code which is subsequently loaded into IOPRR 21218. Operation code field of an IOS 10116 request indicates only the general type of MEM 10112 operation to be executed in servicing a particular request. The actual operation
performed by MEM 10112 will depend upon the specific operation command and the address boundaries of the data


bit PPN field (JPPN(0-12)) and a 14 bit PPO field (JPPO(0-13)), both received from PD Bus 10146. In addition, PPO field in JPIPRR 21248 stores only 7
bit block within page field (BLK) and 2 bit word within block field (WD). JPIPRR 21248 is enabled to accept a memory request input from PD Bus 10146 by enable signal inputs JIPORTAV previously discussed, and Took JI Port (TJIP) in a manner as previously
described with reference to JPO Port 21010.

Enable signals JI Page Select (JIPAGESEL), JI Block Select (JIBLKSEL), and JI Port Select (JIPORTSEL) gate JPIPRR 21248 contents, and a hard wire control signal described below, through Gates 21250 of PRMUX 20720. These enable signals, the JPIRR
21248 fields gated by these enabling signals, and the sub-buses of Bus 20738 to whichPort Request Validity signals are generated concurrently by PRS 21310.

Inputs to PRS 21310 include IOREQVALID, JOREQVALID, and JIREQVALID from outputs of Register 21320. These inputs serve PRS 21310 as an indicator of a current state of Port availability as previously determined by PRS 21310. Input Hand-Off-Next
(HANDOFFNXT) from another portion of MIC 20122 (described below) indicates that a next operation to be performed is a Hand Off operation as previously described. Input Reset Request (RESETREQ) is a reset signal generated by MIC 20122 indicating that a
currently serviced request valid flag is to be reset, that is terminated. Inputs IO Port Select (IOPORTSEL) and IO Previous Port (IOPREVPORT) are MIC 20122 generated signals indicating, respectively, that IO Port 20910 is currently selected for service
and that IO Port 20910 was the


resets the reset valid flag, which would have been reset in anticipation of completion of the
request. Input TMDEPEXAM is a test and diagnostic signal set by DP 10118 to force all ports to appear busy to the requestors.

In summary, as described above and as previously described, PRS 21310's Port availability outputs, that is IOPA, IOPA, JOPA, JOPA, JIPA and JIPA, indicate when a particular port is available to receive a memory request. PRS 21310's request valid
outputs, that is IOREQVALID, JOREQVALID, and JIREQVALID indicate when a particular port has a currently outstanding valid request. A LOADPORT Signal, that is LIOR, LJOR, or LJIR, from JP 10114 or IOS 10116 will result in the corresponding port
availability flag being set and the corresponding request entering the priority queue for service. Eithera new request from step 7, when a valid request is presented to RM 20722.

Certain conditions resulting in a jam or interrupt operation are, for example:

(1) A memory request accesses MC 20116's cache and an MC 20116 cache miss occurs. An RM 20722 interrupt results and RM 20722 is forced to SEQSTP equals 7. Unless this request is a bypass read or write operation, that request re-enters priority
queue for subsequent service when its wait condition is satisfied. That request will be forced to wait as a result of the cache load or a collision with a previous MC 20116 cache load address, that is an interfering request to an MC 20116 cache address
awaiting data to be loaded from MSB 20110.

(2) As will be described further below, LM 20730


Encoded outputs TCE 21512 and CHME 21514 are loaded into, respectively, Trailer Condition Encoding Register (TCER) 21516 and Cache/Hit/Miss Encoding Register (CHMER) 21518.
Encoded outputs of TCER 21516 and CHMER 21518 are provided as inputs to Trailer Decoding Network (TDN) 21520, together with other inputs representing current state of MEM 10112 operation. Outputs of TDN 21520 are provided to other portions of MEM 10112
circuitry, including MIC 20722, and are signals directing operation of MEM 10112 based upon certain conditions arising in operation of MEM 10112 on the current and previous clock cycles. Trailer Command Register (TCR) 21522 receives control signals,
generally from RM 20722, indicating certain MEM 10112 operations to be executed during the next microinstruction sequence step. These command signals will be transferred into TCR 21522 and provided as21516 and CHMER 21518. At start of second clock cycle, TCR 21522 inputs
presented during first clock cycle are loaded into TCR 21522 and appear as TCR 21522 outputs representing RM 20722 selected operations to be initiated or executed during second clock cycle. Concurrently, encoded outputs of TCE 21512 and CHME 21514 are
transferred into TCER 21516 and CHMER 21518, to appear as TCER 21516 and CHMER 21518 outputs representing MEM 10112's state of operation during first clock cycle, that is MEM 10112's previous state of operation. At start of second clock cycle, these
encoded outputs of TCR 21516 and CHMER 21518, together with TDN 21520's other inputs representing a current state of MEM 10112 operation, are decoded by TDN 21520. TDN 21520 then provides, this time, outputs initiating certain MEM


and outputs of TCL 21510, inputs to TCE 21512 include Check Flush OK (CHKFLUSHOK), that is RM 20722 has initiated an operation to determine whether an MC 20116 cache flush is currently permissible, and OK TO Flush
(OKFLUSH) indicating that an MC 20116 cache flush operation may currently be performed. Input Operation Check Write Back File (OPCHECKWBF) and Write Back File Busy (WBFBUSY) respectively indicate that an operation to check current status MC 20116's
write back file is currently being performed and that MC 20116's write back file is currently busy, that is executing a write back operation. Input Operation is Non-Interrupt (OPISNONINT) indicates that a non-interruptable MEM 10112 operation is
currently being executed. Input Future Load (FUTURELOAD) indicates that an MC 20116 cache load operation is pending. Load Address Matchasserted and CACHMISSED is asserted. MISSVALID thereby enables BCRL 21614's request to BC 20114 if a cache miss did occur and the
memory request resulting in a cache miss was suppressed by a trailer condition.

(3) BANKCMD=010: read data is to be loaded into MC 20116's cache but ERCC errors detected by BC 20114 are not to be loaded into BC 20114's error log; or bad parity is to be generated to correspond to multiple bit ECC errors.

Concurrently with submission of BCRL 21614's request to BC 20114, BCRL 21614 generates signals Bypass Read Requested (BYRDREQ) and Load Cache Requested (LOADREQD) to RQ 20724 and Bypass Write Requested (BYWRREQD) to WC 20718. BYRDREQD and
LOADREQD are stored in 20728 for subsequent use by LM 20730, described below, to determine whether to load


the requested data from MSB 20110 and to MC 20116's cache or to pass this data off to JP 10114 or IOS 10116 directly. BYWRREQD is asserted when
block write from IOS 10116 will bypass MC 20116's cache and MSB 20110 will accept write data from MC 20116's BYF 20118 rather than from MC 20116's WBF 23286.

BC 20114 indicates whether it is currently able to accept a request from MISSC 20726 through input Bank Ready (BANKRDY). BC 20114 indicates that it is ready to accept a request by asserting BANKRDY. SELWBA may be asserted, for example, when
MISSC 20726 is engaged in writing back data from MC 20116's cache to MSB 20110 to make space available in MC 20116's cache for data to be written from MSB 20110 in response10118 during diagnostic tests.
Load Pending (LOADPEND) prevents a second load MC 20116 cache load operation from being initiated while a previous MC 20116 cache load operation is present in RQ 20728. Because the present embodiment of MEM 10112 accommodates only one level of miss
information to be stored at a time, two outstanding loads are not permitted. IO Encache (IOENCACHE), previously discussed, indicates that IOS 10116 has requested that certain data be encached and modifies a bypass read or write request into a MC 20116
cache read or write. Test Mode Stop Bypass (TMSTOPBYP) is used to test MEM 10112, in particular MC 20116. TMSTOPBYP inhibits initiation of a bypass read or write operation and modifies such an operation into a cache read or write. Input Correct Write
Back Parity (CORRWBPAR)


and write
operations. As indicated in FIG. 221, WCL 22110 receives certain inputs, each described below, from other portions of MIC 20122 circuitry and provides outputs to, for example, MC 20116. Certain WCL 22110 outputs are provided as inputs to Register
22112, which stores current state of certain WCL 22110 conditions and returns those conditions as an input to WCL 22110 to aid in determining future outputs of WCL 22110.

Referring first to outputs of WCL 22110, the majority of these outputs are provided to MC 20116 and will be described more fully in a following description of MC 20116. Outputs Next Bypass Write 1 (NEXTBYWl) and Next Bypass Write 0 (NEXTBYW0)
comprise a two bit address code to MC 20116's Bypass Write File (BWF) 20118. NEXTBYW1 and NEXTBYW0 are used indata buses. MIO Bus 10129 is controlled by MEM 10112 for transfer of data from MEM 10112 to IOS 10116. MOD Bus 10144 is also controlled by
MEM 10112 for transfers of data from MEM 10112 to JP 10114, and for internal memory transfers between MC 20116's cache and FIU 20120. A third principal MEM 10112 data bus is IB bus which is an internal data bus for FIU 20120 and will be described
further in a following description of FIU 20120. DPS 22410 generates encoded enabling signals selecting data sources for each of these buses. These encoded enabling signals are generated by inputs to DPS 22410, from other portions of MIC 20122
circuitry, indicating data transfers to be performed by MEM 10112. As will be described in a following description


shifted in multiples of 2 nibbles, that is 8 bits or 1 byte. PRL 23052 right rotates the 4 parity bits of a data word by an amount corresponding to right rotation of the
corresponding 32 data bits in BYNL 23050. Right rotated outputs of BYNL 23050 and PRL 23052 therefore comprise a valid data word having 32 bits of data and 4 bits of parity wherein the parity bits are correctly related to the data bits. A right rotated
data word output from BYNL 23050 and PRL 23052 may be transferred onto DSO Bus 23032 for subsequent transfer to MOD Bus 10144 or MIO Bus 10129 as described above. DSO 23032 is used as FIU 20120's output data path for byte write operations and "rotate
read" operations wherein the requiredwhich may be generated by FIUC 20132 are shown. DMSKA (0-31) is shown in Line A of FIG. 231. In DMSKA (0-31) all bits to the left of but not including a bit designated by Left Bit Address
(LBA) and all bits to the right of and not including a bit designated by Right Bit Address (RBA) are 0. All bits between, and including, those bits designated by LBA and RBA are 1's. DMSKB (0-31) is shown in Line B of FIG. 231 and is DMSKA (0-31)
inverted DMSKC (0-31) and DMSKD (0-31) are shown, respectively, in Lines C and D of FIG. 231 and are comprised of, respectively, all 0's or all 1's. As stated above DMSK (0-31) is ANDed with the 32 bit output of DS 23016. As


such, DMSKC (0-31) may be
used, for example, to inhibit DS 23016's output while DMSKD (0-31) may be used, for example, to pass DS 23016's output to AR 23020. DMSKA (0-31) and DMSKB (0-31) may be used, for example, to gate selected portions of DS 23016's output to AR 23020 where,
for example, the selected portions of DS 23016's output may be ORed with other mask word outputs MSK 23018.

Referring again to FIG. 231, Line E therein shows 32 bit right mask (RMSK) (0-31) which may be generated by FIUC 23012. In the most general case, RMSK contains zeros in all bit positions to the left of and including a bit position designated by
RBA. When used in a blank fill operation, bit positions 2, 10, 18, and 26 may beto 127 of MCDS 23220.
Similarly, MTAGB 23228, MTAGC 23230 and MTAGD 23232 contain tags of words residing in, respectively, frames B, C, and D of sets 0 to 127. MTAGA 23226 to MTAGD 23232 are addressed by INDEX and correspondingly provide the tags (PPN) of those data words
residing in frames A to D of the set selected by INDEX. If a requested data word is contained in MCDS 23220, at least one of MTAGA 23226 to MTAGD 23232 will respond by providing a corresponding tag. The finding of a MCC 23210 entry corresponding to a
physical address submitted to MCC 23210 is referred to as a cache "hit". TAG outputs of MTAGA 23226 to MTAGD 23232 are compared to physical addresses PPN field by CHCL 23216. CHCL 23216 identifies


MTAGD 23232 data inputs also receive Tag Valid (TAGVAL) and Auxiliary (AUX) bits from MIC 20122 as described above. MTAGA 23226 to MTAGD 23232 address inputs
are also provided from TSA Bus 21210 and comprise the BLK fields, or INDEX, of physical addresses data words being written into or read from MCDS 23220. Individual Write Enable (WE) inputs are provided to MTAGA 23226 to MTAGD 23232 when TAGs are to be
written into MCTS 23214. MTAGA 23226 to MTAGD 23232 WE inputs are provided from Tag Write Enable Gates (TAGWEG) 23234. Enable inputs Tag Store Initiate (TSINIT) and Tag Store Write Enable (TSWE) are provided to TAGWEG 23234 from MIC 20122, and in
particular from RM 20722. A frame number input selecting one of MTAGA 23226 to MTAGD 23232 to beWDAR 23248, MISAR 23250, and BYWAR 23252 may be comprised, for example, of SN74S194 registers.

Referring first to DSFAR 23236, DSWAR 23244, and DSBAR 23246, as stated above these registers provide data store addresses to MCDS 23220 for use in writing data into or reading data from MCDS 23220. DSFAR 23236 receives two bits of FRAME number
from CHCL 23216 and seven bits of INDEX from TSA Bus 21210 from PRMUX 20720. DSFAR 23236 in turn provides FRAME number and INDEX to LRUL 23224, described further below, and as part of address input to MCDS 23220. As previously described, DSFAR 23236
provides FRAME number to TAGWEG 23234 for tag loads.

DSWAR 23234 receives two bits of WD field, indicated as Next Data Store Word (NEXTDSW) (0-1) from MIC 20122. DSWAR 23234 in


the address for data to be written back to MSB 20110. This address information is saved by WBAR 23248 for subsequent use in performing write back operations when data is displaced from MCC 23210 to be written back into MSB 20110.
Address information is transferred into WBAR 23248 upon assertion of Write Back Address Chip Enable (WBACE) to WBAR 23248 enable input from MIC 20122.

In case of a cache miss or a requirement for a write back operation, address of missed cache reference from MISAR 23250 or address of data to be written back into MSB 20110 from WBAR 23248 is provided to BC 20114 through SBA Bus 20152. As
indicated in FIG. 232, address outputs of MISAR 23250 and WBAR 23248 as provided as inputs to SBAMUX 23256. Addressinto a particular frame DSCM 23258 and Use Write Enable (USEWE) input
from MIC 20122 indicating that a usage word is to be written into UTM 23276. UTM 23276 uses its Address (A) and Write Enable (WE) inputs to generate dirty flag bits for each usage word currently being written into UTM 23276. Upon each access of a DSCM
23258 frame, UTM 23276 provides a corresponding ten bit usage word output to UTMR 23278 where that information is captured for subsequent use. In particular, usage words are transferred into UTMR 23278 when it is necessary to displace a data word from
DSCM 23258. Transfer of a usage word into UTMR 23278 is enabled by enable signal Replace Chip Enable (RPLCE) from MIC 20122. UTMR 23278 may be comprised of, for example,


20114's addressing circuitry or operation. All data
writes to or reads from MSB 20110, that is MA's 20112, are comprised of four word blocks as previously described. That is, each write to or read from MSB 20110 is comprised of a sequential transfer of four data words. Each data word residing in MSB
20110 is comprised of thirty-two bits of data plus seven bits of error correcting hamming code.

Referring to FIG. 234, a partial block diagram of an MA 20112 is shown. MA 20112's data storage is comprised of four random access memory arrays indicated in FIG. 234 as Memory Array Plane 0 (PLN0) 23410 to Memory Array Plane 3 (PLN3) 23416.
Each RAM of PLN0 23410 to PLN3 23416 may have a data storage capacity of, for example, sixteen KilobitsWDODD are
provided, respectively, to MAODRV 23438, EWL 23420 and OWL 23422 to control transfer of data into and out of MA 20112.

Referring to ERAS 23444, in a present embodiment of MA 20112 it is necessary, to insure adequate precharge periods for the integrated circuits comprising PLN0 23410 to PLN3 23416, to generate RAS inputs to the data RAMs which are less than 3 full
clock cycles in length. ERAS 23444 is a four stage shift register receiving PLNRAS and clocked by ADRCLK. As described below with reference to MACG 23446, ADRCLK is a clock signal occuring before SYSCLK by a sufficient amount to insure proper setup
time of addresses at the RAMs. Outputs of ERAS 23444 are RAS to PLN0 23410 to PLN3 23416 occurring earlier than those RAS outputs


specifying the upper limit of the previous MA 20112's addresses space. A second input to ADRADD 23450 is MMAADR specifying the total amount of address space, for example, 256 Kilobyte or 512 Kilobyte or 1
Megabyte or 2 Megabytes of address space contained on that MA 20112. ADRADD 23450 adds PREMADI and MMAADR to generate CURMADO indicating the upper limit of that MA 20112 address space. As described above, CURMADO is provided as an input to the next
higher MA 20112 and is an input to ADRCOMP 23452. ADRCOMP 23452 also receives PREMADI. ADRCOMP 23452 thus has inputs PREMADI and CURMADO indicating, respectively, the upper and lower limits of that MA 20112's address space. Input MODSEL (0-5), that is
the MODSEL field of a MA address, is provided as a thirdon next clock cycle. This initial enabling signal is
delayed by one clock cycle in a register and provided as output DRIVE to MAODRV 23438 to enable transfer of a word read from PLN0 23410 to PLN3 23416 on to RD Bus 20130.

ODD Even Select Logic (OES) 23462 receives inputs PL0LDIN to PL3LDIN. These inputs are gated together with a clock input to generate WDEVEN and WDODD to clock data words from WD Bus 20126 and WDB 23418 into, respectively, EWL 23420 and OWL
23422.

Clock Gating (CG) 23464 receives inputs REGCLK, MEMCLK, and CLKENBL from a clock generator in DP 10118 to generate ADRCLK and System Clock (SYSCLK) to other portions of MEM 10112 circuitry.

Aknowledgment Gating (ACK) 23466 of MACG 23446 generates acknowledgment output Select (SEL) to BC 20114 when


23786 stores sequences of microinstructions for controlling operation of BC 20114 and thus operation of MSB 20110, that is MA's 20112. Selection of sequences of microinstuctions, and of microinstructions within a selected sequence, is
controlled by seven bit address comprising three bit OPCODE and single bit VLDREQ from BCRR 23720, single bit input RFSHBUSY from MSBR 23784, and two bit address input SEQCNT from BCmCIR 23788. As described above, OPCODE is provided to BCRR 23720 and
thus to BCmCS 23786 by MISSC 20726. OPCODE is BCmCS 23786's primary address input for selecting a particular microinstruction sequence. VLDREQ, again provided from MISSC 20726, is a flag indicating that a request for a BC 20114 and MSB 20110 operation
is valid. RFSHBUSY is a flag requesting that BC 20114 execute an MSB 20110data pertaining an error discovered in a data word read from MSB 20110 in response to a MSB 20110 read or refresh request.

Certain outputs of PCEN 23796 are, as previously described, provided to PCEOR 23798, together with inputs ERCCERROR and MRE, and are subsequently provided as outputs to MIC 20122, indicating state of BC 20114 and MSB 20110 operation. These
outputs include Read Data Output Present Select (RDOPS) indicating that data requested from MSB 20110 is presently available on RDO Bus 20158 and Data Coming (DCOM) indicating that requested data will appear on RDO Bus 20158 as start of next clock cycle. Output Read Data Out Invalid (RDOINV) indicates that data word requested from MSB 20110 is invalid due to discovery of an error in that data word. Output


of data, and final read operation will transfer the remaining 6 bits of data. To read a data item of greater than 32 bits from MEM 10112 therefore, DESP 20210 must generate a sequence of logical descriptors, each
defining a successive 32 bit segment of that data item. Final logical descriptor of the sequence may define a segment of less than 32 bits, for example, six bits as in the example just stated. In each successive physical descriptor, offset field must
be incremented by value of length field of the preceding physical descriptor to define starting addresses of successive data items segments to be transferred. Length field of succeeding physical descriptors will, in general, remain constant at 32 bits
except for final transfer which may be less than 32 bits. Offsetlogical descriptors corresponding to Names appearing on MOD Bus 10144 as part
of sequences of SINs. As each Name is presented to NC 10226, that Name is transferred into and captured in Name Trap (NT) 20254. Upon occurrence of an NC 10226 miss, that is NC 10226 does not contain an entry corresponding to a particular Name, that
Name is subsequently transferred from NT 20254 to OFFMUX 20240 through NAME Bus 20224 and OFFMUX 20240's fifth input. That Name, which is previously described as an 8, 12, or 16 bit binary number, may then be scaled, that is multiplied by a NTE size.
That scaled Name may then be added to Name Table Pointer (NTP) from mCRs 10366 to obtain the address of a corresponding NTE in an NT 10350. In


by CS 10110 as previously described. That logical descriptor will have been captured and stored in DEST 20256 and thus is immediately available, so that DESP 20210 is not
required to regenerate that descriptor. DAT 20258 serves a similar purpose with regard to data being written into MEM 10112 from JP 10114. That is, DAT 20258 receives and captures a copy of each 32 bit word transferred onto JPD Bus 10142 by JP 10114.
In event of MEM 10112 being unable to accept a write request, that data may be subsequently reprovided from DAT 20258.

Referring to NC 10226, ATU 10228, and PC 10234, these elements of MEMINT 20212 are primarily cache mechanisms to enhance the speed of FU 10120's interface to MEM 10112, and consequently of CS 10110's operation. Asa Frame Number (FN) field, and Offset Within Frame (O) fields, and a Length field. As
discussed with reference to string transfers, a physical descriptor length field, as in a logical descriptor length field, specify a data item of less than or equal to 32 bits length. Referring to FIG. 106C, as previously discussed a logical descriptor
comprised of a 14 bit AON field, a 32 bit Offset field, and Length field, wherein 32 bit logical descriptor Offset field is divided into a 18 bit Page Number (P) field and a 14 bit Offset within Page (O) field. In translating a logicl into a physical
descriptor, logical descriptor Length and O fields are used directly, as respectively, physical descriptor length and O fields. Logical descriptor AON and P fields are translated


into physical descriptor FN field. Because no actual translation is
required, ATU 10228 may provide logical descriptor L field and corresponding O field directly, that is without delay, to MEM 10112 as corresponding physical descriptor O and Length fields. ATU 10228 cache entries are thereby comprised of physical
descriptor FN fields corresponding to AON and P fields of those logical descriptors for which ATU 10228 has corresponding entries. Because physical descriptor FN fields are provided from ATU 10228's cache, rather than directly as in physical descriptor
O and Length fields, a physical descriptor's FN field will be provided to MEM 10112, for example, one clock cycle later than that physical descriptors O and Length fields, as has been previously discussed.

Referring to FIG. 202, physical descriptor FN fields to be written intooperating in parallel with, and addressed in parallel wih TS 24010. VALS 24068 contains entries indicating validity of corresponding TS 24010 and DS 24050 entries. That is,
VALS 24068 entries indicate whether corresponding entries have been written into corresponding locations in TS 24010 and DS 24050. In the example, VALS 24068 may thereby be a 16 word by 4 bit wide memory. Each bit of a VALS 24068 word indicates
validity of a corresponding location in TSA 24012 and DSA 24052, TSB 24014 and DSB 24054, TSC 24016 and DSC 24056, and TSD 24018 and DSD 24058. DIRTYS 24070 similarly indicates whether corresponding entries in corresponding locations of TS 24010 and DS
24050 have been written over, or modified. Again, DIRTYS 24070 will be a sixteen word by four bit wide


of FU 10120 will be described next below with aide of FIG. 202, description of FU 10120's structure will be followed by a detailed description of FU 10120 wherein further, more detailed,
diagrams of certain portions of FU 10120 will be introduced as required to enhance clarity of presentation.

a.a. Fetch Unit Control Logic 20214 Overall Structure

Referring again to FIG. 202, as previously described FIG. 202 includes a partial block diagram of FUCTL 20214. Following the same sequence of description as above, PREF 20260 has a 28 bit bi-directional port connected to AON Bus 20230 and 32 bit
bi-directional port directed from OFFSET Bus 20228. A control input of PREF 20260 is connected from control output of INSTB 20262.

INSTB 20262 32 bit data input (DI) is connected from MOD Bus 10144.bit SDT outputs of EUSDT 20266 is connected to inputs of Microinstruction Control Store in EU 10122, as will be described in a following description of EU 10122. FUSDT 11010 has, as described further below, two outputs connected to address (ADR)
Bus 20298. First output of FUSDT 11010 are six bit SDT pointers, or addresses, corresponding to generic SINTs as will be described further below. Second output of FUSDT 11010 are 15 bit SDT pointers, or addresses, for algorithm microinstruction
sequences, again as will be described further below.

Referring to RCWS 10358, RCWS 10358 has a first bi-directional port connected from JPD Bus 10142. Second, third, and fourth bi-directional ports of RCWS 10358 are connected from, respectively, a bi-directional port of MCW1 20290, a first
bi-directional port EVENT 20284, and a bi-directional