My analysis is that the B580 is profitable if they build enough of them:

https://news.ycombinator.com/item?id=42505496

The margins might be describable as razor thin, but they are there. Whether it can recoup the R&D that they spent designing it is hard to say definitively since I do not have numbers for their R&D costs. However, their iGPUs share the same IP blocks, so the iGPUs should be able to recoup the R&D costs that they have in common with the discrete version. Presumably, Intel can recoup the costs specific to the discrete version if they sell enough discrete cards.

While this is not a great picture, it is not terrible either. As long as Intel keeps improving its graphics technology with each generation, profitability should gradually improve. Although I have no insider knowledge, I noticed a few things that they could change to improve their profitability in the next generation:

* Tom Petersen made a big deal about 16-lane SIMD in Battlemage being what games want rather than the 8-lane SIMD in Alchemist. However, that is not quite true since both Nvidia and AMD graphics use 32-lane SIMD. If the number of lanes really matter and I certainly can see how it would if game shaders have horizontal operations, then a switch to 32-lane SIMD should yield further improvements.
* Tom Petersen said in his interview with Hardware Unboxed that Intel reported the active transistor count for the B580 rather than the total transistor count. This is the contrary to others who report the total transistor count (as evidenced by their density figures being close to what TSMC claims the process can do). Tom Petersen also stated that they would not necessarily be forced by defects to turn dies into B570 cards. This suggests to me that they have substantial redundant logic in the GPU to prevent defects from rendering chips unusable, and that logic is intended to be disabled in production. GPUs are already highly redundant. They could drop much of the planned dark silicon and let defects force a larger percentage of the dies to be usable by only cutdown models.

I could have read too much into things that Tom Petersen said. Then again, he did say that their design team is conservative and the doubling rather than quadrupling of the SIMD lane count and the sheer amount of dark silicon (>40% of the die by my calculation) spent on what should be redundant components strike me as conservative design choices. Hopefully the next generation addresses these things.

Also, they really do have >40% dark silicon when doing density comparisons:

* ARC B580: 72.1M / mm²
* Nvidia 4070 Ti: 121.8M / mm²
* TSMC claim for 5nm: 138.2M / mm²

They have 41% less density than Nvidia and 48% less density than TSMC claims the process can obtain. We also know that they have additional transistors on the die that are not active from Tom Petersen’s comments. Presumably, they are for redundancy. Otherwise, there really is no sane explanation that I can see for so much dark silicon. If they are using transistors that are twice the size as the density figure might be interpreted to suggest, they might as well have used TSMC’s 7nm process since while a smaller process can etch larger features, it is a waste of money.

Note that we can rule out the cache lowering the density. The L1 + L2 cache on the 4070 Ti is 79872 KB while it is 59392 KB on the B580. We can also rule out IO logic as lowering the density, as the 4070 Ti has a 256-bit memory bus while the B580 has a 192-bit memory bus.

https://www.techpowerup.com/gpu-specs/arc-b580.c4244

https://www.techpowerup.com/gpu-specs/geforce-rtx-4070-ti.c3...

https://en.wikipedia.org/wiki/5_nm_process#Nodes

The hardware unboxed interview of Tom Petersen is here:

https://youtu.be/XYZyai-xjNM