Hi all - I'm one of the authors of the paper so thought I would post my thoughts. Firstly, thanks for the interest in the paper - it's really nice to have this sort of discussion. As it's been highlighted in the comments this is a workshop paper (the workshop on RISC-V for HPC last month at SC) which allows us to focus on some of the more practical aspects compared to, for instance, a main-track conference or journal etc. Given the availability of this 64-core RISC-V CPU we felt that it would be interesting to, independent of the manufacturer, explore some of the performance and try and answer the question around how realistic a proposition this is for HPC workloads (I suppose really trying to preempt questions from the HPC community around whether this 64-core CPU moves us closer to RISC-V being a realistic choice for HPC).

Obviously the numbers are in the paper so you can draw your own conclusions, but we were pretty impressed by the results overall - both in relation to the SG2042 itself and also more widely what this means for RISC-V. The SG2042 isn't perfect (as has been highlighted here, it only supports RVV 0.7.1 for instance), but my feeling is that it's a significant step forward for the RISC-V community.

For the SG2042 specifically, as it's been highlighted in these comments, it is within the same order of magnitude (pretty much anyway depending on which number(s) you look at) as well established x86 high-performance CPUs (and we threw in an old Sandybridge CPU too as a bit of a baseline). I think that's pretty impressive, after all the SG2042 is a first-generation RISC-V CPU from Sophon being compared against mature x86 CPUs. As someone else has said they need to start somewhere and are now building on this as illustrated by their roadmap. Furthermore, something we didn't consider in the paper was price - this is a tricky one as it can depend on where you are geographically with exchange rate etc, but I think that the SG2042 is probably a fair bit cheaper than some of the x86 CPUs we compared against too (when they were new anyway).

What I think is pretty phenomenal here is the pace of change for RISC-V more widely. At the start of 2023 the best commodity available RISC-V hardware that we could get was the 4-core VisionFive V2. As we show in the paper, each C920 core in the SG2042 is quite a bit faster for the benchmarks than the U74 in the V2, but also the SG2042 is providing 64 vs 4 cores. This is within the space of 12 months, or so, and there seem to be a whole load of new high performance RISC-V hardware planned for general availability in 2024 (from a range of manufacturers across the globe) including new CPUs and high-core count accelerators (e.g. see the slides of the four vendor talks at the workshop we presented this paper at https://riscv.epcc.ed.ac.uk/community/sc23-workshop/ ). So I think it's really interesting to see the trajectory here of RISC-V to date and over the next few years to track whether this pace continues (or even accelerates!)

My personal feeling is that unless it unlocks some very significant new capabilities (which to be fair is possible), using RISC-V CPUs instead of a x86 CPUs in supercomputers will probably be a tough sell in the short term. However, I think there is a lot of potential on the accelerator side of things and I suspect this is where we will start seeing RISC-V emerge for HPC initially (and maybe by stealth where people are unaware that their compute or in-network accelerators are leveraging RISC-V in some way).