Yeah. Balanced ternary clearly makes sense if you were getting regeneration, amplification, memory, and inversion from your flip-flops and doing all your combinational logic with diodes, which was a common approach at the time and probably the right choice with tubes (the famous LGP-30 and LGP-21 worked this way) and maybe with ferrite logic too. A three-state "flip-flop" isn't really just a three-state ring counter, any more than a two-state flip-flop is just a two-state ring counter, although that's definitely one way to configure it.

Ware definitely is not claiming that they didn't build the Setun in hardware, nor that they emulated it on a base-4 machine, only that the circuit elements they used were capable of four states. Brousentsov's account certainly says they built it. Ware is careful to disclaim, "Among other things, the difficulty of communicating across a language barrier introduces uncertainties in the information."

As for the debugging, it's entirely plausible to me that they debugged the logic equations well enough on paper before building the computer, and designed it conservatively enough (operating 1 MHz transistors at 200 kHz, for example), that they didn't have to correct any design defects after it was built. Of course, this would have been very likely if they had simulated it on another machine first, as you seemed to be saying, but I don't think they had one available.

Brousentsov's other claims (that a balanced-ternary machine doesn't have an unsigned type or require unsigned comparisons, that rounding is achieved simply by truncation, that people common reason informally with three-valued logic, and that programming is easier in ternary) seem either uncontroversially true to me or subjective; which ones did you think were dubious?

The potential economy of ternary, which is marginal to begin with (5.7% greater density in one-hot circuits like those mentioned), does of course disappear when your "trits" are represented as pairs of bits, as in the realization that Ware saw. (There's a diagram of a ternary Setun shift-register stage on p. 128 (141/205) of Ware's report, figure 53.) But it seems from Brousentsov's account that they were able to eventually build some ternary gates as well; the machine wasn't ready for "official testing" until the year after Ware's report. Then they manufactured 50 units in total over the next five years, which could of course have incorporated hardware simplification. Surely they all had to use binary core memory, though, which means the 2916-trit RAM (worth about 4621.8 bits) would have been 26% larger if it had been configured as 5832 bits instead.

Incidentally, Ware's Appendix III starting on p. 171 (184/205) is a relatively in-depth look at the square-loop ferrite logic ("switching") cores that were a less popular alternative to transistors and tubes at the time, the core of the ferrite/diode systems that remained popular in the USSR until the end of the 01960s. They finally lost out because they couldn't scale to the high densities, low powers, or high speeds that transistors could (even the Russians had 400 MHz transistors at the time of Ware's report), and their assembly was much less amenable to automation, putting them at an even greater disadvantage in the US. They did have the merit of being considerably more robust than transistors.

Thank you very much for bringing these delightful documents to my attention!