Search query: corner rounding trench

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abstract: Trench formation and corner rounding are the key processes to demonstrate high voltage trench based vertical GaN devices. In this work, we developed a damage free corner rounding technology combining Tetramethylammonium hydroxide wet etching and piranha clean. By optimizing the inductively coupled plasma dry etching conditions and applying the rounding technology, two main trench shapes were demonstrated: flat bottom rounded trench and tapered bottom rounded trench. TCAD simulations were then performed to investigate the impact of trench shapes and round corners on device blocking capability. GaN trench metal insulator semiconductor barrier Schottky rectifiers with different trench shapes were fabricated and characterized. A breakdown voltage over 500 V was obtained in the device with flat bottom rounded trenches, compared to 350 V in the device with tapered bottom rounded trenches and 150 V in the device with non rounded trenches. Both experimental and simulation results support the use of rounded flat b.
author_names: Yuhao Zhang

Min-Chul Sun

Zhihong Liu

Daniel Piedra

Jie Hu

Xiang Yang Gao

Tomas Palacios
title: Trench formation and corner rounding in vertical GaN power devices
year: 2017

abstract: (54) TOPCORNER ROUNDING FOR SHALLOW 5,203,957 4/1993 Yoo et al. 156/643 TRENCH ISOLATION 5,654.232 8/1997 Gardner 438/661 5,837,615 11/1998 Rostoker 438/711 (75) Inventors: Hsien Kuang Chiu, Taoyuan; 5,874,317 2/1999 Stolmeijer 437/67 Fang Cheng Chen; Hun Jan Tao, both 5,915,195 6/1999 Fulford, Jr. et al. 438/254 of Hsin Chu, all of (TW) 6,074,954 6/2000 Lill et al. 438/710 6,143,666 11/2000 Lin et al. 438/725 (73) Assignee: Taiwan Semiconductor Manufacturing Company, Hsin Chu cited by examiner (TW)
author_names: Hun-Jan Tao
title: TOP CORNER ROUNDING FOR SHALLOW TRENCH ISOLATION FIELD OF THE INVENTION
year: 2017

abstract: In this work, a novel method for shallow trench isolation (STI) top corner rounding (TCR) is presented. Different from conventional methods, such as liner oxidation or STI anneal, STI top corner with a curvature diameter of about 35 nm is achieved by STI etch process. And the mechanism of its benefit for chip's leakage and SRAM performance is studied. It's found that the big corner can reduce about 9% chip leakage and also improve SRAM performance. This can expand device window and improve product's yield stability.
author_names: Lin Gu
title: A Novel Method for STI Top Corner Rounding by Etch Process to Improve Leakage and SRAM Performance
venue: 2019 China Semiconductor Technology International Conference (CSTIC)
year: 2019

abstract: We have investigated the rounding of micron sized trenches fabricated on Si(001) substrates during annealing in hydrogen ambient in a temperature range of 1000 to 1100 degC, especially the effect of hydrogen pressure on the rate of rounding. Observing the profiles of the trenches annealed under hydrogen pressures from 10 up to 760 Torr by scanning electron microscopy, we have found that the rate of corner rounding decreases with increasing hydrogen pressure. It was also found that these rates of corner rounding are smaller than that during annealing in atmospheric argon ambient. This result suggests that adsorbed hydrogen suppresses the surface self diffusion, by which the corner rounding occurs. We present the contour map of corner curvature in the process parameter space of hydrogen pressure versus annealing temperature for an annealing time of 3 min.
author_names: Hitoshi Kuribayashi

Ryosuke Shimizu

Koichi Sudoh

Hiroshi Iwasaki
title: Hydrogen pressure dependence of trench corner rounding during hydrogen annealing
year: 2004

abstract: A new STI (Shallow Trench Isolation) corner rounding technique with MSTS (Micro Structure Transformation of Silicon) which utilizes Si migration phenomenon with hydrogen ambient annealing is proposed and applied to 0.15 /spl mu/m CMOS technology. Highly controlled corner rounding radius is achieved without high temperature oxidation process. Thus it is free from defect generation and undesirable impurity diffusion in the Si substrate. Subthreshold current due to parasitic corner transistors of the STI structure is effectively suppressed and the reverse narrow channel effect is controlled down to 0.2 /spl mu/m channel width.
author_names: S Matsuda

Tatsuhiro Sato

Hisao Yoshimura

Yoshiyuki Takegawa

A Sudo

Ichiro Mizushima

Yoshitaka Tsunashima

Yoshiaki Toyoshima
title: Novel corner rounding process for shallow trench isolation utilizing MSTS (Micro Structure Transformation of Silicon)
venue: International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)
year: 1998

abstract: In this work, we first establish the relationship between corner leakage and corner rounding through device simulation. Then, we demonstrate a novel method to produce corner rounding, using a post CMP, high temperature re oxidation process (HTR STI) A semi empirical model correlating rounding with re oxidation and nitride mask thickness is derived from mechanical studies. Finally, we show the electrical properties of devices with HTR STI for the 0.18 /spl mu/m technology.
author_names: C -P Chang

Chien-Shing Pai

Frieder H Baumann

C -T Liu

Conor S Rafferty

Mark R Pinto

E J Lloyd

M K Bude

Fred P Klemens

John F Miner

Kin P Cheung

Jennifer I Colonell

Warren Y Lai

Hem M Vaidya

Steven James Hillenius

R C Liu

James T Clemens
title: A highly manufacturable corner rounding solution for 0.18 /spl mu/m shallow trench isolation
venue: International Electron Devices Meeting. IEDM Technical Digest
year: 1997

abstract: The shape transformation mechanism of micron size silicon trenches during high temperature annealing (ges1000degC) in hydrogen ambient was studied, focusing on the effect of hydrogen pressure on the trench corner curvature. Results demonstrated the effectiveness of this hydrogen annealing process on the reliability of gate SiO2 films; after hydrogen annealing at 1030degC for 1 min, the leakage current through trench gate SiO2 as a function of applied voltage to the poly Si gate was suppressed by over 2 orders of magnitude. The time dependent dielectric breakdown (TDDB) characteristics of the trench gate SiO2 under a constant applied stress current of 50mA/cm was significantly improved by hydrogen annealing in the initial stage <100sec) of dielectric breakdown
author_names: Ryosuke Shimizu

Hitoshi Kuribayashi

Reiko Hiruta

Koichi Sudoh

Hiroshi Iwasaki
title: Mech1anism and Control Technology of Trench Corner Rounding by Hydrogen Annealing for Highly Reliable Trench MOSFET
venue: 2006 IEEE International Symposium on Power Semiconductor Devices and IC's
year: 2006

abstract: A method of forming a rounded corner in a trench isolation is provided to prevent deterioration of an electric characteristic by forming a uniform rounded corner, regardless of pattern density. A pad oxide layer(22) and a pad nitride layer(24) are formed on a semiconductor substrate(20) A photoresist is formed on the pad nitride, and then is selectively etched to form a trench photoresist pattern. The pad oxide layer and the pad nitride layer are etched by using the trench photoresist pattern as an etch stop layer to expose the substrate corresponding to the trench photoresist pattern. A buffer oxide layer is formed on the exposed substrate, and the substrate is implanted with nitrogen ion to form a nitrogen ion implanted layer. The nitrogen ion implanted layer is diffused towards a side and bottom surface of the substrate to form a nitride layer. After the buffer oxide layer and the nitride layer are removed, the substrate is etched to form a trench(25) having a rounded corner.
title: Method for forming corner rounding in trench isolation
year: 2006

abstract: A new trench corner rounding technique has been developed by using pull back and hydrogen annealing process. This technique provides highly controllable trench corner rounding by micro structure transformation of silicon at the corner of the trench, leading to uniform gate oxide, higher breakdown voltage, and lower leakage current.
author_names: Sang-Gi Kim

Jongdae Kim

Jin Gun Koo

Kee Soo Nam

Kyoung Ik Cho
title: Trench corner rounding technology using hydrogen annealing for highly reliable trench DMOSFETs
venue: 12th International Symposium on Power Semiconductor Devices ICs. Proceedings (Cat. No.00CH37094)
year: 2000

abstract: Shallow Trench Isolation (STI) technology is important for realizing high speed and high packing density complementary metal oxide semiconductor very large scale integrated (CMOS VLSI) technologies. To obtain top corner rounding in STI, a new process was evaluated. This technique utilizes Si soft etching by O2+CF4 plasma following pad oxide shift in dilute hydrofluorine (HF) solution after STI formation, which effectively suppresses subthreshold slope (hump) for n and p channel devices even when 4 V of substrate bias is applied. This technique also does not cause top corner rounding (TCR) imbalance between narrow and wide spaces caused by the conventional sidewall generation technique in pad nitride etching. This new STI formation method markedly improves STI top corner rounding. As a result, it has been found that this technique is very effective for sub 0.18 um STI formation.
author_names: Seong-Yeol Mun

Kyeong Cheol Shin

Ki chae Yoon

Jong Seok Kwak

Hyukhyun Ryu

Yang Hee Jeong
title: Shallow Trench Isolation Top Corner Rounding Using Si Soft Etching Following Diluted Hydrofluorine Solution
year: 2004