Search query: Strain relaxation in semiconductor wafer bonding

Related papers:

abstract: The strain relaxation process in wafer bonded semiconductor heterostructures is numerically investigated, in contrast to those formed by epitaxial growth. A kinetic model of strain relaxation in semiconductor layers is re established for highly lattice mismatched heterostructures. Numerical simulations are then performed by using the model to analyze the time evolution of the strain, the strain rate, and the misfit dislocation density. The calculation results present a slow strain relaxation behavior in the lattice mismatched heterostructures wafer bonded at lower temperatures than those for epitaxial growth, to suppress the thermodynamically preferred dislocation generation by sustaining the material system at a metastable state. The time constant of strain relaxation in a typical range of wafer bonding temperatures, normalized by the melting temperature, of 0.2 0.4 is found to be 3 x 105 2 x 1021 s for a lattice mismatch of 0.04. This relaxation time contrasts with 14 s for the case of heteroepitaxy at a typical normalized temperature of 0.6, thus evidencing the nonequilibrium crystalline stability in wafer bonding.
author_names: Katsuaki Tanabe
title: Strain relaxation in semiconductor wafer bonding
year: 2021

abstract: Changes in the strain relaxation of semiconductor films due to growth on a thin epitaxial template bonded via a borosilicate glass to a mechanical handle wafer have been observed. Akinetic analysis of the mechanical decoupling between the film/template heterostructure and the handle wafer is developed in order to estimate and evaluate the contribution of glass viscous deformation to the observed strain relaxation. The thickness and elastic constants of the template and film, the thickness and viscosity of the bonding media, and the lateral dimension of the bonded structure are included in this model. Based on this model, the viscous flow of the glass is unlikely to have played a role in previous observations of changes in film strain relaxation due to growth on glass bonded substrates. The calculations are used in conjunction with simple expressions for the temperature and composition dependence of borosilicate glass viscosity to result in design guidelines for substrate structures and annealing schedules in which the viscous flow of a borosilicate glass will contribute to the strain relaxation of a lattice mismatched film.
author_names: Peter D Moran

Thomas F Kuech
title: Kinetics of strain relaxation in semiconductor films grown on borosilicate glass bonded substrates
year: 2001

abstract: Elastically strain relaxed GaAs/In0.08Ga0.92As/GaAs heterostructures on GaAs(001) substrates were fabricated. Pseudomorphic heterostructures grown by MOCVD were patterned using conventional photolithography and a sacrificial AlAs layer was removed by selective etching. As etching proceeds and the GaAs/InGaAs/GaAs structure is released from the substrate, elastic strain relaxation occurs and the strain relaxed structures are weakly bonded in place to the substrate. The bond between the strain relaxed structure and the substrate was then strengthened by annealing under conditions similar to those used for whole wafer bonding of GaAs. The strain, composition and thickness of the layers were determined using high resolution X ray diffraction and the sample surface quality was examined using atomic force microscopy. The degree of strain relaxation of the InGaAs layer is determined by the relative thickness of the GaAs and InGaAs layers in agreement with a force balance model. The increase in the in plane lattice parameter of the bonded GaAs/In0.08Ga0.92As/GaAs structures as compared to GaAs is 0.25 0.44%
author_names: D Lloyd Owen
title: IN PLACE BONDING OF III V SEMICONDUCTOR HETEROSTRUCTURES
year: 2009

abstract: We have recently found a novel and significant application for the wafer bonding technology. We demonstrated that by bonding an ultra thin layer of semiconductor to a bulk crystal with a rotational angle along their surface normal, this new structure can achieve interesting behaviors as a compliant substrate. When heteroepitaxial layers are grown on such twist bonded substrates, the bonded thin layer is plastically deformed to relax the strain before threading dislocations are nucleated in the heteroepitaxial layer. This is a new and energetically more favorable way for lattice strain relaxation and is unique to the twist bonded structure. We found that this concept can be applied to many semiconductors such as GaAs and Si to form compliant substrates where heteroepitaxy of exceedingly large lattice mismatch (e.g. 15% can be grown without defects. This implies that twist bonded compliant substrates may, to a large extent, function as a universal substrate for growth of high quality materials of nearly any lattice constant.
author_names: Z H Zhu

Felix Ejeckam

Zhenjun Zhang

Jing-wei Zhang

Yi Qian

Yu-hwa Lo
title: Wafer bonding and its application on compliant universal (CU) substrates
venue: Conference Proceedings. LEOS '97. 10th Annual Meeting IEEE Lasers and Electro Optics Society 1997 Annual Meeting
year: 1997

abstract: Abstract This chapter deals with the monolithic integration of InGaAs semiconductor on (001) oriented Si substrate. This starts with a brief introduction to III V semiconductor epitaxy, the effect of strain, and the relaxation mechanisms. An overview of the different structural defects' families is also included in the section. In a second part, the two most popular III V growth techniques that are molecular beam epitaxy and metal organic vapor phase epitaxy are compared. The main challenge in the heterogeneous integration of InGaAs on Si resides in the material mismatch between both semiconductors that results in the high density generation of crystalline defects. In this chapter, several options such as strain relaxed buffers, wafer bonding, epitaxial lateral growth, and selective area growth have been considered to reduce the defect density in III V compounds on Si, which will be reviewed. Finally, a rich literature completes the chapter.
author_names: C Merckling
title: Monolithic Integration of InGaAs on Si(001) Substrate for Logic Devices
year: 2018

abstract: The fabrication of ultrathin strained silicon directly on insulator is demonstrated and the thermal stability of these films is investigated. Ultrathin ~13 nm) strained silicon on insulator layers were fabricated by epitaxial growth of strained silicon on relaxed SiGe, wafer bonding, and an etch back technique employing two etch stop layers for improved across wafer thickness uniformity. Using 325 nm Raman spectroscopy, no strain relaxation is observed following rapid thermal annealing of these layers to temperatures as high as 950 degC. The thermal stability of these films is promising for the future fabrication of enhanced performance strained Si ultrathin body and double gate metal oxide semiconductor field effect transistors.
author_names: T S Drake

Cait Ni Chleirigh

Minjoo Lawrence Lee

Arthur J Pitera

Eugene A Fitzgerald

Dimitri A Antoniadis

Dalaver Hussain Anjum

Jie-ping Li

Robert Hull

N Klymko

Judy L Hoyt
title: Effect of rapid thermal annealing on strain in ultrathin strained silicon on insulator layers
year: 2003

abstract: In this letter, the relaxation of strained rectangular islands on compliant substrates is used to achieve semiconductor thin films with either uniaxial stress or uniaxial strain in the plane of the film over an area of tens of microns. The work is demonstrated using silicon and silicon germanium alloy single crystal thin films, with uniaxial strain values approaching 1% The biaxially strained SiGe or SiGe/Si films on borophosphorosilicate glass (BPSG) were fabricated by a wafer bonding and layer transfer process. When the viscosity of BPSG drops at high temperatures for short times, films patterned in a rectangular shape can move laterally to relieve stress only in one in plane direction. Thus one can tailor the strain from biaxial to uniaxial in the thin films.
author_names: Haizhou Yin

Rebecca L Peterson

Karl D Hobart

Sean R Shieh

Thomas S Duffy

James C Sturm
title: Tunable uniaxial vs biaxial in plane strain using compliant substrates
year: 2005

abstract: InGaSb on insulator (InGaSb OI) and InAs/InGaAs/InAs on insulator (InAs/InGaAs OI) structures have been realized on Si by a direct wafer bonding (DWB) technology using atomic layer deposition Al2O3. While strain introduced in InGaSb channel layers grown on InAs can enhance the hole mobility of the Sb based channel layers, a difficult issue of fabricating InGaSb OI wafers is to obtain a smooth InGaSb surface, which is mandatory for wafer bonding. In this study, the surface of a 20 nm thick In0.185Ga0.815Sb channel grown on an InAs (100) substrate and an InAs (2.5 nm)/In0.185Ga0.815Sb (20 nm)/InAs (2.5 nm) channel with a 20 nm thick GaSb buffer layer grown on an InAs (100) substrate by metal organic chemical vapor deposition have a root mean square of the surface roughness as low as 0.16 and 0.22 nm, respectively, over a scan area of 10 x 10 mm2, which are smooth enough to employ the wafer bonding. As a result, the fabrication of the InGaSb OI wafers by the DWB and the operation of InGaSb OI p channel metal oxide semiconductor field effect transistors (p MOSFETs) by using the DWB wafers are demonstrated. Also, the performance of InGaSb OI p MOSFETs is found to be improved by inserting ultrathin InAs layers between InGaSb and insulating buried oxide layers. An InGaSb OI and an InAs/InGaAs OI p MOSFET under the accumulation mode operation exhibit a peak mobility of ~161 and ~273 cm2/V s, respectively. The channel hole mobility of the InGaSb OI p MOSFET is higher than that of the GaSb on insulator (GaSb OI) p MOSFET and can exceed that of Si p MOSFETs.InGaSb on insulator (InGaSb OI) and InAs/InGaAs/InAs on insulator (InAs/InGaAs OI) structures have been realized on Si by a direct wafer bonding (DWB) technology using atomic layer deposition Al2O3. While strain introduced in InGaSb channel layers grown on InAs can enhance the hole mobility of the Sb based channel layers, a difficult issue of fabricating InGaSb OI wafers is to obtain a smooth InGaSb surface, which is mandatory for wafer bonding. In this study, the surface of a 20 nm thick In0.185Ga0.815Sb channel grown on an InAs (100) substrate and an InAs (2.5 nm)/In0.185Ga0.815Sb (20 nm)/InAs (2.5 nm) channel with a 20 nm thick GaSb buffer layer grown on an InAs (100) substrate by metal organic chemical vapor deposition have a root mean square of the surface roughness as low as 0.16 and 0.22 nm, respectively, over a scan area of 10 x 10 mm2, which are smooth enough to employ the wafer bonding. As a result, the fabrication of the InGaSb OI wafers by the DWB and the operation of InGaSb OI p channel metal.
author_names: Masafumi Yokoyama

Haruki Yokoyama

Mitsuru Takenaka

Shinichi Takagi
title: InGaSb on insulator p channel metal oxide semiconductor field effect transistors on Si fabricated by direct wafer bonding
venue: Journal of Applied Physics
year: 2019

abstract: Here the novel direct heteroepitaxial growth method of a 3D heteroepitaxial system is demonstrated on a 3D substrate, CdTe (111)/Al2 O3 (0001) which forms a spontaneous vdW like bond at the interface, instead of the two 3D crystals being strongly bound. Despite a large lattice mismatch, the thin films are single crystals and maintain high quality due the compliance of the interface which accommodates strain. This weak bonding interface is accomplished by the self assembly of a pseudomorphic chalcogenide layer on the sapphire surface during growth. Since the vdW like interface forms spontaneously in situ during growth, it is easily scalable to large wafer sizes, without the need to layer transfer 2D materials onto the growth substrate for remote epitaxy. Further, the weak adhesion of the films on the substrates allow for epitaxial film transfer to a variety of other substrates, leaving the original growth substrate for future reuse. This type of 3D/3D vdW like interface is exploitable as a compliant interlayer for additional epitaxy, and may even be observable directly in other material systems grown on complex oxides, allowing for the production of large area high quality freestanding and layer transferred epitaxial devices for material systems not currently possible by conventional processing techniques.
author_names: Stephen M Jovanovic

Hesham M El-Sherif

Nabil Bassim

John Stephen Preston
title: Spontaneous Relaxation of Heteroepitaxial of Thin Films by van der Waals Like Bonding on Te Terminated Sapphire Substrates.
venue: Small
year: 2020

abstract: Different methods to introduce strain in thin silicon device layers are presented. Uniaxial strain is introduced in CMOS devices by process induced stressors allowing the local generation of tensile or compressive strain in the channel region of MOSFETs. Biaxial strain is introduced by growing thin silicon layer on SiGe buffer and transferring it to an oxidized silicon substrates. The latter forms strained silicon on insulator (SSOI) wafer characterized by tensile strain only. Future CMOS device technologies require the combination of the global strain of SSOI substrates with local stressors to increase the device performance.
author_names: Manfred Reiche

O Moutanabbir

Cameliu Himcinschi

Silke H Christiansen

Winfried Erfurth

Ullrich Gosele

Siegfried Mantl

Dan Buca

Q T Zhao

Roger Loo

Danh Nguyen

F Muster

Matthias Petzold
title: Strained Silicon on Wafer Level by Waferbonding: Materials Processing, Strain Measurements and Strain Relaxation
year: 2008