Search query: Neuromorphic architectures for nanoelectronic circuits

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abstract: SUMMARY This paper reviews recent important results in the development of neuromorphic network architectures 'CrossNets' for future hybrid semiconductor=nanodevice integrated circuits. In particular, we have shown that despite the hardware imposed limitations, a simple weight import procedure allows the CrossNets using simple two terminal nanodevices to perform functions (such as image recognition and pattern classication) that had been earlier demonstrated in neural networks with continuous, determin istic synaptic weights. Moreover, CrossNets can also be trained to work as classiers by the faster error backpropagation method, despite the absence of a layered structure typical for the usual neural networks. Finally, one more method, 'global reinforcement' may be suitable for training CrossNets to perform not only the pattern classication, but also more intellectual tasks. A demonstration of such training would open a way towards articial cerebral cortex scale networks capable of advanced infor mation processing (and possibly self development) at a speed several orders of magnitude higher than that of their biological prototypes. Copyright 2004 John Wiley Sons, Ltd.
author_names: Ozgur Turel

Jung Hoon Lee

Xiaolong Ma

Konstantin K Likharev
title: Neuromorphic architectures for nanoelectronic circuits
venue: Int. J. Circuit Theory Appl.
year: 2004

abstract: This paper reviews recent important results in the development of neuromorphic network architectures 'CrossNets' for future hybrid semiconductor/nanodevice integrated circuits. In particular, we have shown that despite the hardware imposed limitations, a simple weight import procedure allows the CrossNets using simple two terminal nanodevices to perform functions (such as image recognition and pattern classification) that had been earlier demonstrated in neural networks with continuous, deterministic synaptic weights. Moreover, CrossNets can also be trained to work as classifiers by the faster error backpropagation method, despite the absence of a layered structure typical for the usual neural networks. Finally, one more method, 'global reinforcement' may be suitable for training CrossNets to perform not only the pattern classification, but also more intellectual tasks. A demonstration of such training would open a way towards artificial cerebral cortex scale networks capable of advanced information processing (and possibly self development) at a speed several orders of magnitude higher than that of their biological prototypes. Copyright (c) 2004 John Wiley Sons, Ltd.
author_names: Ozgur Turel

Jung Hoon Lee

Xiaolong Ma

Konstantin K Likharev
title: Neuromorphic architectures for nanoelectronic circuits: Research Articles
year: 2004

abstract: Memristive and nanoionic devices have recently emerged as leading candidates for neuromorphic computing architectures. While top down fabrication based on conventional bulk materials has enabled many early neuromorphic devices and circuits, bottom up approaches based on low dimensional nanomaterials have shown novel device functionality that often better mimics a biological neuron. In addition, the chemical, structural and compositional tunability of low dimensional nanomaterials coupled with the permutational flexibility enabled by van der Waals heterostructures offers significant opportunities for artificial neural networks. In this Review, we present a critical survey of emerging neuromorphic devices and architectures enabled by quantum dots, metal nanoparticles, polymers, nanotubes, nanowires, two dimensional layered materials and van der Waals heterojunctions with a particular emphasis on bio inspired device responses that are uniquely enabled by low dimensional topology, quantum confinement and interfaces. We also provide a forward looking perspective on the opportunities and challenges of neuromorphic nanoelectronic materials in comparison with more mature technologies based on traditional bulk electronic materials. This Review highlights the progress made towards the development of neuromorphic devices and architectures enabled by low dimensional nanomaterials
author_names: Vinod K Sangwan

Mark C Hersam
title: Neuromorphic nanoelectronic materials
venue: Nature Nanotechnology
year: 2020

abstract: Hybrid "CMOL" integrated circuits, combining CMOS subsystem with nanowire crossbars and simple two terminal nanodevices, promise to extend the exponential Moore Law development of microelectronics into the sub 10 nm range. We are developing neuromorphic network "CrossNet" architectures for this future technology, in which neural cell bodies are implemented in CMOS, nanowires are used as axons and dendrites, while nanodevices (bistable latching switches) are used as elementary synapses. We have shown how CrossNets may be trained to perform pattern recovery and classification despite the limitations imposed by the CMOL hardware. Preliminary estimates have shown that CMOL CrossNets may be extremely dense ~107 cells per cm2) and operate approximately a million times faster than biological neural networks, at manageable power consumption. In Conclusion, we discuss in brief possible short term and long term applications of the emerging technology.
author_names: Jung Hoon Lee

Xiaolong Ma

Konstantin K Likharev
title: CMOL CrossNets: Possible Neuromorphic Nanoelectronic Circuits
venue: NIPS
year: 2005

abstract: This is a concise review of the recent work on devices, circuits and architectures for possible hybrid semiconductor/nanodevice integrated circuits based on nanowire crossbars, with similar, simple, two terminal devices formed at each crosspoint. Special attention is given to the so called "CMOL' variety of the hybrids, in which the crossbar is connected to the underlying CMOS circuit, using an area distributed, pin based interface. Recent detailed studies have shown that digital hybrid circuits may extend the Moore's Law progress of integrated circuits for 10 to 15 years. Even more impressive, mixed signal neuromorphic networks "CrossNets" may provide unparalleled performance for some important information processing tasks, and in future may become the first hardware basis for challenging the mammal cerebral cortex in density, far exceeding it in speed, at manageable power consumption. Recently, the hybrid circuit concept received a strong boost from the experimental demonstrations of reproducible crosspoint devices (latching switches) based on amorphous silicon and metal oxides, and of nanowire crossbars with 15 nm scale half pitch. However, CMOL technology still faces several significant challenges, briefly discussed in the last section.
author_names: Konstantin K Likharev
title: Hybrid CMOS/Nanoelectronic Circuits: Opportunities and Challenges
year: 2008

abstract: Hybrid "CMOL" integrated circuits, incorporating advanced CMOS devices for neural cell bodies, nanowires as axons and dendrites, and single molecule latching switches as synapses, may be used for the hardware implementation of extremely dense ~107 cells and ~1012 synapses per cm2) neuromorphic networks, operating up to 106 times faster than their biological prototypes. We are exploring several "CrossNet" architectures that accommodate the limitations imposed by CMOL hardware and should allow effective training of the networks without a direct external access to individual synapses. CrossNet training in the Hopfield mode have been confirmed on a software model of the network.
author_names: Ozgur Turel

Konstantin K Likharev
title: CrossNets: Neuromorphic Networks for Nanoelectronic Implementation
venue: ICANN
year: 2003

abstract: Our group is developing neuromorphic network architectures for future hybrid semiconductor/nanowire/molecular "CMOL" circuits. Estimates show that such networks "CrossNets" may eventually overcome the cerebral cortex in areal density, operating at much higher speed, at acceptable power consumption. In this report, we demonstrate that CrossNets based on simple (two terminal) molecular devices can be configured to reproduce the behavior of any known neural network, either feedforward or recurrent, using a synaptic weight import procedure. Two other training methods including the global reinforcement (that may enable CrossNets to perform more intelligent tasks) are also described in brief.
author_names: Ozgur Turel

Jung Hoon Lee

Xiaolong Ma

Konstantin K Likharev
title: Nanoelectronic neuromorphic networks (CrossNets) new results
venue: 2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541)
year: 2004

abstract: Memristors are novel non volatile devices that manage to combine storing and processing capabilities in the same physical place. Their nanoscale dimensions and low power consumption enable the further design of various nanoelectronic processing circuits and corresponding computing architectures, like neuromorphic, in memory, unconventional, etc. One of the possible ways to exploit the memristor's advantages is by combining them with Cellular Automata (CA) CA constitute a well known non von Neumann computing architecture that is based on the local interconnection of simple identical cells forming N dimensional grids. These local interconnections allow the emergence of global and complex phenomena. In this paper, we propose a hybridization of the CA original definition coupled with memristor based implementation, and, more specifically, we focus on Memristive Learning Cellular Automata (MLCA) which have the ability of learning using also simple identical interconnected cells and taking advantage of the memristor devices inherent variability. The proposed MLCA circuit level implementation is applied on optimal detection of edges in image processing through a series of SPICE simulations, proving its robustness and efficacy.
author_names: Rafailia-Eleni Karamani

Iosif-Angelos Fyrigos

Vasileios G Ntinas

Orestis Liolis

Giorgos Dimitrakopoulos

Mustafa Altun

Andrew Adamatzky

Mircea R Stan

Georgios Ch Sirakoulis
title: Memristive Learning Cellular Automata: Theory and Applications
venue: 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST)
year: 2020

abstract: Non Boolean computing based on emerging postCMOS technologies can potentially pave the way for low power neural computing platforms. However, existing work on such emerging neuromorphic architectures have either focused on solely mimicking the neuron, or the synapse functionality. While memristive devices have been proposed to emulate biological synapses, spintronic devices have proved to be efficient at performing the thresholding operation of the neuron at ultra low currents. In this work, we propose an All Spin Artificial Neural Network where a single spintronic device acts as the basic building block of the system. The device offers a direct mapping to synapse and neuron functionalities in the brain while inter layer network communication is accomplished via CMOS transistors. To the best of our knowledge, this is the first demonstration of a neural architecture where a single nanoelectronic device is able to mimic both neurons and synapses. The ultra low voltage operation of low resistance magneto metallic neurons enables the low voltage operation of the array of spintronic synapses, thereby leading to ultra low power neural architectures. Device level simulations, calibrated to experimental results, was used to drive the circuit and system level simulations of the neural network for a standard pattern recognition problem. Simulation studies indicate energy savings by ~400x in comparison to a corresponding digital/ analog CMOS neuron implementation.
author_names: Abhronil Sengupta

Yong Shim

Kaushik Roy
title: Proposal for an All Spin Artificial Neural Network: Emulating Neural and Synaptic Functionalities Through Domain Wall Motion in Ferromagnets
venue: IEEE Transactions on Biomedical Circuits and Systems
year: 2016

abstract: Since CMOS technology approaches its physical limits, the spotlight of computing technologies and architectures shifts to unconventional computing approaches. In this area, novel computing systems, inspired by natural and mostly nonelectronic approaches, provide also new ways of performing a wide range of computations, from simple logic gates to solving computationally hard problems. Reaction diffusion processes constitute an information processing method, occurs in nature and are capable of massive parallel and low power computing, such as chemical computing through Belousov Zhabotinsky reaction. In this paper, inspired by these chemical processes and based on the wave propagation information processing taking place in the reaction diffusion media, the novel characteristics of the nanoelectronic element memristor are utilized to design innovative circuits of electronic excitable medium to perform both classical (Boolean) calculations and to model neuromorphic computations in the same Memristor RLC (M RLC) reconfigurable network.
author_names: Iosif-Angelos Fyrigos

Vasileios G Ntinas

Georgios Ch Sirakoulis

Andrew Adamatzky

Victor V Erokhin

Antonio Rubio
title: Wave Computing with Passive Memristive Networks
venue: 2019 IEEE International Symposium on Circuits and Systems (ISCAS)
year: 2019