Search query: Resistivity Measurements on Germanium for Transistors

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abstract: This paper discusses a laboratory method which has been found very useful for measuring the resistivity of the semiconductor germanium. The method consists of placing four probes that make contact along a line on the surface of the material. Current is passed through the outer pair of probes and the floating potential is measured across the inner pair. There are seven cases considered, the probes on a semi infinite volume of semiconductor material and the probes near six different types of boundaries. Formulas and curves needed to compute resistivity are given for each case.
author_names: L B Valdes
title: Resistivity Measurements on Germanium for Transistors
venue: Proceedings of the IRE
year: 1954

abstract: This paper discusses a laboratory method which has been found very useful for measuring the resistivity of the semiconductor germanium. The method consists of placing four probes that make contact along a line on the surface of the material. Current is passed through the outer pair of probes and the floating potential is measured across the inner pair. There are seven cases considered, the probes on a semi infinite volume of semiconductor mate1ial and the probes near six different types of boundaries. Formulas and curves needed to compute resistivity are given for each case.
author_names: L B VALDESt
title: Resistivity Measurements on Germanium for Transistors*
year: 2006

abstract: A three terminal dc measurement is made of avalanche multiplication of holes injected from the emitter into the collector junction of diffused base germanium p n p transistors. The method is applicable to asymmetric thin base transistors at currents at which dc base current is independent of base width when emitter to base voltage (V EB is held constant. Injected collector current and V EB are measured at constant emitter current as a function of collector to base voltage (V) V EB is measured to take base narrowing into account. Collector reverse current is balanced out. The advantages of this method over two terminal measurements are that surface, space charge recombination and internal field emission currents are balanced out and no a priori assumption of the form of the multiplication factor M(V) is needed. For collector barriers which are nearly step n^}p junctions with the p type resistivity in the neighborhood of 1 ohm cm, the multiplication data, which cover the range 1.05 \siml M \siml 2.0 fit the Miller equation M^ 1} 1 (V/V_{B}{n} n 3.2 \pm 0.2 in agreement with Miller's two terminal measurements using alloy and grown junction Ge transistors. The parameters V B from extrapolation of the present data agree within experimental error of five per cent with the collector diode breakdowns BV CBO measured by Miller. However, in the present measurements on diffused base transistors, appreciable surface current multiplication occurs with the result that BV CBO measured at 1 ma is approximately 18 per cent less than V B The absence of microplasma noise in the multiplied injected hole current indicates that multiplication occurs uniformly in the collector barrier under the emitter at least to M 2
author_names: Alan B Kuper
title: Measurement of avalanche multiplication of injected holds in germanium p n p diffused base transistors
year: 1964

abstract: This quarterly progress report, thirteenth of a series, describes NBS activities directed toward the development of methods of measurement for semiconductor materials, process control, and devices. Significant accomplishments during this reporting period include the disclosure of substantial differences in measurements of transistor delay time, a device characteristic frequently used as a screen in radiation hardness assurance tests, as measured with two different instruments; successful application of the infrared response technique to the study of radiation damaged, lithium drifted silicon detectors; and identification of a condition that minimizes wire flexure and reduces the failure rate of wire bonds in transistors and integrated circuits under slow thermal cycling conditions. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold doped silicon; specification of germanium for gamma ray detectors; evaluation of wire bonds and die attachment; measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes; and characterization of silicon nuclear radiation detectors. Supplementary data concerning staff, standards committee activities, technical services, and publications are included as appendixes.
author_names: W Murray Bullis
title: Methods of Measurement for Semiconductor Materials, Process Control, and Devices: Quarterly Report, July 1 to September 30, 1969
year: 2017

abstract: Single crystalline germanium nanowires were synthesized via vapor liquid solid mechanism. The characteristics of the Ge nanowires were investigated by a transmission electron microscope to identify the [111] growth direction. The Ge nanowire based field effect transistors on Si3N4 dielectrics were fabricated, showing a p type semiconducting behavior with hole mobility of 47.03 cm2 V 1 s 1. The formation of Cu3Ge/Ge/Cu3Ge nanoheterostructures was demonstrated with the reaction between copper contacts and Ge nanowires by rapid thermal annealing. The diameter dependent electrical transport property of Ge nanowires indicates that with diameters of more than 80 nm, the resistivity of Ge nanowires decreased with diameter decrease, while with diameters of less than 80 nm, it increased. With multiple annealing processes, the channel length of the Ge nanowire transistors can be successfully controlled. From electrical measurements of each annealing step, the electrical transport property was significantly improved by sequential formation of Cu3Ge contacts. The gradual formation of the germanide structure reduces Fermi level pinning effect and increases the Ohmic behavior of electrical transportation.
author_names: Shan-Chun Hsu

Cheng-Lun Hsin

Chun-Wei Huang

Shih-Ying Yu

Chun Wen Wang

Chi-Ming Lu

Kuo-Chang Lu

Wen-Wei Wu
title: Single crystalline Ge nanowires and Cu3Ge/Ge nano heterostructures
year: 2012

abstract: The problematics of contacts optimization on germanium metal oxide semiconductor field effect transistors suffers from a gap between fundamental studies and the structures obtained after full processing. The contact properties of metals on Ge were so far mostly investigated on weakly n doped samples under the pure thermionic emission regime. These experimental conditions are suitable for an accurate extraction; the measured Schottky barrier height (SBH) being usually large and linked to the interfacial current density by a relatively simple Arrhenius relationship. However, a device oriented approach would consist in meeting the contact resistivity requirements in the ohmic regime for metallic contacts on a highly doped semiconductor (e.g. doped source and drain) through the choice of metal, interface preparation, and doping conditions. We hereby detail SBH extractions based on contact resistance (R co measurements on highly n and p doped Ge, where the predominant tunnel current component results in ohmic behavior. We applied this methodology to our fully processed germanium on insulator (GeOI) samples with Ti based contacts, yielding effective barriers of 0.32 eV for electrons and 0.15 eV for holes. The method provides a good physical understanding of the technological factors impacting the electrical properties, enabling to define paths toward ohmic contact optimization in the context of device integration on GeOI.
author_names: Louis Hutin

Cyrille Le Royer

Claude Tabone

V Delaye

F Nemouchi

F Aussenac

Laurent Clavelier

Maud Vinet
title: Schottky Barrier Height Extraction in Ohmic Regime: Contacts on Fully Processed GeOI Substrates
year: 2009

abstract: This paper presents a comprehensive study of the effects of heavy doping and germanium in the base on the dc performance of Si/Si/sub 1 x/Ge/sub x//Si npn Heterojunction Bipolar Transistors (HBTs) The lateral drift mobility of holes in heavily doped epitaxial SiGe bases affects the base sheet resistance while the effective bandgap is crucial for the vertical minority carrier transport. The devices used in this study were Si/sub 1 x/Ge/sub x/ npn HBTs with flat Ge and B profiles in the base grown by Rapid Thermal Chemical Vapor Deposition (RTCVD) Hall and drift lateral hole mobilities were measured in a wide range of dopings and Ge concentrations. The drift mobility was indirectly measured based on measured sheet resistivity and SIMS measurements, and no clear Ge dependence was found. The Hall scattering factor is less than unity and decreases with increasing Ge concentration. The effective bandgap narrowing, including doping and Ge effects, was extracted from the room temperature collector current measurements over a wide range of Ge and heavy doping for the first time. We have observed bandgap narrowing due to heavy base doping which is, to first order, independent of Ge concentration, but less than that observed in silicon, due to the effect of a lower density of states. A model for the collector current enhancement with respect to Si devices versus base sheet resistance is presented.
author_names: Z Matutinovic-Krstelj

Vivek Venkataraman

Erwin J Prinz

James C Sturm

Charles W Magee
title: Base resistance and effective bandgap reduction in n p n Si/Si/sub 1 x/Ge/sub x//Si HBTs with heavy base doping
year: 1996

abstract: This paper presents a comprehensive study of the effects of heavy doping and germanium in the base on the dc performance of Si/Sil 2 Ge,/Si npn Heterojunction Bipolar Transistors (HBT's) The lateral drift mobility of holes in heavily doped epitaxial SiGe bases affects the base sheet resistance while the effective bandgap is crucial for the vertical minority carrier transport. The devices used in this study were Sil ,Ge, npn HBT's with flat Ge and B profiles in the base grown by Rapid Thermal Chemical Vapor Deposition (RTCVD) Hall and drift lateral hole mobilities were measured in a wide range of dopings and Ge concentrations. The drift mobility was indirectly measured based on measured sheet resistivity and SIMS measurements, and no clear Ge dependence was found. The Hall scattering factor is less than unity and decreases with increasing Ge concentration. The effective bandgap narrowing, including doping and Ge effects, was extracted from the room temperature collector current measurements over a wide range of Ge and heavy doping for the first time. We have observed bandgap narrowing due to heavy base doping which is, to first order, independent of Ge concentration, but less than that ob served in silicon, due to the effect of a lower density of states. A model for the collector current enhancement with respect to Si devices versus base sheet resistance is presented.
author_names: Vivek Venkataraman

Erwin J Prinz

James C Sturm

Charles W Magee
title: Base Resistance and Effective Bandgap Reduction in n p n Si/Sil ,Ge,/Si HBT's with Heavy Base Doping
year: 1996

abstract: Abstract An investigation was made for developing a process for depositing device quality silicon and/or germanium films on glazed polycrystalline insulating substrates by vacuum evaporation of silicon and/or germanium and to form thin film diodes and transistors in these films. The silicon depositions were carried out for the control of n type doping, Hall measurements, improvement of crystallinity by annealing and by electron beam heating, and fabrication of improved diodes and transistors. Diodes with ohmic contacts were made with reverse breakdowns of 15 to 60 volts. The apparatus for Hall and resistivity measurements was improved, resulting in reliable and reproducible data on mobilities and carrier concentrations. The patterns for the Hall resistivity silicon deposition mask and the photoresist mask were changed so that both resistivity and Hall measurements could be made in a single operation. Improved crystalline quality in silicon thin films has been obtained through high temperature annealing. Initial vacuum deposited films exhibited increased grain size and Laue spots. (Author)
author_names: Egons Rasmanis

James P Cline
title: ACTIVE THIN FILM TECHNIQUES MICROMIN PROGRAM.
year: 1963

abstract: Germanium(Ge) has attractive properties such as high carrier mobility, compatibility with high K dielectrics, and lattice matched for GaAs growth. Germanium on insulator (GOI) (1) offers the advantages of germanium and combines them with those of silicon on insulator (SOI) Bonding to substrates which are thermally matched to Ge eases process temperature constraints and can have additional benefits depending on the substrate used. Transistors have previously been reported on a germanium on sapphire wafer bonded platform (2) Fine grain alumina offers a cheaper alternative to sapphire while still retaining advantages such as low substrate losses and better crosstalk suppression. In this work Circular Geometry MOS transistors fabricated and tested on germanium bonded to a fine grain alumina substrate (superstrate 997) are presented. The Ge on Alumina substrate was realised by bonding a polysilicon coated and subsequently planarised alumina substrate to a Umicore 2.7 2.9 ohmcm n Ge substrate(3) After subsequent bond strength annealing at 150 C the Ge was thinned by precision in house grinding and diamond particulate polishing leaving a thick 100mm Ge on Alumina layer. The ground and polished substrate is shown in figure 1. Circular geometry transistors were fabricated using a low temperature self aligned W gate fabrication process. The maximum temperature seen by the transistors was 450 C. The transistors having a W/L of 9 also employed a 20nm APCVD silicon dioxide layer as the gate dielectric. As a direct comparison identical transistors where fabricated on bulk Ge substrates with the same resistivity as the bonded structure. Figure 2 shows the resultant output characteristics obtained from both the bulk Ge device (2(a) and the Ge on Alumina device (2(b) As can be seen the bulk Ge showed better transistor characteristics exhibiting an effective mobility of 480 cm/Vs compared to 150cm/Vs. The Ge on Alumina substrate also shows significant series resistance. The decline in device performance was thought to be due to the poor surface roughness of the Ge on Al layer after polishing. It was found that by the addition of NaOCL into the polish process an improvement in the surface roughness of germanium was achieved from 2.5nm to 0.8nm. Subsequently transistors fabricated on the improved reworked Ge layer produced improved characteristics comparable to those obtained in bulk Ge. Characteristics shown in figure 3 exhibit an effective mobility of 414 cm/Vs Low temperature investigation of the transistor operation on the Ge on Al devices was carried out over a range of temperatures from room temperature to 173 K on transistors having a W/L of 9. A MDC model 441 cryogenic probe station in combination with Agilent B1500 parameter analyser was employed for low temperature measurement. Device characteristics were seen to improve with an increase in effective mobility (meff) and decrease in Sub threshold slope (S) observed with decreasing temperature. The improvement in transistor effective mobility is shown in figure 4. Table 1 offers a summary of the change in device characteristics with decreasing temperature.
author_names: Paul Baine

Yee H Low

Paul Rainey

Harold S Gamble

Mervyn Armstrong

N Mitchell

David W McNeill
title: Circular Geometry Transistors Fabricated on Germanium on Alumina Bonded Substrates
year: 2010