Search query: introduction to Different Types of Inverters

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abstract: This paper presents a review and analysis of multilevel inverter topologies. Multilevel inverters are most widely used for medium voltage high power converter like fans, pumps and material transport drives. In this active area, different inverter topologies, circuits, advantages and drawbacks are discussed. Multilevel Inverter topologies such as diode clamped, flyingcapacitor, cascaded H bridge, hybrid H bridge, new hybrid H bridge and new cascaded multilevel inverter have been discussed in the literature. In this work a new idea is developed to increase the level with less number of switches. It is concluded that the topologies are closely related to each particular application, depending on their unique features and limitations like power or voltage level, performance, reliability, costs and other technical specifications. I .INTRODUCTION Numerous industrial applications have began to require higher power apparatus in recent years. Some medium voltage motor drives and utility applications require medium voltage and MW power level. For a medium voltage grid, it is troublesome to connect one power semiconductor switch directly. The application of ac variable frequency speed regulations are widely popularized high power and medium voltage inverter has recently become a research focus so far as known there are many problems in conventional two level inverter in the high power application. Multilevel inverter have been gained more attention for high power application in recent years which can operate at high switching frequencies while producing lower order harmonic components[1] [6] A multilevel inverter not only achieves high power ratings, but also enables the use of renewable energy sources. Renewable energy sources such as photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel inverter system for a high power application [7] [12] There are several topologies such as neutral point clamped inverter, flying capacitor based multilevel, cascaded H bridge multilevel inverter, hybrid H bridge multilevel inverter and new hybrid H bridge multilevel inverter [13] [15] Figure 1 shoes the various multilevel inverter topologies. This paper discusses the operation of different topologies for multilevel inverter which can produce multilevel; under this condition neutral point clamped multilevel inverter is presented, which has a simple structure and good performance .This topology effectively reduce the higher input dc voltage that each device must withstand. The main disadvantage still exists in this topology, which restricts the use of it to the high power range of operation [16] [20] The first topology introduced is the series H bridge design [21] [22] from this several configurations have been obtained. This topology consists of series power conversion cells which form the cascaded Hbridge multilevel inverter and power levels may be scaled easily. An apparent disadvantage of this topology is the large number of isolated voltage required to supply each cell. By using H bridge power conversion cells several topologies are developed and their advantages and disadvantages are discussed. The proposed topology for multilevel inverter has a high number of steps associated with a low number of power switches. In addition for producing all levels at the output voltage, a procedure for calculating the required dc voltage source is proposed. Figure 1.Types of Multilevel Inverter Topologies II.DIODECLAMPED MULTI LEVEL INVERTER: A three phase six level diode clamped inverter is shown in figure.2. Each of the three phases of the inverter shares a common dc bus, which has been subdivided by five capacitors into six levels. The voltage across each capacitor is Vdc and the voltage stress across each switching device is limited to Vdc through the clamping diodes. This involves the (n 1) main dc link capacitors and also S (2n 2) clamping diodes, where n number of levels. For DCMLI requires a large number of clamping devices as 2n 2. Each phase has five complementary switch pairs such that turning on, one of the switches of the pair require that the other complementary switch be turned off. The complementary switch pairs for phase leg a are (Sa1, Sa'1) (Sa2, Sa'2) (Sa3, Sa'3) (Sa4, Sa'4) and (Sa5, Sa'5) The figure.3 shows the line voltage waveform of a fifteen level diode clamped multilevel inverter. The main advantages are the entire phases share a common dc bus, which minimizes the capacitance requirements of the converter. For this reason, a back to back topology is not possible and can be practically used for a highvoltage back to back inter connection or an adjustable speed drive. The capacitors can be precharged as a group and efficiency is high for fundamental frequency switching. The main draw backs are real power flow is difficult for a single inverter because the intermediate dc levels will tend to overcharge or discharge without precise monitoring and control. The number of clamping diodes required is quadratically related to the number Murugesan et al. International Journal of Advanced Engineering Technology E ISSN 0976 3945 Int J Adv Engg Tech/Vol. VII/Issue I/Jan. March.,2016/149 155 of levels, which can be cumbersome for units with a high number of levels [23] [30] Figure 2. Three phase diode clamped multilevel inverter Figure 3. Line voltage waveform of diode clamped multilevel inverter III.FLYING CAPACITOR BASED MULTILEVEL INVERTER: The FCMLI requires a large number of capacitors to clamp the device (switch) voltage to one capacitor voltage level provided all the capacitors are of equal value, an n level inverter will require a total number of (n 1)(n 2)/2 clamping capacitors per phase leg in addition to (n 1) main dc bus capacitors. Figure.4 shows the three phase six level flying capacitor based multilevel inverter. Let us consider the group of capacitors in a single clamping leg as one equivalent capacitor, which is also applicable for 'n' level inverter. If the voltage of the main dc link capacitor is Vdc, the voltage of inner most capacitor, the inner most two devices is Vdc/ (n 1) The voltage of the inner most capacitor will be Vdc/ (n 1) Vdc/ (n 1) 2Vdc/ (n 1) and so on. Each next clamping capacitor will have the voltage increment of Vdc/ (n 1) from its immediate inner one voltage levels. The arrangements of the flying capacitors in the FCMLI structure assures that the voltage stress across each main device is same and is equal to Vdc/ (n 1) for an 'n' level inverter. The advantages of this topology are phase redundancies are available for balancing the voltage levels of the capacitors, real and reactive power flow controlled. Figure 4. Three phase Flying Capacitor based Multilevel Inverter The large number of capacitors enables the inverter to ride through short duration outages and deep voltage sags. The main draw back of this topology is complicated to track the voltage levels for all of the capacitors. Also the pre charging of all the capacitors to the same voltage level and startup are complex. Switching utilization and efficiency are poor for real power transmission. The large numbers of capacitors are more expensive and bulky than clamping diodes in multilevel diode clamped converters. Packaging is also difficult in inverters with a high number of levels [31] [40] The figure.5 shows the line voltage waveform of a fifteen level diode clamped multilevel inverter. Figure 5. Line voltage waveform of flying capacitor based multilevel inverter IV.CASCADED H BRIDGE MULTILEVEL INVERTER: The general structure of the cascaded multilevel inverter for single phase is shown in figure 6. Each of the separate voltage source (Vdc1, Vdc2, Vdc3) connected in cascade with other sources via a special H bridge circuit associated with it. Each of the circuit consists of four active switching elements that can make the output voltage source in positive or negative polarity; or it can be simply zero volts depending on the switching condition of the switches in the circuit. A conventional multilevel power inverter topology employs multiple/link voltage of equal magnitudes. It is fairly easy to generalize the number of distinct levels. [41][55] Figure 6.Topology for Cascaded H Bridge Multilevel
author_names: M Murugesan

R Pari

R Sivakumar

S Sivaranjani
title: DIFFERENT TYPES OF MULTILEVEL INVERTER TOPOLOGIES A TECHNICAL
year: 2016

abstract: Since the introduction of the power electronic power supplies, the electrical insulation of low voltage motors faces new hazards. Especially the primary insulation of the magnet wire is endangered due to the use of frequency inverters. As an effect, partial discharges may appear causing degradation of the electrical insulation to lead finally to a premature breakdown of the machine. This study shows the impact of ozone, generated during partial discharge activity, on the lifespan of samples used to model the winding of the machine. Different types of magnet wires, composed of different enamel polymer, both conventional and corona resistant, were tested in this paper. The results state that the mean time to failure is up to 25% shorter if the ozone is not evacuated from the test chamber and samples are exposed to its degrading properties. This is the case for close machines, in which the air embedded between the stator and the rotor and within the slot is not ventilated, thus allowing ozone to accumulate to significant concentrations.
author_names: Mateusz Szczepanski

David Malec

Pascal Maussion

Benoit Petitgas

Philippe Manfe
title: Ozone concentration impact on the lifespan of enameled wires (conventional and corona resistant) for low voltage rotating machines fed by inverters
venue: 2017 IEEE Electrical Insulation Conference (EIC)
year: 2017

abstract: Performance of any digital control scheme applied to inverters, or any other power electronic structures, can significantly suffer due to time delays. These time delays can be linear and nonlinear. An example of a linear delay is the delay due to sampling, control calculation and application of the new voltage state, which results in a constant delay present in each control cycle. An example of a non linear delay is the inverter dead time, which is different depending on the selected switching state and the direction of the load current. Both types of delays are well known and are addressedin literature. At the same time, the known solutions result in significantly more complicated hardware and/or software implementations. Introduction of MPC to power electronics gives a new and unique opportunity to compensate for both types of the delays in a clear and effective way. This can be done by including the delays, both linear and non linear, in the model predictions. As an illustration, this paper presents an MPC based design of closed loop current control with linear delay compensation for voltage source inverters. The paper also proposes a variable rate MPC based voltage modulator which combines harmonic suppression with inverter dead time compensation. The main points of the paper are illustrated by extensive simulation and experimenal results.
author_names: Galina Mirzaeva

Graham C Goodwin

Christopher David Townsend
title: Dealing with linear and nonlinear time delays under model predictive control of power electronic inverters
venue: 2016 IEEE International Conference on Automatica (ICA ACCA)
year: 2016

abstract: The paper explains about general introduction to the inverter, different types of inverter and applications of the inverters in the various fields. Dual Buck Full Bridge Inverter topology, different PWM switching methods with description, design of DBFBI and selection of switching devices are discussed in the present chapter. On the other hand, this paper also states the implementation of SIMULINK blocks of Dual Buck Inverter with PWM control unit, results obtained and discusses the analysis of various results. Also, the results obtained from simulation work are analyzed. Total harmonic distortion present in the AC output current under different bipolar PWM methods is calculated. Few important conclusions drawn out of the present project work and scope for the future work
author_names: Varsha Thakur

Rakesh Nalgonda

Mohammed Azam Mohammed Dastagir

Akshatha Arjun Babu Naidu
title: New Hybrid PWM technique for dual buck inverter
year: 2019

abstract: Distributed voltage control using \boldsymbol{Q}\boldsymbol{U} characteristics is a means to facilitate higher penetrations of decentralized generation. However, stability concerns interfere the wider adoption of this technology. Based on a recent introduction of a robust stability criterion for assessment of droop controlled inverters, this paper aims to improve the modeling of the grid from a control engineering point of view. After analyzing the impact of different types of voltage deviation on nodal voltage sensitivity, a more precise grid model is presented using algorithmic differentiation. The derived model is further implemented in a closed loop scheme for a \boldsymbol{Q}\boldsymbol{U} controller. Considering in a first step of evolution solely a single input single output system the existing stability criterion could be improved in terms of accuracy.
author_names: Friederike Thomas

Sebastian Krahmer

Jan Winkler

Peter Schegner

Klaus Robenack
title: On Grid Modeling for Stability Assessment of Droop Voltage Control
venue: 2019 IEEE PES Innovative Smart Grid Technologies Europe (ISGT Europe)
year: 2019

abstract: Among the different types of inverters for the solar power generation, the impedance source (Z Source) inverter finds a significant role due to its boosting characteristics. Since the source for this proposed work is solar energy, the inverter with impedance will give a sufficient level of voltage for the load. The output of the proposed is given to a three phase asynchronous type of motor, which is commonly used by the farmers in their agricultural pumps. Even though the inverter is working under heavy stress due to the output of the Z Source, necessary filter arrangement is made to get smooth alternate energy for running the motor. The entire arrangement is modeled using MATLAB/SIMULINK and the results are analyzed with the help of THD (Total Harmonic Distortion) values of output voltage and current. KEYWORDSSolar energy, Z Source inverter, asynchronous motor, Total Harmonic Distortion INTRODUCTION Nowadays the thirsty for power has increased manifold due to the enormous growth in industries and population. But the resources of traditional or conventional power have been drastically reduced and they may be available for four or five decades of future. Also the abundant use of conventional or non renewable energy resources, various environmental problems like air pollution, water pollution etc have increased and all become a intimidation for the whole human society. Hence the searching for alternate energy has become a timely needed one. Among the various renewable energy sources like solar, thermal, hydro, biomass and wind energy, the solar energy is the most promising one among them. Solar energy is a radian light and heat from the sun that is harnessed using a range of ever evolving technologies such as solar heating, photo voltaic, solar thermal energy, solar architecture, molten salt power plants and artificial photo synthesis. The large magnitude of solar energy availability makes it a highly appealing source of electricity. The United Nations development programme in its world energy assessment found that the annual potential of solar energy was 1600 to 50000 exa joules [EJ] This is several times larger than the total world energy consumption which was 559.8EJ in 2012. The benefits of renewable energy resources reduce the pollution, lower the costs of mitigating global warming keep fossil fuel prices lower. These advantages are global. Solar energy has the greatest potential of all the sources of renewable energy. Also the farmers in our country are facing power problem for their agricultural pumping motors moreover in all seasons in all states. Moreover the price per unit cost of the power also has become a burden for the farmers. Hence the proposed work aims in harnessing solar energy in a prominent way, which will help the farmers and the environment. In this work, an asynchronous machine is made to run by using solar energy with the help of PWM techniques and a 3 phase inverter. The solar energy is dynamic nature, but it is necessary to give a continuous supply for the motor even the solar energy is not inadequate. In this work the solar energy generated by the solar panel, is stepped up by using impedance network. Generally the Z source network consists of two inductors and two capacitors. In the modified Z source network, in addition to two capacitor, one capacitor is added parallel to the source. Added capacitor boosts the voltage from the source and also acts as filter. The hardware results are validated with the analysis of total harmonic distortion of output voltage and current of the three phase inverter. PROPOSED SYSTEM The proposed system with Modified Z source inverter is shown in figure1. Fig 1. Block diagram of the proposed model (c) 2018 JETIR September 2018, Volume 5, Issue 9 www.jetir.org (ISSN 2349 5162) JETIRA006377 Journal of Emerging Technologies and Innovative Research (JETIR) www.jetir.org 338 The primary objective of designing the proposed work is harness the solar energy for the agriculture purposes mainly in the irrigation pumping motors. Present day farmers all over the country are facing numerous problems including power bill due to the irrigation pump motors. In order to find a solution for the above said problem, the work has been proposed. In this proposed work the modified impedance source network is used along with the inverter instead of using the inverter alone. To ensure the boosting of the energy to the inverter, the modified impedance source network is connected parallel to the inverter. The primary source for the inverter is solar energy and pulse width modulator (PWM) controller is used to control the three phase inverter. The alternating three phase energy is fed to the asynchronous motor. The output of the inverter and output of the motor are analyzed by using the MATLAB software with total harmonic distortion values. Solar panel Photovoltaic cells are produced by semiconductor technology to convert solar light energy into electrical energy in the form of Direct Current
author_names: Dr Arulprakash Andigounder

Vijayalakshmi Yarra

Dhanalakshmi Malothu
title: COMPANIONABILITY OF MODIFIED Z SOURCE INVERTER WITH SOLAR POWER GENERATION FOR A 3O ASYNCHRONOUS MOTOR
year: 2018

abstract: In this Modified half bridge and full bridge topologies with continuous input current by using switched boost inverter are proposed. In this paper, the operation of the proposed inverters in different operating modes is analyzed. In addition, these topologies have high boost factor in comparison with conventional types. The proposed topologies have continuous input current and can generate zero voltage level in output. Then, the values of inductors and capacitors are designed. Comprehensive comparison between the proposed and conventional topologies in terms of boost factor, number of elements and efficiency shows in the proposed inverters. Finally, to verify operation of the proposed topologies by simulation. INTRODUCTION: Z source inverter (ZSI) and quasi Z source inverter (QZSI) have been presented. In switched inductor cells have been used in conventional ZSI to increase voltage gain. In this topology based on cascaded switched inductor cells has been used, which is named L Z source inverter (LZSI) The switched inductor Z source inverter (SLZSI) has improved the value of boost factor All presented topologies in use many passive elements. Hence, to reduce the number of passive elements in conventional topologies, switched boost inverter (SBI) has been presented. To improve and develop the characteristic of SBI, current fed switched inverter (CFSI) has been presented. To increase the boost factor in CFSI, developed switched Z source inverter (DSZSI) has been presented. All presented topologies utilize full bridge inverter in their power circuits and also half bridge inverter is possible. Half bridge Z source inverter (HBZSI) iS uses in two impedance networks (Z networks) In for application in electrochemical and electroplating industry and so. The proposed full bridge inverter has eight operating modes. In the first and fifth operating modes, all switches S1,S2,S3 and S4 are ON. So, the proposed fullbridge inverter is in ST state. In other operating modes, only one of the switches on each leg is ON. So, the proposed fullbridge inverter is in nST state. The analysis of proposed half bridge inverter is very similar to analysis of proposed as fullbridge inverter. The value of boost factor in full bridge inverter is equal but voltage stress on capacitors has been decreased by 50% to value of boost factor in half bridge inverter. It is noticeable that by selecting low values for inductance and switching frequency and high value for output load, number of operating modes will be more than eight. In this state, waveform of output voltage in proposed full bridge inverter loses its symmetry state. The proposed inverters have only one voltage source and few passive elements, including one inductor and few capacitors. It is noticeable that the proposed half bridge inverter has six diodes and three high side switches that these numbers are more than some of the conventional topologies. The high side switches of the proposed half bridge inverter can be driven by using bootstrap technique. In a schematic for this purpose is shown. According to this figure, the current follows a specific path to charge the bootstrap capacitor for high side driver. Hence, there is no need for expensive drivers. PROPOSED SYSTEM: The proposed topologies have continuous input current and can generate zero voltage level in output. In this operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed as per required. Moreover, used switching pattern are used and to solve the above mentioned limitations in conventional half bridge and full bridge inverters, topologies are proposed. In the proposed topologies the operation and functional principles of these topologies in different operating modes are discussed and coding are also used. Then, comparison between the proposed and conventional inverters is done. Finally, correct operation of the proposed inverters is verified by simulation in PSCAD/EMTDC software and experimental results. BLOCK DIAGRAM: Research Article Volume 8 Issue No.11
author_names: N K Rayaguru

K N HemanthKumar Teja
title: Modified Half bridge and Full bridge Topologies with Continuous Input Current by using Switch Boost Inverter
year: 2018

abstract: The integrator of the modulator in a delta modulated (DM) inverter control scheme greatly affects the voltage waveform patterns, fundamental voltage and spectral components. The performance of DM with different types of filters suffers from low fundamental voltage. Previous schemes could not provide a fundamental voltage equal to the supply voltage and pulse dropping phenomena occurs as the modulating frequency is increased. To overcome these problems, a dual slope integrating (DSI) filter is proposed in this paper. The introduction of a DSI filter in the DM loop gives a fundamental voltage equal to the supply voltage at 100% modulation index. The number of pulses per fundamental period can be maintained constant in the modified DSI DM scheme. The performance of this modulator is better than other DM schemes so far reported. Simulations and experimental results are presented to justify the claims of the paper.
author_names: Kazi Mujibur Rahman

M A Choudhury

M Rezwan Khan

M A Rahman
title: Dual slope integrator type delta modulator for high performance voltage source inverters
venue: Proceedings of Power Conversion Conference PCC '97
year: 1997

abstract: Nowadays, the high speed induction motors with solid rotors are subject of interest in many studies. These machines are supplied from frequency inverters with corresponding frequency to obtain desire rotating speed. Very simple massive solid rotor is prefer due to its mechanical strength, low cost manufacture and can be used in hostile environment. This article is focused on high speed induction motor with two different rotor types, namely smooth solid and axially slitted rotor. In the introduction the application, method of analysis and rotor topology are discussed especially for rotors, mentioned above. Our motor is designed to provide output power of 12kW and its synchronous speed is 45000 min 1. Models are created in ANSYS Maxwell software package and analyzed with approach of finite element method. Two solid rotors are examined where the first motor is equipped with smooth solid rotor which is made of single steel with no feature modification and can withstand great mechanical forces and the second motor is equipped with rotor where feature modification is applied in form of axial slits with proper depth in order to obtain better electromagnetic performance. The difference and improvement of this modification is investigated.
author_names: Jiri Klima

Ondrej Vitek
title: The influence of the rotor slits on the performance of high speed solid rotor induction machine
venue: 2016 17th International Conference on Mechatronics Mechatronika (ME)
year: 2016

abstract: This chapter begins with a description of different distributed generation (DG) technologies. These are presented from the point of view of their working principle and their way of connecting to the network. An introduction is also given to the load flow problem in DG systems. The different types of nodes are defined and the problem equations are formulated. The network connection of DG involves a change in the control of the system and the quality of the electrical power. In some cases, this connection leads to a deterioration of the quality indices of electric power. In other cases, it may serve to improve these indices. So, this chapter includes a section in which the impact of DG on the quality of electric power is analyzed. The last section is devoted to present and analyze different control strategies of the inverters that are used as interface for the connection between DG and network.
author_names: Patricio Salmeron Revuelta
title: 8 Distributed Generation
year: 2016