Search query: Single Photon Detectors Based on SPADs: Circuit Solutions and Operating Modes

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abstract: Single photon detectors (SPDs) are the most sensitive devices for detecting light. The rapid development of quantum communication over the past decades have given rise to the development of a cheap and miniature SPD device. Its core consists of a single photon avalanche photodiode (SPAD) a specially designed semiconductor device that is sensitive to single photon radiation. Both at the dawn of the development of semiconductor SPDs and nowadays, the SPAD control electronics occupies a special place. In this review, we present technological advances in the development of control electronics for semiconductor SPDs, which operate at a telecommunication wavelength and allow achieving various detrctor's operation modes: low frequency and high frequency gating and a freerun mode. The results of the study of various scientific groups in the field of quantum key distribution, which allows tracing the trends of the world technological development of this industry, from ten km on the ground to communication with satellites, are demonstrated.
author_names: Anton Losev

Vladimir Zavodilenko

Andrey Koziy

Yuriy V Kurochkin

Alexander A Gorbatsevich
title: Single Photon Detectors Based on SPADs: Circuit Solutions and Operating Modes
year: 2021

abstract: This paper presents the design of a PXF40 an ultrafast single photon counting (SPC) readout front end electronics implemented in a CMOS 40 nm technology dedicated to hybrid pixel detectors. The prototype application specific integrated circuit core is a matrix of 432 pixels <inline formula> <tex math notation="LaTeX"$24\times 18$ /tex math>/inline formula> with a <inline formula> <tex math notation="LaTeX"$100\\mu \text {m}\times 100\\mu \text{m} /tex math>/inline formula> size. The single processing channel consists of a charge sensitive amplifier (CSA) a discriminator, and a 24 bit counter with logic circuitry. The input signal is amplified and formed only by the CSA stage. Depending on the CSA input transistor current value, it can operate in two modes: FAST and FAST_HC with higher current. The measured power dissipation per channel <inline formula> <tex math notation="LaTeX"$P 45 \mu \text{W} /tex math>/inline formula> and noise <inline formula> <tex math notation="LaTeX"\text {ENC} 212\ \text {e} /tex math>/inline formula> rms for the FAST mode, while <inline formula> <tex math notation="LaTeX"$P=100\\mu \text{W} /tex math>/inline formula> and ENC 185 e<sup> /sup> rms for the FAST_HC mode, respectively. The readout chip can count up to 1.2 Gcps/mm<sup>2</sup> based on 10% dead time loss input rate parameter, which is currently the fastest SPC based solution.
author_names: Rafal Kleczek

Pawel Grybos

Robert Szczygiel

Piotr Maj
title: Single Photon Counting Pixel Readout Chip Operating Up to 1.2 Gcps/mm2 for Digital X Ray Imaging Systems
venue: IEEE Journal of Solid State Circuits
year: 2018

abstract: We report on progress in improving fundamental properties of InP based single photon avalanche diodes (SPADs) and recent trends for overcoming dominant performance limitations. Through experimental and modeling work focused on the trade off between dark count rate (DCR) and photon detection efficiency (PDE) we identify the key mechanisms responsible for DCR over a range of operating temperatures and excess bias voltages. This work provides a detailed description of temperature and bias dependent DCR thermal activation energy Ea(T,V) including the crossover from low Ea for trap assisted tunneling at temperatures below ~230 K to larger Ea for thermal generation at temperatures approaching room temperature. By applying these findings to new device design and fabrication, the fundamental tradeoff between PDE and DCR for InP/InGaAs SPADs designed for 1.55 mm photon detection has been managed so that for PDE 20% devices routinely exhibit DCR values of a few kHz, while "hero" devices demonstrate that it is possible to achieve sub kHz DCR performance at temperatures readily accessible using thermoelectric coolers. However, important limitations remain, particularly with respect to maximum count rates. Strategies adopted recently to circumvent some of these present limitations include new circuit based solutions involving high speed very short duration gating as well as new monolithic chip level concepts for obtaining improved performance through avalanche self quenching. We discuss these two approaches, and we describe recent results from devices with monolithically integrated quench resistors that achieve rapid self quenching, accompanied by evidence for a partial discharge of the detector capacitance leading to charge flows as low as ~3 x105 carriers associated with each avalanche event.
author_names: Mark A Itzler

Xudong Jiang

Mark Entwistle

Bora M Onat

Krystyna Slomkowski
title: Single photon detectors based on InP avalanche diodes: status and prospects
venue: Defense Commercial Sensing
year: 2010

abstract: We demonstrate a gated reset circuit with integrated pulse width modulation for CMOS single photon avalanche diodes. The simple design extends the dynamic range and achieve a maximum count rate of 153 MHz. Afterpulsing effect and ranging test using gated reset method is performed and exhibit its advantage over conventional active or passive reset scheme. 1. Introduce CMOS single photon avalanche diodes (SPADs) play a key role in various applications, such as light detection and ranging (LiDAR) for autonomous driving [1] fluorescence lifetime imaging microscopy [2] time gated Raman spectroscopy [3] due to its high sensitivity and excellent timing precision. SPAD's Geiger mode operation enables single photon sensitivity but acquires quenching and reset circuit so unwanted detection deadtime is introduced. This becomes a serious issue when strong background light, for example, sunshine in vehicle LiDAR application, makes SAPDs too busy to detect laser photons. 2. Gated Reset Circuit Passive quenching and reset circuit using a single MOS transistor is the simplest way but the deadtime is long >10 20 ns) due to large resistance during recharging SPAD. To make it shorter without going into complex activereset circuit, very recently, Antolovic et. al. [4] demonstrated that a clock driven scheme could largely extend the dynamic range although the maximum count rate for single SPAD is only about 10 MHz. Fig. 1 explains the basic working principle of clock driven reset using the same passive reset circuit. Different from the operation of conventional passive quenching passive reset using constant gate voltage, clock driven or gated reset scheme does quenching at low gate voltages and recharging at high ones, as shown in the simulated timing diagram in Fig. 2. To enhance the stability and to control the period and duration of the clock driven gate voltage, in this work, a pulse width modulation circuit is integrated on the same chip, as shown in Fig. 3, which can be shared with other SPADs in array applications. Fig. 1 Passive rest and gated reset schematic. Fig. 2 Timing waveform using gated reset method. Fig. 3 Gated reset scheme with an integrated pulse width modulation design and layout. 3. SPAD Device Based on the same device reported previously [5] we use a 20 mm diameter SPAD in this work. The device structure is shown in Fig. 4. The P N junction is formed by DPW and NBL layers with HVPW layer as a guard ring. We have designed and fabricated the chips using TSMC high voltage 0.18 mm CMOS technology without any customization. The breakdown voltage of our SPAD is 48.5V. We operate the SPAD at the excess bias is 2.5V. The corresponding dark count rate (DCR) is 276Hz. The measured spectra of photon detection probability (PDP) at various excess bias voltages are shown in Fig. 5. The maximum PDP is 21.4% at 550 nm at the excess bias of 2.5 V. Fig. 4 Schematic device structure of our SPAD Fig. 5 Photon detection probability (PDP) of our SPAD at different excess bias 4. Dynamic Range Fig. 6 exhibits the dynamic range experiment setup. Using integrator sphere with a 625 nm light emitting diodes as light source, a calibrated photodiode (PD) and the SPAD chip were mounted on the two holes on the sphere. The effective input counts, denoted as n, can be calculated by the measured photocurrent of calibrated PD and the photon detection probability (PDP) of SPAD. That is, n photon flux on SPAD sensing area times PDP. The detector count, denoted as m, is the actual output counts from SPAD. Fig. 7 exhibits the measurement results of dynamic range of the SPAD under gated reset and passive reset operations. In passive reset scheme, where the conventional constant gate voltage was used, the highest count rate of 39.8 MHz was obtained at quenching bias of 0.91 V. In contrast, in gated reset operation (350 MHz clock frequency, 0.6 ns pulse width, gate voltages of 0 V and 1.8 V) the linear region is largely extended and the dynamic range has been significantly increased to a maximum count rate of 153 MHz, about 4 fold enhancement. 0% 10% 20% 30% 500 600 700 800 900 PD P Wavelength (nm) 2.5V 1.5V 0.5V Fig. 6 Dynamic ranges experiment setup Fig. 7 Measured dynamic ranges of passive reset and gated reset methods. 5. Afterpulsing Probability For SPADs, afterpulsing probability (APP) increases with shorten deadtime and increased breakdown current. [6] For gated reset scheme, if a breakdown event occurs during reset period, the breakdown current cannot be quenched immediately so the resultant APP gets worse. The measured APP as a function of the pulse width is plotted in Fig. 8. The clock frequency is fixed at 350 MHz. By reducing the pulse width to 0.6 ns, 3 fold reduction of APP is obtained. Fig. 9 exhibits the measured APP as a function of the clock frequency with fixed pulse width of 0.6ns. Clearly, the APP increases with the increasing clock frequency because occurrence probability of the shorter deadtime is higher. Fig. 8 Measured APP as a function of pulse width. Fig. 9 Measured APP as a function of the clock frequency. 6. Ranging Experiment An intriguing feature using gated reset scheme is its varying deadtimes. This is potentially helpful in LiDAR application. We have performed a ranging experiment using active reset [7] and gated reset schemes with the respective APP of 4.8% and 5.0% The laser condition for ranging is, repetition rate of 2.5 MHz, wavelength of 780 1.0E+06 1.0E+07 1.0E+08 1.0E+09 1.0E+06 1.0E+07 1.0E+08 1.0E+09 1.0E+10 m (H z) n (Hz) Passive Reset Gated Reset
author_names: C W Hsu

Chia-Ming Tsai
title: CMOS Single photon Avalanche Diodes using Gated Reset Circuit with On chip Pulse Width Modulation
year: 2019

abstract: Time Correlated Single Photon Counting (TCSPC) is an essential tool in many scientific applications, where the recording of optical pulses with picosecond precision is required. Unfortunately, a key issue has to be faced: distortion phenomena can affect TCSPC experiments at high count rates. In order to avoid this problem, TCSPC experiments have been commonly carried out by limiting the maximum operating frequency of a measurement channel below 5% of the excitation frequency, leading to a long acquisition time. Recently, it has been demonstrated that matching the detector dead time to the excitation period allows to keep distortion around zero regardless of the rate of impinging photons. This solution paves the way to unprecedented measurement speed in TCSPC experiments. In this scenario, the front end circuits that drive the detector play a crucial role in determining the performance of the system, both in terms of measurement speed and timing performance. Here we present two fully integrated front end circuits for Single Photon Avalanche Diodes (SPADs) a fast Active Quenching Circuit (AQC) and a fully differential current pick up circuit. The AQC can apply very fast voltage variations, as short as 1.6ns, to reset external custom technology SPAD detectors. A fast reset, indeed, is a key parameter to maximize the measurement speed. The current pick up circuit is based on a fully differential structure which allows unprecedented rejection of disturbances that typically affect SPAD based systems at the end of the dead time. The circuit permits to sense the current edge resulting from a photon detection with picosecond accuracy and precision even a few picoseconds after the end of the dead time imposed by the AQC. This is a crucial requirement when the system is operated at high rates. Both circuits have been deeply characterized, especially in terms of achievable measurement speed and timing performance.
author_names: Giulia Acconcia

A Cominelli

Massimo Ghioni

Ivan Rech
title: Fast fully integrated front end circuit to overcome pile up limits in time correlated single photon counting with single photon avalanche diodes.
venue: Optics express
year: 2018

abstract: In recent years, lifetime measurements by means of the Time Correlated Single Photon Counting (TCSPC) technique have led to a significant breakthrough in medical and biological fields. Unfortunately, the many advantages of TCSPC based approaches come along with the major drawback of a relatively long acquisition time. The exploitation of multiple channels in parallel could in principle mitigate this issue, and at the same time it opens the way to a multi parameter analysis of the optical signals, e.g. as a function of wavelength or spatial coordinates. The TCSPC multichannel solutions proposed so far, though, suffer from a tradeoff between number of channels and performance, and the overall measurement speed has not been increased according to the number of channels, thus reducing the advantages of having a multichannel system. In this paper, we present a novel readout architecture for bi dimensional, high density Single Photon Avalanche Diode (SPAD) arrays, specifically designed to maximize the throughput of the whole system and able to guarantee an efficient use of resources. The core of the system is a routing logic that can provide a dynamic connection between a large number of SPAD detectors and a much lower number of high performance acquisition channels. A key feature of our smart router is its ability to guarantee high efficiency under any operating condition.
author_names: Giulia Acconcia

A Cominelli

Ivan Rech

Massimo Ghioni
title: High efficiency integrated readout circuit for single photon avalanche diode arrays in fluorescence lifetime imaging.
venue: The Review of scientific instruments
year: 2016

abstract: An overview of photon counting detection using CMOS compatible Single Photon Avalanche Diodes (SPAD) will be presented. These SPADs have a planar structure, and are processed using CMOS technology. The most promising aspect of this technology is the potential for building large area arrays that can be operated in photon counting mode without the read out noise and bulkiness associated with low noise CCD cameras. Using the iAQC (integrated Active Quenching Circuit) produced by Micro Photonics Devices, a low noise InGaAs/InAlAs APD will be characterized for photon counting. Finally, Characterization data from a photon counting module using Intevac's IPD's (Tube+APD hybrd) will be presented for photon counting at 1064nm.
author_names: Nick Bertone

Roberto Biasi

Bruno Dion
title: Overview of photon counting detectors based on CMOS processed single photon avalanche diodes (SPAD) InGaAs APDs, and novel hybrid (tube APD) detectors
venue: SPIE OPTO
year: 2005

abstract: Recently developed InGaAs/InP devices suitable as single photon avalanche diodes (SPADs) in the near infrared range provide good detection efficiency and low time jitter, together with fairly low dark count rate at moderately low temperature. However, the overall performance is still severely limited by the afterpulsing effect (due to carriers trapped in deep levels during the avalanche and later released) Experimental studies and speculations aiming to improve the overall performance are here presented. The photon detection efficiency is characterized and the primary dark count rate is investigated, taking into account thermal generation in the InGaAs layer (absorption layer) and trap assisted tunneling in the InP layer (multiplication layer) Experimental investigations on the afterpulsing are reported. Improvements obtainable with existing devices by selecting proper operating conditions and circuit solutions are presented and discussed. In order to gain a better insight in the design of new devices, the effectiveness of trapping levels as a function of their location and of the electric field distribution is studied by computer simulation. The fundamental role played by the front end circuits is assessed and demonstrated, in particular as concerns picosecond photon timing for a SPAD operating in gated mode with ultrafast gate on and gate off transitions.
author_names: Alberto Tosi

Alberto Dalla Mora

Franco Zappa

Sergio Cova
title: Single photon avalanche diodes for the near infrared range: detector and circuit issues
year: 2009

abstract: Single photon detectors sensitive to near infrared (NIR) wavelength light are used in an increasing number of applications, such as quantum key distribution, laser detection and ranging, and integrated circuit analysis. There are many types of NIR single photon detectors, e.g. photomultiplier tube, superconducting single photon detector and single photon avalanche diode (SPAD) However, the SPAD remains the most practical of them, mainly because of their relatively high operating temperatures 220 K to room temperature) hence requiring only moderate or no cooling. Most NIR SPADs are InGaAs/InP SPADs, which are sensitive to 1550 nm wavelength light. An InGaAs and an InP layer are used as absorption and avalanche materials, respectively. The main performance parameters for SPADs are Single Photon Detection Efficiency (SPDE) Dark Count Rate (DCR) and After pulsing probability. Simulations [1] have shown that, for a given DCR, SPADs using InAlAs instead of InP as avalanche material achieve higher SPDE, because of higher avalanche breakdown probability (proportional to SPDE) in InAlAs than in InP. Thus SPADs based on InAlAs can potentially achieve higher operating temperature, compared to SPADs based on InP, for given SPDE and DCR. Moreover, breakdown voltage of InAlAs is less sensitive to temperature than InP is [2] offering greater flexibility in the SPAD operation temperature. In this work we report a 50 m diameter InGaAs/InAlAs SPAD for detection of 1550 nm photons. The InGaAs/InAlAs SPAD was grown by molecular beam epitaxy (MBE) and fabricated using standard photolithography and wet chemical etching. The SPAD was characterised in gated mode inside a low temperature probe station. Photons were from a heavily attenuated pulsed laser (20 ps FWHM pulse width) DCR data versus overbias, Vob, at different temperatures and SPDE at 210 K are shown in Fig. 1(a) From 293 to 210 K, DCR reduced by 2 orders of magnitude and a maximum SPDE of 41% was achieved. Despite the relatively large device diameter, these results are significantly better than previous reports of InGaAs/InAlAs SPADs [3 5] as shown in Fig. 1(b)
author_names: X G Meng

Shiyu Xie

X Zhou

C H Tan

Jo Shien Ng
title: InGaAs/InAlAs Single Photon Avalanche Diode at 1550 nm
year: 2015

abstract: We present the design and simulations of a single photon sensitive imager based on single photon avalanche diodes (SPADs) with an innovative pixel architecture that includes four separate SPADs with independent active time gating and quenching circuit, a shared time to digital converter (TDC) with 50 ps resolution, four independent photon counters, and multiple operation modes. The TDC is driven by smart arbitration logic, which preserves spatial information among the four detectors; furthermore, an alternative operation mode exploits photon coincidence on multiple detectors to reduce the effect of high background levels, e.g. in light detection and ranging applications with strong ambient light. Key features are the ability to operate in simultaneous photon counting and timing modes for capturing 2 D and 3 D images of the scene in a single shot (frame) the option of a counting only mode, reducing power consumption, and increasing achievable frame rate when timing information is not needed, and the ability to individually shut down noisy detectors or to enable just some regions of interests.
author_names: Davide Portaluppi

Enrico Conca

Federica A Villa
title: 32 x 32 CMOS SPAD Imager for Gated Imaging, Photon Timing, and Photon Coincidence
venue: IEEE Journal of Selected Topics in Quantum Electronics
year: 2018