Search query: 125 W multiphase GaN/Si hybrid point of load converter for improved high load efficiency

Related papers:

abstract: This work presents experimental results of an optimized five phase GaN/Si hybrid synchronous buck converter designed to improve low voltage point of load (POL) converter efficiency while meeting increasing load demands typical in high performance computing. The best enhancement mode GaN HEMTs have very low gate charge, switch much faster than Si, and enable higher frequency operation which can reduce size. However, GaN HEMTs are not yet available with extremely low RDS(ON) like comparable Si MOSFETs. For this reason, GaN based systems are susceptible to poor efficiency at high loads. To mitigate this consequence, the appropriate combination of GaN and Si is utilized in a 12 to 1 V POL converter with peak efficiency above 95% and 125 W rated load. The results of this work submit that optimal performance can be achieved by combining two semiconductor technologies, and the design is a novel approach to improve upon current state of the art POL converters.
author_names: Luke L Jenkins

Benjamin K Rhea

William E Abell

Frank T Werner

Chris Wilson

Robert Neal Dean

Daniel K Harris
title: 125 W multiphase GaN/Si hybrid point of load converter for improved high load efficiency
venue: 2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
year: 2014

abstract: A wideband hybrid Envelope tracking (ET) modulator utilizing a hysteretic controlled three level switching converter (3L SWC) and a slew rate enhanced linear amplifier (LA) are presented. In addition to smaller ripple and lower losses of 3L SWCs, employing the proposed hysteresis control loop results in a higher speed loop and wider bandwidth converter, enabling over 80 MHz of switching frequency. A concurrent sensor circuit monitors and regulates the flying capacitor voltage $V_{\mathrm{ CF} and eliminates the conventionally required calibration loop to control it. The hysteretic controlled 3L SWC provides a high percentage of power amplifier (PA) supply load current with lower ripple, reducing the LA high frequency current and ripple cancellation current, improving the overall system efficiency. A slew rate enhancement (SRE) circuit is employed in the LA, resulting in slew rate of over 307 V/ \mu \text{s} and bandwidth of over 275 MHz for the LA. The SRE circuit provides a parallel auxiliary current path directly to the gate of the class AB output stage transistors, speeding up the charging or discharging of output without modifying the operating point of the remaining LA, while maintaining the quiescent current of the class AB stage. The supply modulator is fabricated in a 65 nm CMOS process. The measurement results show the tracking of long term evolution (LTE) 40 MHz envelope with 93% peak efficiency at 1 W output power, while the SRE is disabled. Enabling the SRE, it can track LTE 80 MHz envelope with peak efficiency of 91%
author_names: Parisa Mahmoudidaryan

Debashis Mandal

Bertan Bakkaloglu

Sayfe Kiaei
title: Wideband Hybrid Envelope Tracking Modulator With Hysteretic Controlled Three Level Switching Converter and Slew Rate Enhanced Linear Amplifier
venue: IEEE Journal of Solid State Circuits
year: 2019

abstract: As applications like high performance cloud computing grow exponentially, there is an immediate need for high efficiency high current point of load (POL) converters. Interleaving phases is a common technique to reduce conduction loss, lower output ripple, improve high load performance, and reduce stress on power switching devices. However, multiphase POLs are primarily limited by size. The development of Gallium Nitride (GaN) power semiconductors is enabling higher power density in power supply applications. This paper demonstrates this with a 120 W five phase interleaving GaN synchronous buck converter that achieves a peak efficiency above 96% and maintains over 90% efficiency up to 105 A.
author_names: Benjamin K Rhea

Luke L Jenkins

William E Abell

Frank T Werner

Chris Wilson

Robert Neal Dean

Daniel K Harris
title: A 12 to 1 V five phase interleaving GaN POL converter for high current low voltage applications
venue: 2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
year: 2014

abstract: In this letter, a quasi two stage architecture is proposed for wide input voltage range (voltage ranges 1:2) and high step down multiple output conversion. A dc DCX, which operates as a dc dc converter with regulated output when the input voltage is low and as a dc dc transformer with unregulated output when the input voltage is high, is adopted in the first stage to provide optimized intermediate dc bus voltages for the second stage point of load converters. The input and output of the dc DCX are in series and connected to the total input voltage. Hence, part of the input power is directly transferred to the intermediate bus without conversion. The devices' voltage stresses and the transformer turns ratio of the dc DCX are reduced by using the proposed quasi two stage architecture. Thus, the conversion efficiency is improved significantly. Furthermore, a dual output LLC resonant converter with hybrid center tapped and full bridge rectifier is proposed for the dc DCX to achieve high efficiency and high power density. A 100 W prototype with three outputs is built and tested to verify the analysis.
author_names: Hongfei Wu

Chengan Wan

Kai Sun

Yan Xing
title: A High Step Down Multiple Output Converter With Wide Input Voltage Range Based on Quasi Two Stage Architecture and Dual Output LLC Resonant Converter
venue: IEEE Transactions on Power Electronics
year: 2015

abstract: A high efficiency slope compensator (HSC) is presented to achieve power reduction in current mode control and provide input independent load condition identification for mode switch in hybrid PWM/PFM system. That is, according to load condition, an adaptive mode transition can be decided by the HSC circuit and not varied by the variation of input voltage. Therefore, for a hybrid PWM/PFM system, the power conversion efficiency can be kept high over a wide load range. Besides, the pulse ramp slope compensation technique prevents the current mode DC DC converter from having the sub harmonic oscillation problem and reduces power dissipation of the slope compensator. Simulation results show that the mode transition is accurately decided at the optimum point without being affected by the variation of input voltage. The power conversion efficiency is improved about 5% in PWM/PFM transition region.
author_names: Wei-Jen Lai

Chi-Lin Chen

Yu-Chiao Hsieh

Ke-Horng Chen
title: High efficiency slope compensator (HSC) with input independent load condition identification in current mode DC/DC buck converters
venue: 2009 IEEE Energy Conversion Congress and Exposition
year: 2009

abstract: This paper introduces a novel power management architecture (PMA) and its on chip implementation, designed for battery powered portable applications. Compared to the conventional two stage PMA, consisting of a front end inductive converter followed by a set of point of load buck converters, the presented PMA has drastically improved power density. The new architecture, named multioutput switched capacitor convertor differential input buck (MSC DB) convertor, is based on a novel hybrid converter topology that combines a fixed ratio MSC and a set of DB converters, to achieve low volume and high power processing efficiency. The front end switched capacitor stage has a higher power density than the conventionally used inductive converters. The downstream DB converters enable tight output voltage regulation, and allow for up to four times reduction of output filter inductors without the need for increasing switching frequency, hence limiting switching losses and improving the efficiency of the system. Furthermore, the new PMA is able to balance the state of charge of the input battery cells, a feature not existing in conventional systems. The PMA architecture is implemented both as a discrete prototype and as an application specific integrated circuit (IC) module. The on chip implemented architecture is fabricated in a standard 0.13 mm CMOS process and operates at 9.3 MHz switching frequency. Experimental comparisons with a conventional two cell battery input architecture, providing 15 W of total power in three different voltage outputs, demonstrate up to two times reduction in the inductances of the downstream converter stages and more than two times reduction in losses, equivalent to the improvement of the power processing efficiency of a 12% Moreover, the fabricated IC module is copackaged with low profile thin film inductors to demonstrate the effectiveness of the introduced architecture in reducing the volume of PMAs for portable applications.
author_names: S M Ahsanuzzaman

Aleksandar Prodic

David A Johns
title: An Integrated High Density Power Management Solution for Portable Applications Based on a Multioutput Switched Capacitor Circuit
venue: IEEE Transactions on Power Electronics
year: 2016

abstract: This work investigates control and implementation aspects of a four phase inductor based Fully Integrated Voltage Regulator (FIVR) for microprocessor applications using the 14 nm Bulk CMOS technology. The considered converter system has a rated input voltage of " 1.6 V and delivers an output power of 1 W at a nominal output voltage of 0.8 V to a microprocessor load. Voltage regulation allows varying the microprocessor supply voltage in the range of 0.6 V to 1.0 V, which enables Dynamic Voltage and Frequency Scaling. From an in depth evaluation of suitable control schemes, the V2IC control scheme, which uses the output voltage and the output capacitor current information as feedforward signals, is selected due to its fast response during transients and low implementation complexity, compared to fixed frequency hysteretic current mode control. The !123 controlled converter is implemented in transistor level using models of the Global foundries' 14 nm LPP technology and Cadence simulation results confirm very fast output voltage recovery of 14.39 ns during 625mA 0.5ns load current transients at nominal voltage and a settling time of 35 ns during reference output voltage transients from 0.6 V to 1.0 V at nominal current Introduction and the State of the Art State of the art buck type fully integrated point of load converters typically employ hysteretic [1] or PWM based control schemes [2][3] for output voltage regulation. Besides zero DC offset in steady state and low output voltage ripple requirements, the voltage regulators used in microprocessor applications have also to react instantaneously to abrupt changes in reference voltage and load current. In [2] a conventional voltage mode control is used for output voltage regulation. In order to achieve acceptable recovery times a very high bandwidth controller is used. The converter is composed of 360 phases and is able to settle the output voltage during a load step of 8.5 A within 100 ns back to the programmed DC value. Reference [3] uses a modified form of peak current mode control and manages to recover from a 600mA load step within 26.66 ns, taking into account the required DC deviation from the microprocessor load line [7] Fast reaction to load current steps is also achieved in [1] where load transients are detected by sensing the ground voltage noise, resulting in approximately 14 ns of reaction time for a 280 mA load current step. The current mode PWM !123 control scheme [4] is selected for this work due to its capability of operation with constant switching frequency without the need of auxiliary circuits. By proper analytical tuning of the gains for the fast output voltage and output capacitor current feedback signals, fast transient detection and output voltage recovery is achieved, meeting the requirements of Tab. 1. Through regulation of the Vin 1.6 V Input Voltage Vout 0.8 V Nominal Output Voltage Vout,min 0.6 V Minimum Vout,max 1.0 V Maximum DVout,pp 1 mV Max. Output Voltage Ripple Iout,max 1.25 A Max. Output Current Pout 1 W Output power Nphi 4 Number of phases fsw 110 MHz Buck Switching Frequency DVref 0.5 V Maximum voltage reference step tsett,ref 100 ns Max. voltage reference settling time DIload 625 mA Maximum voltage reference step tsett,load 70 ns Max. load current step settling time Vdroop,load 70 mV Max. voltage droop during load step Tab. 1 Steady state and dynamic system specifications Control and Implementation Aspects of a Multiphase Inductor Based FIVR in 14 nm Bulk CMOS for Microprocessor Applications peak current of each converter phase, balanced current distribution among the phases is achieved, which is necessary for maintaining high efficiency. More details on the control scheme comparison will be provided in the final version of this work. System Specifications and Selected Topology The selected topology, shown in Fig. 1, consists of a four phase buck converter with interleaved gate signals reducing the requirements on minimum input and output capacitance values and improving transient performance compared to conventional single phase topologies [5] The system's specifications, steady state and dynamic operation parameters are listed in Tab. 1. In contrast to [1] [2] and [3] which place the output filter passives in the package, this converter uses inductors and capacitors that are integrated into a silicon interposer. In order to achieve the required output voltage ripple and a phase current peak to average ratio PAR 1.3, phase inductances of 15 nH and an output capacitance of 50 nF are selected. According with [5] those inductance and capacitor values would result in a high interposer power density of ~1 W/mm 2 using silicon devices. Transistor Level Implementation in Cadence using the GF 14 nm
author_names: Riduan Khaddam-Aljameh

Pedro A M Bezerra

Florian Krismer

Johann Walter Kolar

Arvind Sridhar

Thomas Brunschwiler

Thomas Toifl

Bruno Michel
title: Control and Implementation Aspects of a Multiphase Inductor Based FIVR in 14 nm Bulk CMOS for Microprocessor Applications
year: 2016

abstract: This thesis introduces a power management architecture (PMA) and its on chip implementation, designed for battery powered portable applications. Compared to conventional two stage PMA architectures, consisting of a front end inductive converter followed by a set of point of load (PoL) buck converters, the presented PMA has improved power density. The new architecture, named MSC DB, is based on a hybrid converter topology that combines a fixed ratio multioutput switched capacitor converter (MSC) and a set of differential input buck (DB) converters, to achieve low volume and high power processing efficiency. The front end switched capacitor stage has a higher power density than the conventionally used inductive converters. The downstream differential input buck converters enable tight output voltage regulation, and allow for a drastic reduction of output filter inductors without the need for increasing switching frequency, hence limiting switching losses and improving the efficiency of the system. Furthermore, the new PMA provides battery cells balancing feature, not existing in conventional systems. iii The PMA architecture is implemented both as a discrete prototype and as an application specific integrated circuit (IC) module. The on chip implemented architecture is fabricated in a standard 0.13mm CMOS process and operates at 9.3 MHz switching frequency. Experimental comparisons with a conventional two cell battery input architecture, providing 15 W of total power in three different voltage outputs, demonstrate up to a 50% reduction in the inductances of the downstream converter stages and up to a 53% reduction in losses, equivalent to the improvement of the power processing efficiency of a 12% Moreover, the fabricated IC module is co packaged with low profile thin film inductors, to demonstrate the effectiveness of the introduced architecture in reducing the volume of PMAs for portable applications and possibly providing complete on chip implementation of PMAs in near future.
author_names: S M Ahsanuzzaman
title: High density power management architecture for portable applications
year: 2015

abstract: The Metacapacitors project aims to improve efficiency, functionality and form factor of offline power converters suitable for LED solid state lighting, with a view to developing an attractive technology platform for load management and power conversion across a broad range of applications. Based on integrated switched capacitor (SC) topologies, the project adopts an integrated approach from materials to devices to circuits. We designed capacitors based on high k dielectric nanocrystals, that can be prepared using high throughput microfabrication/nanotechnology techniques, ink deposition and multilayering. The capacitor dielectric, a nanocomposite composed of (Ba, Sr)TiO3 nanocrystals in polyfurfuryl alcohol (BST/PFA, k 20, 100Hz 1 MHz, loss 0.01, 20 kHz) targets a high volumetric capacitance density and ripple current capability. The Dielectric is demonstrated to function in a finished capacitor 1000 h at 125degC. The capacitors were board integrated with a custom hybrid switched capacitor resonant dc dc converter IC. The converter integrates a balanced SC front end with a series resonant tank, enabling nearly lossless current regulation and tranformerless galvanic isolation. The converter IC can be stacked in the voltage domain to interface a range of inputs. The tested driver delivers about 15 W at 470 mA to a string of 12 LEDs with 90% peak efficiency.
author_names: Barry J Van Tassell

Shyuan Yang

Chengrui Le

Limin Huang

Shuangyi Liu

Paul Chando

Xiao-hua Liu

Andrew Byro

Daniel Lin Gerber

Eli S Leland

Seth R Sanders

Peter R Kinget

Ioannis Kymissis

Daniel A Steingart

Stephen O'Brien
title: Metacapacitors: Printed Thin Film, Flexible Capacitors for Power Conversion Applications
venue: IEEE Transactions on Power Electronics
year: 2016

abstract: INTRODUCTION Buildings play an important role in consuming existing networks' energy. For instance, more than one third of energy consumption and more than Two thirds of electrical energy in America is related to this section. So energy management in buildings is an important issue for engineers and power system researchers. According to the economic and environmental aspects, it's necessary to use new technologies. But when we use different energy sources simultaneously, due to the uncertainties related to the performance of each of these sectors, we face some problems which can be removed using an intelligent energy management system. Many of these systems had been introduced in the literature. Some of the articles are arranged for planning manufacturing sector. In the second article, a plan has been introduced to exploit4 distributed generation technologies to use at home with the aim of increasing consumer interest. In the third article, the problem of energy management in a low energy building is solved using uncertain and certain models. The fifth article introduces a home management system with a focus on cost control home appliances with the aim of minimizing household energy consumption considering the well being of residents. Also the seventh article presents a two stage algorithm to use the home appliances that its basis is the least payment for the consumer and the residents' comfort. These articles confirm the positive impact of demand response programs in reducing costs. Use of renewable energy resources in health centers helps to reduce traditional energy consumption and causes access to a low carbon economy. For this reason, in the past decades and around the world we have observed rapid developments in the use of renewable energy in these centers and buildings. In this regard and in order to achieve efficient hospitals and in accordance with international standards, some researches were conducted in which saving energy and reducing pollution have been considered as strategies for sustainable development of medical centers. Some limited studies have been arranged in order to Glob. J. Sci. Res. 4 (1) 1 8, 2016 2 P a g e determine the number of required renewable resources for energy planning in hospitals. For example the 11th article in which due to uncertainty in demand and prices for electricity, the Monte Carlo simulation is also being used. In another study, a systematic approach is provided to proper selection and identify the best option for reconstruction of existing buildings in hospitals. Several energy sources including photovoltaic systems, wind power plants, diesel generators, gas turbines and micro turbines in combination with each other can form a hybrid energy system. Despite these resources, single solar cells and wind power plants in remote areas are widely used in feeding electrical charge. These systems are usually combined together because their characteristics are almost complementary to each other. Due to the cleanliness and being renewable of these energies, organizations and several countries are interested in using it and doing extensive research in this direction. Various methods for optimal design and to minimize the costs of wind and solar power plants have been proposed. The combination of linear and non linear programming are presented based on partial analytical and numerical calculations in [13] In [14] a method based on nonlinear programming is provided to choose the size and location of wind farms connected to the grid based on different scenarios that its aim is to reduce costs and maximize energy in square meters. In [15] an iterative search algorithm has been used to find the optimal size of a hybrid solar wind system with storage batteries. In some papers, energy storage is considered in distributed generation systems. A genetic algorithm has been used to determine the size of an optimal solarwind complex powerhouse. Mr. Asghari and Ameri have done economic feasibility for hybrid systems, diesel and photovoltaic with the battery storage. And the same group [3] examined the optimal sizing of a hybrid wind solar system network independent. Roy [4] a method based on nonlinear programming is provided to choose the size and location of wind farms connected to the grid based on different scenarios that its aim is to reduce costs and maximize energy in square meters. Kellog and Nahrin have sedan iterative search algorithm to find the optimal size of a hybrid solar wind system with storage batteries .Kvtrvlyz and Klvkvtsa [7] have used a genetic algorithm to determine the size of an optimal solarwind complex powerhouse. 2. The objective function According to the discontinuous characteristic of wind as well as solar radiation and their high dependence on weather conditions, the most important debate is to design are liable system for power supply. In this way, paying attention to the cost of the system is inevitable, therefore optimum hybrid system is designed to reduce peak load times and increase reliability of the network .In the system under study, wind turbines, PV panels and battery capacity should optimally be determined. For this purpose, the PSO algorithm is used because it can compute the cost of all system components according to their function and in acceptable modes. In the proposed method, the algorithm output is wind turbines, photovoltaic panels and batteries. This number must be optimized in such a way that not only supply energy but also minimize the system's 20 year costs. System's cost includes the cost of purchase and installation, maintenance and repair of components during 20 years. Operation of the system is calculated from the following equation: Ci Ni[Ccosti RCcosti x Ki O&Mcosti] WG, PV, Battery 1 In which Niis the number or size of equipment,Ccostiis the initial investment includes the cost of purchase and installation, RCcosti is the placement price, Kiis the placement of system performance in 20 years, O&M costi is the cost of operation and maintenance of the system in 20 years. The objective function that should be minimized is the total cost of system operation. It is expressed as follows: Csystem CWG CPV CBAT PF 2 NPV Integer 0 NPV NPV max 3 NWG Integer 0 NWG NWG max 4 NBat Integer 0 NBat NBat max 5 PSupply PDemand 6 Pb min Pb Pb max 7 Pb min (1 DOD) Pb max 8 3. Dimensions and function of the hybrid system The purpose of this section is to establish the relationship between production and consumption of hybrid systems for better utilization of domestic load to reduce peak load. In this regard, the dimensioning systems for electricity production and optimizing the efficiency and reliability are economically essential. So the differences in productivity PGen should minimize from renewable energy and demand times in this way: Glob. J. Sci. Res. 4 (1) 1 8, 2016 3 P a g e P PGen PLoad 9 The system block diagram is shown in Figure 1. In this system, WG and PV are used as used as a source of energy storage. In Figure 1, the output unit is connected to a DC. The number of batteries are connected to the box as a storage system. Leadacid batteries store the produced energy by PV and WG system S and at the time of peak load they enter it to the system to improve the load curve. The Saved energy is transferred to the consumer by the DC AC converter. In order to optimally design and energy management, as well as view system performance under various conditions, having enough information about the structure of each component is essential. The system consists of a number of wind turbines, photo voltaic, batteries and converters. Each of these components are reviewed in this section. 4. Wind Turbine The first wind turbine that converts wind energy into mechanical energy and mechanical energy is converted into electrical energy by the generator [10, 11] In Figure 2 the turbine power output versus wind speed is drawn. Find the power output of the turbine by turbine wind speeds after a certain amount of proven and for speeds greater than the maximum speed, the turbine stops. The power output of the wind turbine is calculated from the following equation. PWG= 0 Vw Vc Vw VF PR x VW VC VR VC 3 Vc VW VR PR Vc VW VR 11 PWG power output of the wind turbine, PR rated power per turbine, VW wind speed, VC quickly cut down, VF high cutting speed and VR turbine is rated speed. Other features and parameters used in the model wind turbine is shown in O u tp u t P ow er W Prated 0 Vcut in VWind Vcut off Wind Speed (m/sec) Figure 2. Turbine power output versus wind speed Table 1. Technical Specifications studied wind turbine Rated power 1KW Quickly cut down 2.5 m/s Rated speed 11m/s High speed cut 24m/s The initial capital cost 2506 EUR Maintenance and performance 25/06 EUR/year life span 20 year 5. Photovoltaic panel Photovoltaic systems process the sun's energy directly into electrical energy is converted. In photovoltaic technology, the semiconductor cells which have a large p n diodes, are used. This means that the light onto each cell, and direct current voltage is generated. Several cells are combined to produce a module to provide current and voltage. PV production capacity Azmadlh given by [13,14] Ppv G 1000 x Ppv,rated x eMPPT 11 Glob. J. Sci. Res. 4 (1) 1 8, 2016 4 P a g e In this regard GG radiation in watts per square meter, P (pv, rated) rated power each photovoltaic panel and eMPPT efficiency DC DC converter is a photovoltaic panel. The concept of following MPPT maximum power point that makes the most power and solar energy harvesting module is in different weather conditions. The effect of temperature on the surface of the PV panel is neglected. Other features and parameters of photovoltaic panels used in the model are shown in Table 2. [8] Table 2. Technical Specifications solar modules Rated power 110W V
author_names: Shahryar Amani

Ardeshir Arash

Homayoon Ebrahimian
title: Optimization and design of wind and solar hybrid system with battery storage using the PSO algorithm considering the economic constraints Case Study in Ardabil province
year: 2016