Search query: Reducing roughness in extreme ultraviolet lithography

Related papers:

abstract: Pattern roughness is a major problem in advanced lithography for semiconductor manufacturing, especially for the insertion of extreme ultraviolet (EUV) lithography as proposed in the coming years. Current approaches to roughness reduction have not yielded the desired results. Here, a new global optimization approach is proposed, taking advantage of the different strengths and weaknesses of lithography and etch. Lithography should focus on low frequency roughness by minimizing both the low frequency power spectral density and the correlation length. Etch should focus on high frequency roughness by growing the correlation length. By making unbiased measurements of the roughness, including the power spectral density, the parameters needed to guide these optimization efforts become available. The old approach, of individually seeking to reduce the 3s roughness of pre and post etch features, is unlikely to lead to the required progress in overall roughness reduction for EUV.
author_names: Chris A Mack
title: Reducing roughness in extreme ultraviolet lithography
venue: Photomask Technology
year: 2017

abstract: Abstract. Pattern roughness is a major problem in advanced lithography for semiconductor manufacturing, especially for the insertion of extreme ultraviolet (EUV) lithography as proposed in the coming years. Current approaches to roughness reduction have not yielded the desired results. Here, a global optimization approach is proposed, taking advantage of the different strengths and weaknesses of lithography and etch. Lithography should focus on low frequency roughness by minimizing both the low frequency power spectral density (PSD) and the correlation length. Etch should focus on high frequency roughness by growing the correlation length. By making unbiased measurements of the roughness, including the PSD, the parameters needed to guide these optimization efforts become available. The old approach, of individually seeking to reduce the 3s roughness of pre and postetch features, is unlikely to lead to the required progress in overall roughness reduction for EUV.
author_names: Chris A Mack
title: Reducing roughness in extreme ultraviolet lithography
year: 2018

abstract: The development of resist materials used for extreme ultraviolet (EUV) lithography has steadily progressed since 2005. Their resolution and sensitivity are now close to those required for the high volume production of semiconductor devices. However, the line edge roughness (LER) must still be reduced to achieve the required value. For the reduction of LER, increasing the absorption coefficient is an important strategy. In this study, the relationship between the absorption coefficient and LER was investigated on the basis of the sensitization mechanisms of chemically amplified resists. The relationship was found to depend on the acid generator concentration, half pitch, and sensitivity. Assuming a required sensitivity of 10 mJ cm 2 absorption enhancement is effective for reducing LER, particularly at the 11 nm node.
author_names: Takahiro Kozawa
title: Relationship between Absorption Coefficient and Line Edge Roughness of Chemically Amplified Resists Used for Extreme Ultraviolet Lithography
year: 2012

abstract: Extreme ultraviolet lithography (EUVL) has been developed and studied for a sub 22 nm semiconductor device. It is difficult to obtain a smooth sub 22 nm pattern because line edge roughness (LER) and linewidth roughness (LWR) cannot be controlled well. According to the 2008 ITRS roadmap, LER has to be below 1.3 nm to achieve a 22 nm node for EUVL. In our previous work, the resist reflow process (RRP) in which the resist is baked above the glass transition temperature (Tg) was very helpful for reducing LER and LWR for EUVL. LER and LWR could be decreased from ~6 to ~1 nm. As RRP time progresses, however, the critical dimension could become wider because the developed resist can flow more easily when the temperature is above Tg. Therefore, another method is suggested to solve this problem. The developed resist, which is intentionally designed with a 1:3 line and space (L/S) (11:33 nm) pattern, is baked above Tg. As a result, LER and LWR can be smoothed by RRP and we could achieve a 22 nm 1:1 L/S pattern with a small LER.
author_names: In Wook Cho

Hyun-su Kim

Jee-Hye You

Hye-keun Oh
title: Line Edge Roughness Reduction Using Resist Reflow Process for 22 nm Node Extreme Ultraviolet Lithography
year: 2010

abstract: The purpose of extreme ultraviolet (EUV) lithography is to make pattern size of sub 22 nm. However, there are still some challenges to be overcome for EUV photoresist such as reducing the line edge roughness (LER) and line width roughness. The roughness of conventional polymer resists is large because of large polymer size. Thus many new molecular resists are studied and being developed in order to reduce roughness. To reduce LER we analyzed the size and structure of each ingredient of the suggested molecular resists. The varied parameters are the amount of photo acid generator, quencher and the size of the monomer. The protecting ratio of resin and protected number of a molecule are also varied. Monte Carlo simulation is used for ingredient dispersion and acid diffusion direction to see the effect to LER. Solid EUV is used to get the aerial image and photo generated acid for 22 nm node and ChemOffice is used to analyze molecular structure and volume.
author_names: Hyunsu Kim

In Wook Cho

Seong-Sue Kim

Han-Ku Cho

Hye-keun Oh
title: Line edge and width roughness dependency on each ingredient of extreme ultraviolet molecular resist
venue: Advanced Lithography
year: 2009

abstract: Sensitivity limiting factors of at wavelength inspection for extreme UV lithography (EUVL) mask blanks have been analyzed. The sensitivity of the inspection tool is modeled on the basis of the inspection image of programmed multilayer defects and the characterized attributes of the tool components. The characterization includes point spread function (PSF) analysis of the imaging optics and the back illuminated charge coupled device (BI CCD) sensor as well as power spectral density (PSD) analysis of the mask blank surface. The statistical scaling of signal to noise ratio (SNR) in conjunction with the variables of optics, sensors, and mask blanks has predicted effective improvement paths of its sensitivity. Increasing the magnification of optics, reducing the total PSF, and improving the roughness of mask blanks will address the needs for its application in future generations. Signal intensity dependency on the geometrical attributes of defects is also studied by both experiment and electromagnetic simulation. It is revealed that the bottom height of defects and defect smoothing throughout the multilayer deposition significantly influence defect signal intensity. Comprehensive measures to accommodate a variety of defects and to mitigate associated risks are also discussed.
author_names: Yoshihiro Tezuka

Toshihiko Tanaka

Tsuneo Terasawa

Toshihisa Tomie
title: Sensitivity Limiting Factors of at Wavelength Extreme Ultraviolet Lithography Mask Blank Inspection
year: 2006

abstract: Stochastic induced roughness continues to be a major concern in the implementation of extreme ultraviolet (EUV) lithography for semiconductor high volume manufacturing, potentially limiting product yield or lithography throughput or both. For this reason considerable effort has been made in the last 10 years to characterize, understand, and reduce stochastic induced roughness of post lithography and post etch features. Despite these efforts, far too little progress has been made in reducing the effects of stochastics, such as linewidth roughness (LWR) line edge roughness (LER) local critical dimension uniformity (LCDU) and stochastic defectivity. [1]
author_names: Chris A Mack
title: Stochastic limitations to EUV lithography
venue: 2018 International Symposium on VLSI Technology, Systems and Application (VLSI TSA)
year: 2018

abstract: Extreme ultraviolet lithography (EUVL) mask multi layer (ML) blank surface roughness specification historically comes from blank defect inspection tool requirement. Later, new concerns on ML surface roughness induced wafer pattern line width roughness (LWR) arise. In this paper, we have studied wafer level pattern LWR as a function of EUVL mask surface roughness via High NA Actinic Reticle Review Tool. We found that the blank surface roughness induced LWR at current blank roughness level is in the order of 0.5nm 3s for NA=0.42 at the best focus. At defocus of 40nm, the corresponding LWR will be 0.2nm higher. Further reducing EUVL mask blank surface roughness will increase the blank cost with limited benefit in improving the pattern LWR, provided that the intrinsic resist LWR is in the order of 1nm and above.
author_names: Pei-yang Yan

Guojing Zhang

Eric M Gullikson

Ken Goldberg

Markus Benk
title: Understanding EUV mask blank surface roughness induced LWR and associated roughness requirement
venue: Advanced Lithography
year: 2015

abstract: In the last year, the continuous efforts on the development of extreme ultraviolet (EUV) lithography has allowed to push the lithographic performance of the EUV photoresists on the ASML NXE:3300 full field exposure tool. Today imec N7 node (equivalent to foundry N5) is the first scaling node at which industry will likely insert EUV into production which will bring a reduction in processing steps therefore reducing total cost of ownership [1] increasing yield and reducing time to ramp. However, the high volume manufacturing (HVM) requirement to have a cost effective low exposure dose photoresist <20mJ/cm2) remains a big challenge and roughness and pattern defectivity at nano scale are the major limiting factors of the lithographic process window of EUV resist when looking at tight pitches below 40nm [2, 3] To be effective during the lithographic EUV material screening phase for such tight pitches, it is necessary to implement complementary metrology analyses that can provide precise information on the resist roughness and a quick feedback on the quantification of nano failures (nano bridges, broken lines, merging or missing contacts) induced by a stochastic EUV patterning regime, the random nature of the light matter interaction and consequent chemical reactions. Beside the traditional approach to characterize a resist with metrics as exposure latitude (EL% depth of focus (DoF) and line edge roughness (LER) based on CDSEM measurements, we have used the power spectra density (PSD) [4] to get an unbiased value of the resist line roughness (LWR and LER) by using Fractilia metroLERTM commercial software. Further, we have used Stochalis imec software [5] to quantify patterning nano failures providing an early stage assessment on the patterning fidelity of the examined resists. We present the resist characterization results for 32nm dense line space pattern on different substrates and for 36nm dense and orthogonal contact hole pitch pattern for different photoresists. Two positive tone chemically amplified (CA) resists have been identified at the exposure dose of 45mJ/cm2 and 33mJ/cm2 for logic (pitch 32nm dense line/space) and memory (pitch 36nm dense contact holes) use cases, respectively.
author_names: Danilo de Simone

Vito Rutigliani

Gian Francesco Lorusso

Peter de Bisschop

Yannick Vesters

Victor M Blanco Carballo

Geert Vandenberghe
title: EUV photoresist patterning characterization for imec N7/N5 technology
venue: Advanced Lithography
year: 2018

abstract: As extreme ultraviolet lithography (EUVL) moves toward high volume manufacturing and pushes to increasingly smaller critical dimensions, achieving the stringent requirements for line edge roughness (LER) is increasingly challenging. For the 22 nm half pitch node and beyond, the International Roadmap for Semiconductors requires less than 1.6 nm of line width roughness (LWR) on the wafer. The major contributor of this tight LWR is wafer resist LER and mask LER. However, in current ITRS, there is no guideline for mask LER. While significant progress has been made to reduce the resist of the LER on the wafer, it is not yet clear how much the mask LER should be improved for a 22 nm half pitch node application. Additionally, there are various approaches to obtaining a smaller LER on the mask. It could be improved either by reducing well known statistical noise or manipulating some process condition or material. Both approaches are effective in improving the LER, however, they shows a different result in mask CD uniformity itself. In this paper, in addition to setting the criteria of the mask LER, we will discuss how tight the mask LER is required to be and what kind of approach is desirable with regards to the LER and CD uniformity. Finally, an analysis of the LER and CD variation provides some insights into the impact of the next generation mask infrastructure.
author_names: Byung-Gook Kim

Jin Choi

Sang-hee Lee

Chan-Uk Jeon
title: Impact of mask line edge roughness and statistical noise on next generation mask making
venue: Other Conferences
year: 2012