Search query: Thermal dewetting of Pt thin film: Etch-masks for the fabrication of semiconductor nanostructures

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abstract: Abstract Nanometer scale Pt metal islands formed by the dewetting of two dimensional film on SiO 2 dielectric materials during rapid thermal annealing were investigated. For the case of 30 nm thick Pt films, pattern formation and dewetting were initiated at temperatures of >600 degC. Controlling the annealing temperature and time as well as the thickness of the Pt metal film permitted the size and density of Pt islands to be controlled. Furthermore, the islands show good resistance to dry etching by a CF 4 based plasma for dielectric etching, indicating that the metal islands produced by dewetting are suitable for use as an etch mask in the fabrication of nano scale structures.
author_names: Ji-Myon Lee

Byung-il Kim
title: Thermal dewetting of Pt thin film Etch masks for the fabrication of semiconductor nanostructures
year: 2007

abstract: Transparent electronic devices formed on flexible substrates are expected to meet emerging technological demands where silicon based electronics cannot provide a solution. Examples of active flexible applications include paper displays and wearable computers. So far, mainly flexible devices based on hydrogenated amorphous silicon (a Si:H) and organic semiconductors have been investigated. However, the performance of these devices has been insufficient for use as transistors in practical computers and current driven organic light emitting diode displays. Fabricating high performance devices is challenging, owing to a trade off between processing temperature and device performance. Here, we propose to solve this problem by using a novel semiconducting material namely, a transparent amorphous oxide semiconductor from the In Ga Zn O system (a IGZO) for the active channel in transparent thin film transistors (TTFTs) The a IGZO is deposited on polyethylene terephthalate at room temperature and exhibits Hall effect mobilities exceeding 10 cm2 V 1 s 1, which is an order of magnitude larger than for hydrogenated amorphous silicon. TTFTs fabricated on polyethylene terephthalate sheets exhibit saturation mobilities of 6 9 cm2 V 1 s 1, and device characteristics are stable during repetitive bending of the TTFT sheet.
author_names: Kenji Nomura

Hiromichi Ohta

Akihiro Takagi

Toshio Kamiya

Masahiro Hirano

Hideo Hosono
title: Room temperature fabrication of transparent flexible thin film transistors using amorphous oxide semiconductors
venue: Nature
year: 2004

abstract: A Review of Materials Science. Vacuum Science and Technology. Physical Vapor Deposition. Chemical Vapor Deposition. Film Formation and Structure. Characterization of Thin Films. Epitaxy. Interdiffusion and Reactions in Thin Films. Mechanical Properties of Thin Films. Electrical and Magnetic Properties of Thin Films. Optical Properties of Thin Films. Metallurgical and Protective Coatings. Modification of Surfaces and Films. Emerging Thin Film Materials and Applications. Appendixes. Index.
author_names: Milton Ohring
title: The Materials Science of Thin Films
year: 1991

abstract: This article provides a comprehensive review of current research activities that concentrate on one dimensional (1D) nanostructures wires, rods, belts, and tubes whose lateral dimensions fall anywhere in the range of 1 to 100 nm. We devote the most attention to 1D nanostructures that have been synthesized in relatively copious quantities using chemical methods. We begin this article with an overview of synthetic strategies that have been exploited to achieve 1D growth. We then elaborate on these approaches in the following four sections: i) anisotropic growth dictated by the crystallographic structure of a solid material; ii) anisotropic growth confined and directed by various templates; iii) anisotropic growth kinetically controlled by supersaturation or through the use of an appropriate capping reagent; and iv) new concepts not yet fully demonstrated, but with long term potential in generating 1D nanostructures. Following is a discussion of techniques for generating various types of important heterostructured nanowires. By the end of this article, we highlight a range of unique properties (e.g. thermal, mechanical, electronic, optoelectronic, optical, nonlinear optical, and field emission) associated with different types of 1D nanostructures. We also briefly discuss a number of methods potentially useful for assembling 1D nanostructures into functional devices based on crossbar junctions, and complex architectures such as 2D and 3D periodic lattices. We conclude this review with personal perspectives on the directions towards which future research on this new class of nanostructured materials might be directed.
author_names: Younan Xia

Peidong Yang

Yugang Sun

Yiying Wu

Brian T Mayers

Byron D Gates

Yadong Yin

Franklin Kim

Haoquan Yan
title: One Dimensional Nanostructures: Synthesis, Characterization, and Applications
year: 2003

abstract: A method for fabrication of nano scale GaN structure by inductively coupled plasma etching is proposed, exploiting a thermal dewetting of Pt thin film as an etch mask. The nano scale Pt metal islands were formed by dewetting of continuous film on SiO2 dielectric materials during the rapid thermal annealing process. For the Pt films with thickness of 30 nm, temperatures of 600degC initiate pattern formation and the dewetting of Pt films. Controlling the annealing temperature and time as well as the thickness of Pt metal film could manifest the size and density of Pt islands. The activation energy for initiation of Pt metal dewet was calculated to be 23.2 kJ/mole. The islands show good resistance against dry etching using CF4 based plasma for dielectric etching, indicating that the metal island by dewetting of thin film is suitable for etch mask in the fabrication of nano scale structures. This fabrication method was also proven to be effective in the fabrications of GaN nanocolumns with widths as small as nanometer scale.
author_names: Ji-Myon Lee

Seong-Ju Park
title: Fabrication of nanostructures by dry etching using dewetted Pt islands as etch masks
venue: SPIE Optics Photonics
year: 2005

abstract: Principal goals in organic thin film transistor (OTFT) gate dielectric research include achieving: (i) low gate leakage currents and good chemical/thermal stability, (ii) minimized interface trap state densities to maximize charge transport efficiency, (iii) compatibility with both p and n channel organic semiconductors, (iv) enhanced capacitance to lower OTFT operating voltages, and (v) efficient fabrication via solution phase processing methods. In this Review, we focus on a prominent class of alternative gate dielectric materials: self assembled monolayers (SAMs) and multilayers (SAMTs) of organic molecules having good insulating properties and large capacitance values, requisite properties for addressing these challenges. We first describe the formation and properties of SAMs on various surfaces (metals and oxides) followed by a discussion of fundamental factors governing charge transport through SAMs. The last section focuses on the roles that SAMs and SAMTs play in OTFTs, such as surface treatments, gate dielectrics, and finally as the semiconductor layer in ultra thin OTFTs.
author_names: Sara A Dibenedetto

Antonio F Facchetti

Mark A Ratner

Tobin J Marks
title: Molecular self assembled monolayers and multilayers for organic and unconventional inorganic thin film transistor applications
year: 2009

abstract: Polymer solar cells are reviewed in the context of the processing techniques leading to complete devices. A distinction is made between the film forming techniques that are used currently such as spincoating, doctor blading and casting and the, from a processing point of view, more desirable film forming techniques such as slot die coating, gravure coating, knife over edge coating, off set coating, spray coating and printing techniques such as ink jet printing, pad printing and screen printing. The former are used almost exclusively and are not suited for high volume production whereas the latter are highly suited, but little explored in the context of polymer solar cells. A further distinction is made between printing and coating when a film is formed. The entire process leading to polymer solar cells is broken down into the individual steps and the available techniques and materials for each step are described with focus on the particular advantages and disadvantages associated with each case.
author_names: Frederik C Krebs
title: Fabrication and processing of polymer solar cells: A review of printing and coating techniques
year: 2009

abstract: A study of the dewetting behavior of platinum thin films on silicon was carried out to determine how variation of dewetting parameters affects the evolution of film morphology and to pinpoint which parameters yielded the smallest, most circular features. Platinum film thickness as well as dewetting time and temperature were varied and the film morphology characterized by means of scanning electron microscopy (SEM) analysis. Two different pathways of dewetting predicted in the literature (Vrij 1966 Discuss. Faraday Soc. 42 23, Becker et al 2003 Nat. Mater. 2 59 63) were observed. Depending on the initial criteria, restructuring of the film occurred via hole or droplet formation. With increased annealing time, a transition from an intermediate network structure to separated islands occurred. In addition, the formation of multilayered films, silicide crystals and nanowires occurred for certain parameters. Nevertheless, the dewetting behavior witnessed could be related to physical processes. Droplets with a mean diameter of 9 nm were formed by using a 1.5 nm thick platinum film annealed at 800 degC for 30 s. To demonstrate the suitability of the annealed films for further processing, we then used the dewetted films as masks for reactive ion etching to transfer the pattern into the silicon substrate, forming tapered nanopillars.
author_names: S Strobel

Christopher R Kirkendall

Jae-Byum Chang

Karl K Berggren
title: Sub 10 nm structures on silicon by thermal dewetting of platinum.
venue: Nanotechnology
year: 2010

abstract: In this paper, a simple and feasible method to fabricate a Ni nanodot mask on a silicon substrate is reported. Without using a high cost rapid thermal annealing (RTA) furnace, this method was based on the conventional thermal annealing of a Ni layer deposited on a Si substrate. In addition, the influences of the Ni layer thickness and annealing conditions on the size and density of the Ni nanodots were systematically investigated. The as prepared Ni nanodots were well distributed, having a uniform size and a regular spherical shape. Moreover, a Si nanopillar array could be fabricated by inductively coupled plasma (ICP) etching using the as obtained Ni nanodot array mask.
author_names: Xinliang Kuang

J Tian

H B Guo

Yu Hou

Hui Zhang

T Y Liu
title: Feasible method to fabricate a nickel nanodot mask on a silicon substrate with conventional thermal annealing
year: 2018

abstract: This paper presents a non lithographic approach to generate wafer scale single crystal silicon nanowires (SiNWs) with controlled sidewall profile and surface morphology. The approach begins with silver (Ag) thin film thermal dewetting, gold (Au) deposition and lift off to generate a large scale Au mesh on Si substrates. This is followed by metal assisted chemical etching (MacEtch) where the Au mesh serves as a catalyst to produce arrays of smooth Si nanowires with tunable taper up to 13deg. The mean diameter of the thus fabricated SiNWs can be controlled to range from 62 to 300 nm with standard deviations as small as 13.6 nm, and the areal coverage of the wire arrays can be up to 46% Control of the mean wire diameter is achieved by controlling the pore diameter of the metallic mesh which is, in turn, controlled by adjusting the initial thin film thickness and deposition rate. To control the wire surface morphology, a post fabrication roughening step is added to the approach. This step uses Au nanoparticles and slow rate MacEtch to produce rms surface roughness up to 3.6 nm.
author_names: Bruno Azeredo

Jyothi S Sadhu

J W Ma

Klaus Jacobs

Jeongyong Kim

Kipoong Lee

James H Eraker

Xufeng Li

Sanjiv Sinha

Nicholas Xuanlai Fang

P N Ferreira

Keng Hao Hsu
title: Silicon nanowires with controlled sidewall profile and roughness fabricated by thin film dewetting and metal assisted chemical etching.
venue: Nanotechnology
year: 2013