Search query: hardware trojan detection

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abstract: Hardware Trojan refers to an unintended or undesirable alteration in many circuits which turned out to be a major challenge for the design and fabrication of integrated circuits for the semiconductor industries. Such a challenge has been addressed in numerous critical applications. Due to their diversity and process variation, Trojans vary in terms of detection and prevention methods. This paper proposes a novel technique for the Trojan detection involving the application of self examining circuits. This method adequately resists against the PV and scalability and do not need to any golden ICs. Segmenting the circuit enables the technique to both detect and locate the Trojans with a quick possible time. The implementation of this method indicates a significant improvement in the detection rate.
author_names: Amin Bazzazi

Mohammad Taghi Manzuri
title: Proposing a Novel Method for Hardware Trojan Detection
year: 2019

abstract: Traditionally many fabless companies outsource the fabrication of IC design to the foundries, which may not be trusted always. In order to ensure trusted IC's it is more significant to develop an efficient technique that detects the presence of hardware Trojan. This malicious insertion causes the logic variation in the nets or leaks some sensitive information from the chip, which reduces the reliability of the system. The conventional testing algorithm for generating test vectors reduces the detection sensitivity due to high process variations. In this work, we present a compressive sensing approach, which can significantly generate optimal test patterns compared to the ATPG vectors. This approach maximizes the probability of Trojan circuit activation, with a high level of Trojan detection rate. The side channel analysis such as power signatures are measured at different time stamps to isolate the Trojan effects. The effect of process noise is minimized by this power profile comparison approach, which provides high detection sensitivity for varying Trojan size and eliminates the requirement of golden chip. The proposed test generation approach is validated on ISCAS benchmark circuits, which achieves Trojan detection coverage on an average of 88.6% reduction in test length when compared to random pattern.
author_names: Priya M

M Nirmala Devi
title: A compressive sensing algorithm for hardware trojan detection
venue: International Journal of Electrical and Computer Engineering (IJECE)
year: 2019

abstract: Due to the globalization of integrated circuit design and manufacturing, hardware Trojan has become a serious security threat. In this paper, we decompose redundant thermal maps to extract Trojan activity factor using factor analysis to implement hardware Trojan detection and location. Xilinx FPGAs configured with the benchmark circuits from Trust hub are utilized to evaluate our proposed countermeasure. The results indicate that hardware Trojans with less than 20 gates can be detected.
author_names: Yongkang Tang

Liang Fang

Shaoqing Li
title: Activity Factor Based Hardware Trojan Detection and Localization
venue: J. Electron. Test.
year: 2019

abstract: Due to the globalization of the design and fabrication process of integrated circuits (ICs) ICs are becoming vulnerable to hardware Trojans. Most of the existing hardware Trojan detection works assume that the testing stage is trustworthy. However, testing parties may collude with malicious attackers and modify the results of hardware Trojan detection. In this paper, two attack models for untrustworthy testing parties are formulated. We further propose an adversarial data generation method for untrustworthy testing parties to modify the collected test data. Then, we propose a novel hybrid clustering ensemble method to build a trusted hardware Trojan detection method (clustering ensemble based hardware Trojan detection method) against untrustworthy testing parties. To alleviate the impact of process variations and noises on hardware Trojan detection in the actual measurement, the unsupervised correlation based feature selection method is exploited to process the raw test data of ICs for feature selection. The proposed method can eliminate the need of the fabricated golden chips and the simulated golden models. It can also resist the malicious modifications on Trojan detection results introduced by untrustworthy testing parties. Besides, the following problems and questions are also theoretically analyzed and answered: 1) the number of necessary testing parties; 2) the time overhead and the computational overhead of the proposed method; 3) how to choose the basic clustering algorithms (by using a proposed diversity analysis algorithm) and 4) the reason why the proposed clustering ensemble method is superior to the majority voting method. Both the EDA evaluation on ISCAS89 benchmarks and field programmable gate array evaluation on Trust HUB benchmarks are performed to evaluate the performance of the proposed method. Experimental results demonstrate that the proposed method can resist malicious modifications robustly and can detect hardware Trojans with high accuracy (up to 93.75% Meanwhile, the introduced time overhead is small.
author_names: Mingfu Xue

Rongzhen Bian

Weiqiang Liu

Jian Wang
title: Defeating Untrustworthy Testing Parties: A Novel Hybrid Clustering Ensemble Based Golden Models Free Hardware Trojan Detection Method
venue: IEEE Access
year: 2019

abstract: Globalization trend in integrated circuit design and manufacturing process has increased the vulnerability of integrated circuit. These vulnerabilities mainly caused by hardware Trojan have a serious impact on the security of integrated circuits. Although side channel analysis approach is the most promising Trojan detection approach, nearly all side channel analysis approaches rely heavily on the availability of golden chips, which are extremely difficult to obtain. In this paper, a golden layout model instead of fabricated golden chips is introduced for the practical application of hardware Trojan detection approaches. The simulated voltage variations generated from the golden layout model at different process corners serve as golden reference, thus fabricated golden chips are not required during detection. Further, silicon measurements are performed to obtain the voltage variations of fabricated chips, and a model calibration algorithm is utilized to calibrate the golden model in the presence of process variations and random noise. Finally, the Trojan detection is formulated as a two class classification problem, and the Trojan is identified using the partitioning around medoids algorithm. Experimental results demonstrate that the similarities between the simulated traces and measured traces are greater than 98.81% and the proposed approach distinguishes the Trojan chips correctly even under 15% process variation.
author_names: Yanjiang Liu

Jiaji He

Haocheng Ma

Yiqiang Zhao
title: Hardware Trojan Detection Leveraging a Novel Golden Layout Model Towards Practical Applications
venue: J. Electron. Test.
year: 2019

abstract: In this paper, reconfigurable assertion checkers (RACs) are proposed for hardware Trojan detection on a system on chip (SoC) A modified circuit design flow to incorporate RACs into an SoC is proposed. A flexible RAC architecture is developed to implement different types of assertions. Case studies of mapping a simple assertion checker into RAC are given. The utilization of RAC in detecting hardware Trojans is demonstrated in two advanced microcontroller bus architecture (AMBA) case studies: a denial of service (DoS) hardware Trojan and a leak of information hardware Trojan. In both cases, our proposed RAC was able to detect the hardware Trojan whenever the Trojan was triggered.
author_names: Uthman Alsaiari

Fayez Gebali
title: Hardware Trojan Detection Using Reconfigurable Assertion Checkers
venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
year: 2019

abstract: A method to detect hardware Trojan in gate level netlist is proposed using deep learning technique. The paper shows that it is easy to identify genuine nodes and Trojan infected nodes based on controllability and transition probability values of a given Trojan infected circuit. The controllability and transition probability characteristics of Trojan infected nodes show large inter cluster distance from the genuine nodes so that it is easy to cluster the nodes as Trojan infected nodes and genuine nodes. From a given circuit, controllability and transition probability values are extracted as Trojan features using deep learning algorithm and clustering the data using k means clustering. The technique is validated on ISCAS'85 benchmark circuits, and it does not require any golden model as reference. The proposed method can detect all Trojan infected nodes in less than 6 s with zero false positive and zero false negative detection accuracy.
author_names: K V Reshma

M Priyatharishini

M Nirmala Devi
title: Hardware Trojan Detection Using Deep Learning Technique
year: 2019

abstract: Hardware trojan (HT) is increasingly becoming a major threat in the integrated circuit (IC) industry. Among all the countermeasures, academia is currently paying their most attention to the side channel ones. However, most of the existing side channel countermeasures need fabricated golden chips that are difficult to obtain practically. In this article, we propose a novel strategy for HT detection using the target chip's quiescent thermal maps and its active area (AA) shape from the GDS II file. The AA shape cannot expose the design information of the target chip and serves as the golden reference, which means that our countermeasure does not need fabricated golden chips anymore. In addition, this countermeasure cannot be influenced by process variation (PV) from the perspective of our detection mechanism. The results of the experiment on our designed YinHeFeiTeng digital signal processor (YHFT DSP) indicate that our countermeasure can effectively detect trojans with a very small scale.
author_names: Yongkang Tang

Shaoqing Li

Liang Fang

Xiao Hu

Jihua Chen
title: Golden Chip Free Hardware Trojan Detection Through Quiescent Thermal Maps
venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
year: 2019

abstract: Hardware Trojan (HT) is a malicious modification of the integrated circuits during design or fabrication processes. It can extract the secret information or change the circuit behavior. Many HT detection techniques have been proposed in recent years. This paper focuses on side channel analysis (SCA) based approach due to its advantages over other approaches. We review the state of the art researches, present a proposed path delay based SCA method and discuss the trend for developing new HT detection techniques in the future.
author_names: Thi-Tam Hoang

Thai-Ha Tran

Van-Phuc Hoang

Xuan Nam Tran

Cong-Kha Pham
title: Hardware Trojan Detection Techniques Using Side Channel Analysis
venue: 2019 6th NAFOSTED Conference on Information and Computer Science (NICS)
year: 2019

abstract: Hardware Trojan (HT) refers to a special module intentionally implanted into a chip or an electronic system. The module can be exploited by the attacker to achieve destructive functions. Unfortunately the HT is difficult to detecte due to its minimal resource occupation. In order to achieve an accurate detection with high efficiency, a HT detection method based on the electromagnetic leakage of the chip is proposed in this paper. At first, the dimensionality reduction and the feature extraction of the electromagnetic leakage signals in each group (template chip, Trojan free chip and target chip) were realized by principal component analysis (PCA) Then, the Mahalanobis distances between the template group and the other groups were calculated. Finally, the differences between the Mahalanobis distances and the threshold were compared to determine whether the HT had been implanted into the target chip. In addition, the concept of the HT Detection Quality (HTDQ) was proposed to analyze and compare the performance of different detection methods. Our experiment results indicate that the accuracy of this detection method is 91.93% and the time consumption is 0.042s in average, which shows a high HTDQ compared with three other methods.
author_names: Lei Zhang

Youheng Dong

Jianxin Wang

Chaoen Xiao

Ding Ding
title: A hardware Trojan detection method based on the electromagnetic leakage
venue: China Communications
year: 2019