Question: What is the full name of the 1991 alliance that created the instruction set implemented by the x704 microprocessor?

Context articles: X704
R4200
Mensch Computer
PA-7100LC
Stanford MIPS
PowerPC
Binary translation
DEC Alpha
Transmeta Crusoe
X87

The x704 is a microprocessor that implements the 32-bit version of the PowerPC instruction set architecture (ISA) developed by Exponential Technology.
 The microprocessor was notable for its high clock frequency (for the time, circa 1997) in the range of 400 to 533 MHz, its use of bipolar transistors for logic and CMOS circuits for memory, and its failure to see use in an Apple Macintosh, the opposite of what industry observers such as "Microprocessor Report" expected.
 Exponential Technology eventually failed as a result of the x704's lack of success, but some of its former employees founded Intrinsity, a start-up that developed a high clock frequency MIPS implementation, FastMath.
 The company has now left the microprocessor business and licenses Fast14 dynamic logic to third parties such as ATI for their GPUs.
The R4200 is a microprocessor designed by MIPS Technologies, Inc. (MTI) that implemented the MIPS III instruction set architecture (ISA).
 It was also known as the VRX during development.
 The microprocessor was licensed to NEC, and the company fabricated and marketed it as the VR4200.
 The first VR4200, an 80 MHz part, was introduced in 1993.
 A faster 100 MHz part became available in 1994.
 The R4200 was developed specifically for low-power Windows NT computers such as personal computers and laptops.
 MTI claimed the microprocessor's integer performance was greater than that of a high-end Intel i486 and 80% of a P5-variant Pentium microprocessor.
 The R4200 ultimately did not see any use in personal computers and was repositioned as an embedded microprocessor that competed with the R4600.
 The R4300i variant was used in the widely popular Nintendo 64 video game console.
The Mensch Computer is a computer system based on the WDC 65C265 microcontroller (which implements both the 16-bit instruction set of the W65C816/65816 microprocessor, as well as the 8-bit instruction set of the 6502 microprocessor) and produced by the Western Design Center.
 The computer system is named after Bill Mensch, designer of the 6502 and subsequent series of microprocessor.
The PA-7100LC is a microprocessor that implements the PA-RISC 1.1 instruction set architecture (ISA) developed by Hewlett-Packard (HP).
 It is also known as the "PCX-L", and by its code-name, "Hummingbird".
 It was designed as a low-cost microprocessor for low-end systems.
 The first systems to feature the PA-7100LC were introduced in January 1994.
 These systems used 60 and 80 MHz parts.
 A 100 MHz part debuted in June 1994.
 The PA-7100LC was the first PA-RISC microprocessor to implement the MAX-1 multimedia instructions, an early single instruction, multiple data (SIMD) multimedia instruction set extension that provided instructions for improving the performance of MPEG video decoding.
MIPS (an acronym for Microprocessor without Interlocked Pipeline Stages) was a research project conducted at Stanford University between 1981 and 1984.
 MIPS investigated a type of instruction set architecture (ISA) now called Reduced Instruction Set Computer (RISC), its implementation as a microprocessor with very large scale integration (VLSI) semiconductor technology, and the effective exploitation of RISC architectures with optimizing compilers. MIPS, together with the IBM 801 and Berkeley RISC, are the three research projects that pioneered and popularized RISC technology in the mid-1980s.
 In recognition of the impact MIPS made on computing, Hennessey was awarded the IEEE John von Neumann Medal in 2000 by the IEEE (shared with David A. Patterson), the Eckert–Mauchly Award in 2001 by the Association for Computing Machinery, and the Seymour Cray Computer Engineering Award in 2001 by the IEEE Computer Society.
PowerPC (a backronym for Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computer instruction set architecture created by the 1991 Apple–IBM–Motorola alliance, known as "AIM".
 PowerPC, as an evolving instruction set, has since 2006 been named Power ISA, while the old name naturally lives on, as a legacy trademark for some implementations of Power Architecture based processors, and in software package identifiers.
In computing, binary translation (or (binary) recompilation) is the emulation of one instruction set by another through translation of binary code.
 Sequences of instructions are translated from the "source" to the "target" instruction set.
 In some cases such as instruction set simulation, the target instruction set may be the same as the source instruction set, providing testing and debugging features such as instruction trace, conditional breakpoints and hot spot detection.
Alpha, originally known as Alpha AXP, is a 64-bit reduced instruction set computing (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC), designed to replace their 32-bit VAX complex instruction set computer (CISC) ISA.
 Alpha was implemented in microprocessors originally developed and fabricated by DEC.
 These microprocessors were most prominently used in a variety of DEC workstations and servers, which eventually formed the basis for almost all of their mid-to-upper-scale lineup.
 Several third-party vendors also produced Alpha systems, including PC form factor motherboards.
The Crusoe is a family of x86-compatible microprocessors developed by Transmeta and introduced in 2000.
 Crusoe was notable for its method of achieving x86 compatibility.
 Instead of the instruction set architecture being implemented in hardware, or translated by specialized hardware, the Crusoe runs a software abstraction layer, or a virtual machine, known as the Code Morphing Software (CMS).
 The CMS translates machine code instructions received from programs into native instructions for the microprocessor.
 In this way, the Crusoe can emulate other instruction set architectures (ISAs).
x87 is a floating point-related subset of the x86 architecture instruction set.
 It originated as an extension of the 8086 instruction set in the form of optional floating point coprocessors that worked in tandem with corresponding x86 CPUs.
 These microchips had names ending in "87".
 This was also known as the NPX ("Numeric Processor eXtension").
 Like other extensions to the basic instruction set, x87-instructions are not strictly needed to construct working programs, but provide hardware and microcode implementations of common numerical tasks, allowing these tasks to be performed much faster than corresponding machine code routines can.
 The x87 instruction set includes instructions for basic floating point operations such as addition, subtraction and comparison, but also for more complex numerical operations, such as the computation of the tangent function and its inverse, for example.