Question: Where did the namesake of the Kilby International Awards take part in the realization of the integrated circuit at?

Context articles: Integrated Circuit Topography Act
Jack Kilby
Kilby International Awards
Photonic integrated circuit
Integrated circuit layout
Robert Noyce
IC layout editor
Circuit design
Bernard A Yurash
Boundary scan

The Integrated Circuit Topography Act ("An Act to provide for the protection of integrated circuit topographies and to amend certain Acts in consequence thereof", C-37) is legislation passed by the Parliament of Canada in 1990 that regulates the intellectual property of integrated circuit topographies.
 It came into force in 1993.
 The Act provides exclusive rights for the creator of the integrated circuit topography and remedies to deter infringement.
 The exclusive right is transferable.
 To receive the exclusive right to an integrated circuit topography the topography must be registered at the Canadian Intellectual Property Office.
 Between 1993 and 1999 there were about 38 registrations under the Act.
Jack St. Clair Kilby (November 8, 1923 – June 20, 2005) was an American electrical engineer who took part (along with Robert Noyce) in the realization of the first integrated circuit while working at Texas Instruments (TI) in 1958.
 He was awarded the Nobel Prize in Physics on December 10, 2000.
 To congratulate him, American President Bill Clinton wrote, "You can take pride in the knowledge that your work will help to improve lives for generations to come."
The Kilby International Awards was an award created by the High Tech Committee of the North Dallas Chamber of Commerce, in 1990 to boost interest in the area.
 It was named after inventor Jack Kilby.
 The awards were bestowed at the Chamber's annual "Salute to High Technology" dinners, except for the 2003 Awards, which were held in London.
A photonic integrated circuit (PIC) or integrated optical circuit is a device that integrates multiple (at least two) photonic functions and as such is similar to an electronic integrated circuit.
 The major difference between the two is that a photonic integrated circuit provides functions for information signals imposed on optical wavelengths typically in the visible spectrum or near infrared 850 nm-1650 nm.
Integrated circuit layout, also known IC layout, IC mask layout, or mask design, is the representation of an integrated circuit in terms of planar geometric shapes which correspond to the patterns of metal, oxide, or semiconductor layers that make up the components of the integrated circuit.
Robert Norton Noyce (December 12, 1927 – June 3, 1990), nicknamed "the Mayor of Silicon Valley," co-founded Fairchild Semiconductor in 1957 and Intel Corporation in 1968.
 He is also credited (along with Jack Kilby) with the realization of the first integrated circuit or microchip that fueled the personal computer revolution and gave Silicon Valley its name.
An Integrated circuit layout editor or IC layout editor is an electronic design automation software tool that allows a user to digitize the shapes and patterns that form an integrated circuit.
 Typically the view will include the components ( usually as pcells ), metal routing tracks, vias and electrical pins.
 Software of this type is similar to computer aided drafting software, but is specialized for the task of integrated circuit layout.
 The typical flow for the layout of analog circuits might be :
The process of circuit design can cover systems ranging from complex electronic systems all the way down to the individual transistors within an integrated circuit.
 For simple circuits the design process can often be done by one person without needing a planned or structured design process, but for more complex designs, teams of designers following a systematic approach with intelligently guided computer simulation are becoming increasingly common.
 In integrated circuit design automation, the term "circuit design" often refers to the step of the design cycle which outputs the schematics of the integrated circuit.
 Typically this is the step between logic design and physical design.
Bernard A Yurash (February 17, 1921 – January 25, 2007) was a significant contributor to the creation of the first commercially viable CMOS integrated circuits by finding the sources of mobile sodium ions coming from the manufacturing process.
 Today, virtually all digital electronics use CMOS circuitry.
 Bernard worked at Fairchild Semiconductor in Silicon Valley from 1958 ( he was employee number 158 ), through the buyouts of the company by Schlumberger and National Semiconductor, and finally retiring in 1990.
 In the 1960s Fairchild Semiconductor, a division of Fairchild Camera and Instrument Corp., and Texas Instruments, revolutionized electronics by employing the first integrated circuit technology.
 Fairchild's Robert Noyce filed for this patent using deposited (printed) metal lines and Jean Hoerni's Planar Process ( patent also filed by Jack Kilby of Texas Instruments but with using bonding wires ).
 At the time virtually all the devices were of the bipolar type which were used to construct RTL and DTL type circuits ( Resistor-Transistor-Logic, Diode-Transistor-Logic), which unfortunately drew more power than was desired, and eventually lost ground to Texas Instruments' TTL (Transistor-Transistor-logic).
 The next great technological leap in computer chips would be CMOS transistors, which promised significantly lower power and greater circuit density than the Bipolar circuitry.
 Although Frank Wanlass first filed for the CMOS patent in 1963, Fairchild could not produce the devices for commercial output for many years because of the mystery of the mobile ions degrading their performance.
 Much research time and money was expended in 1967 and 1968 at Fairchild on trying to manufacture the highly promising technology, the MOS SGT ( Metal Oxide Semiconductor Silicon Gate Technology ) circuits utilizing the field effect from the "gate" on the conducting "channel" from source to drain.
Boundary scan is a method for testing interconnects (wire lines) on printed circuit boards or sub-blocks inside an integrated circuit.
 Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage, or analyze sub-blocks inside an integrated circuit.