Repository: Baekalfen/PyBoy
File: pyboy/core/ram.py (Python)

Code before:
# GitHub: https://github.com/Baekalfen/PyBoy
#

import array
import random

# MEMORY SIZES
INTERNAL_RAM0 = 8 * 1024 # 8KiB
NON_IO_INTERNAL_RAM0 = 0x60
IO_PORTS = 0x4C
NON_IO_INTERNAL_RAM1 = 0x34
INTERNAL_RAM1 = 0x7F
INTERRUPT_ENABLE_REGISTER = 1


class RAM:
    def __init__(self, randomize=False):
        self.internal_ram0 = array.array("B", [0] * (INTERNAL_RAM0))
        self.non_io_internal_ram0 = array.array("B", [0] * (NON_IO_INTERNAL_RAM0))
        self.io_ports = array.array("B", [0] * (IO_PORTS))
        self.internal_ram1 = array.array("B", [0] * (INTERNAL_RAM1))
        self.non_io_internal_ram1 = array.array("B", [0] * (NON_IO_INTERNAL_RAM1))
        self.interrupt_register = array.array("B", [0] * (INTERRUPT_ENABLE_REGISTER))

        if randomize: # NOTE: In real life, the RAM is scrambled with random data on boot.
            for mem in (self.internal_ram0, self.non_io_internal_ram0, self.io_ports, self.internal_ram1,
                      self.non_io_internal_ram1, self.interrupt_register):
                for i in range(len(mem)):
                    mem[i] = random.getrandbits(8)

    def save_state(self, f):
        for n in range(INTERNAL_RAM0):
            f.write(self.internal_ram0[n])
        for n in range(NON_IO_INTERNAL_RAM0):
            f.write(self.non_io_internal_ram0[n])
        for n in range(IO_PORTS):
            f.write(self.io_ports[n])
        # TODO: Order of INTERNAL_RAM1 and NON_IO_INTERNAL_RAM1 is flipped
        for n in range(INTERNAL_RAM1):
            f.write(self.internal_ram1[n])
        for n in range(NON_IO_INTERNAL_RAM1):
            f.write(self.non_io_internal_ram1[n])
        for n in range(INTERRUPT_ENABLE_REGISTER):
            f.write(self.interrupt_register[n])

    def load_state(self, f, state_version):
        for n in range(INTERNAL_RAM0):
            self.internal_ram0[n] = f.read()
        for n in range(NON_IO_INTERNAL_RAM0):
            self.non_io_internal_ram0[n] = f.read()
        for n in range(IO_PORTS):

Review comment (suggestion):
[FEA0-FEFF range seems not to be randomized on DMG](https://gbdev.io/pandocs/#fea0-feff-range)
Also, not really important, but maybe write _hardware_ instead of _real life_?
```suggestion
            for mem in (self.internal_ram0, self.internal_ram1):
```

Code after:
# GitHub: https://github.com/Baekalfen/PyBoy
#

from array import array
from random import getrandbits

# MEMORY SIZES
INTERNAL_RAM0 = 8 * 1024 # 8KiB
NON_IO_INTERNAL_RAM0 = 0x60
IO_PORTS = 0x4C
NON_IO_INTERNAL_RAM1 = 0x34
INTERNAL_RAM1 = 0x7F
INTERRUPT_ENABLE_REGISTER = 1


class RAM:
    def __init__(self, randomize=False):
        self.internal_ram0 = array("B", [0] * (INTERNAL_RAM0))
        self.non_io_internal_ram0 = array("B", [0] * (NON_IO_INTERNAL_RAM0))
        self.io_ports = array("B", [0] * (IO_PORTS))
        self.internal_ram1 = array("B", [0] * (INTERNAL_RAM1))
        self.non_io_internal_ram1 = array("B", [0] * (NON_IO_INTERNAL_RAM1))
        self.interrupt_register = array("B", [0] * (INTERRUPT_ENABLE_REGISTER))

        if randomize:
            for i in range(INTERNAL_RAM0):
                self.internal_ram0[i] = getrandbits(8)
            for i in range(NON_IO_INTERNAL_RAM0):
                self.non_io_internal_ram0[i] = getrandbits(8)
            for i in range(INTERNAL_RAM1):
                self.internal_ram1[i] = getrandbits(8)
            for i in range(NON_IO_INTERNAL_RAM1):
                self.non_io_internal_ram1[i] = getrandbits(8)

    def save_state(self, f):
        for n in range(INTERNAL_RAM0):
            f.write(self.internal_ram0[n])
        for n in range(NON_IO_INTERNAL_RAM0):
            f.write(self.non_io_internal_ram0[n])
        for n in range(IO_PORTS):
            f.write(self.io_ports[n])
        # TODO: Order of INTERNAL_RAM1 and NON_IO_INTERNAL_RAM1 is flipped
        for n in range(INTERNAL_RAM1):
            f.write(self.internal_ram1[n])
        for n in range(NON_IO_INTERNAL_RAM1):
            f.write(self.non_io_internal_ram1[n])
        for n in range(INTERRUPT_ENABLE_REGISTER):
            f.write(self.interrupt_register[n])

    def load_state(self, f, state_version):
        for n in range(INTERNAL_RAM0):