Repository: llvm/llvm-project
File: llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp (C++)

Code before:
      .addDef(ResVReg)
      .addUse(GR.getSPIRVTypeID(ResType))
      .addUse(Cmp0)
      .addUse(Cmp1)
      .setMIFlags(I.getFlags())
      .constrainAllUses(TII, TRI, RBI);
  return true;
}

bool SPIRVInstructionSelector::selectICmp(Register ResVReg,
                                          SPIRVTypeInst ResType,
                                          MachineInstr &I) const {
  auto Pred = I.getOperand(1).getPredicate();
  unsigned CmpOpc;

  Register CmpOperand = I.getOperand(2).getReg();
  if (GR.isScalarOfType(CmpOperand, SPIRV::OpTypePointer))
    CmpOpc = getPtrCmpOpcode(Pred);
  else if (GR.isScalarOrVectorOfType(CmpOperand, SPIRV::OpTypeBool))
    CmpOpc = getBoolCmpOpcode(Pred);
  else
    CmpOpc = getICmpOpcode(Pred);
  return selectCmp(ResVReg, ResType, CmpOpc, I);
}

Register
SPIRVInstructionSelector::buildI32Constant(uint32_t Val, MachineInstr &I,
                                           SPIRVTypeInst ResType) const {
  Type *LLVMTy = IntegerType::get(GR.CurMF->getFunction().getContext(), 32);
  SPIRVTypeInst SpvI32Ty =
      ResType ? ResType : GR.getOrCreateSPIRVIntegerType(32, I, TII);
  // Find a constant in DT or build a new one.
  auto ConstInt = ConstantInt::get(LLVMTy, Val);
  Register NewReg = GR.find(ConstInt, GR.CurMF);
  if (!NewReg.isValid()) {
    NewReg = MRI->createGenericVirtualRegister(LLT::scalar(64));
    MachineBasicBlock &BB = *I.getParent();
    MachineInstr *MI =
        Val == 0
            ? BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantNull))
                  .addDef(NewReg)
                  .addUse(GR.getSPIRVTypeID(SpvI32Ty))
            : BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantI))
                  .addDef(NewReg)
                  .addUse(GR.getSPIRVTypeID(SpvI32Ty))
                  .addImm(APInt(32, Val).getZExtValue());
    constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
    GR.add(ConstInt, MI);
  }
  return NewReg;
}

Review comment (suggestion):
Flip this branch and do an early return 
```suggestion
  if (!STI.canUseExtInstSet(SPIRV::InstructionSet::GLSL_std_450))
    return false;
```

Code after:
                  .addUse(GR.getSPIRVTypeID(SpvI32Ty))
            : BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantI))
                  .addDef(NewReg)
                  .addUse(GR.getSPIRVTypeID(SpvI32Ty))
                  .addImm(APInt(32, Val).getZExtValue());
    constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
    GR.add(ConstInt, MI);
  }
  return NewReg;
}

bool SPIRVInstructionSelector::selectFCmp(Register ResVReg,
                                          SPIRVTypeInst ResType,
                                          MachineInstr &I) const {
  unsigned CmpOp = getFCmpOpcode(I.getOperand(1).getPredicate());
  return selectCmp(ResVReg, ResType, CmpOp, I);
}

bool SPIRVInstructionSelector::selectExp10(Register ResVReg,
                                           SPIRVTypeInst ResType,
                                           MachineInstr &I) const {
  if (STI.canUseExtInstSet(SPIRV::InstructionSet::OpenCL_std)) {
    return selectExtInst(ResVReg, ResType, I, CL::exp10);
  }

  if (STI.canUseExtInstSet(SPIRV::InstructionSet::GLSL_std_450)) {
    /// There is no exp10 in GLSL. Use exp10(x) = exp2(x * log2(10)) instead
    /// log2(10) ~= 3.3219280948874l

    if (ResType->getOpcode() != SPIRV::OpTypeVector &&
        ResType->getOpcode() != SPIRV::OpTypeFloat)
      return false;

    MachineIRBuilder MIRBuilder(I);

    SPIRVTypeInst SpirvScalarType = ResType->getOpcode() == SPIRV::OpTypeVector
                                        ? SPIRVTypeInst(GR.getSPIRVTypeForVReg(
                                              ResType->getOperand(1).getReg()))
                                        : ResType;

    assert(SpirvScalarType->getOperand(1).getImm() == 32 &&
           "only float operands supported by GLSL extended math");

    Register ConstReg = GR.buildConstantFP(APFloat(3.3219280948874f),
                                           MIRBuilder, SpirvScalarType);
    Register ArgReg = MRI->createVirtualRegister(GR.getRegClass(ResType));
    auto Opcode = ResType->getOpcode() == SPIRV::OpTypeVector
                      ? SPIRV::OpVectorTimesScalar
                      : SPIRV::OpFMulS;

    if (!selectOpWithSrcs(ArgReg, ResType, I,