Repository: raspberrypi/pico-sdk
File: src/rp2_common/hardware_adc/include/hardware/adc.h (C/C++)

Code before:
}

/*! \brief Enable or disable free-running sampling mode
 *  \ingroup hardware_adc
 *
 * \param run false to disable, true to enable free running conversion mode.
 */
static inline void adc_run(bool run) {
    if (run)
        hw_set_bits(&adc_hw->cs, ADC_CS_START_MANY_BITS);
    else
        hw_clear_bits(&adc_hw->cs, ADC_CS_START_MANY_BITS);
}

/*! \brief Set the ADC Clock divisor
 *  \ingroup hardware_adc
 *
 * Period of samples will be (1 + div) cycles on average. Note it takes 96 cycles to perform a conversion,
 * so any period less than that will be clamped to 96.
 *
 * \param clkdiv If non-zero, conversion will be started at intervals rather than back to back.
 */
static inline void adc_set_clkdiv(float clkdiv) {
    invalid_params_if(HARDWARE_ADC, clkdiv >= 1 << (ADC_DIV_INT_MSB - ADC_DIV_INT_LSB + 1));
#if PICO_ADC_CLKDIV_ROUND_NEAREST
    clkdiv += 0.5f / (1 << ADC_DIV_INT_LSB); // round to the nearest fraction
#endif
    adc_hw->div = (uint32_t)(clkdiv * (float) (1 << ADC_DIV_INT_LSB));
}

/*! \brief Setup the ADC FIFO
 *  \ingroup hardware_adc
 *
 * \if rp2040_specific
 * On RP2040 the FIFO is 4 samples long.
 * \endif
 *
 * \if rp2350_specific
 * On RP2350 the FIFO is 8 samples long.
 * \endif
 * 
 * If a conversion is completed and the FIFO is full, the result is dropped.
 *
 * \param en Enables write each conversion result to the FIFO
 * \param dreq_en Enable DMA requests when FIFO contains data
 * \param dreq_thresh Threshold for DMA requests/FIFO IRQ if enabled.
 * \param err_in_fifo If enabled, bit 15 of the FIFO contains error flag for each sample
 * \param byte_shift Shift FIFO contents to be one byte in size (for byte DMA) - enables DMA to byte buffers.
 */
 static inline void adc_fifo_setup(bool en, bool dreq_en, uint16_t dreq_thresh, bool err_in_fifo, bool byte_shift) {
    hw_write_masked(&adc_hw->fcs,

Review comment (suggestion):
I guess "theoretically" it might be better to use `(ADC_DIV_FRAC_MSB + 1 - ADC_DIV_FRAC_LSB)` rather than `ADC_DIV_INT_LSB` ? :thinking: (assuming of course that I'm understanding this correctly)

Code after:
}

/*! \brief Enable or disable free-running sampling mode
 *  \ingroup hardware_adc
 *
 * \param run false to disable, true to enable free running conversion mode.
 */
static inline void adc_run(bool run) {
    if (run)
        hw_set_bits(&adc_hw->cs, ADC_CS_START_MANY_BITS);
    else
        hw_clear_bits(&adc_hw->cs, ADC_CS_START_MANY_BITS);
}

/*! \brief Set the ADC Clock divisor
 *  \ingroup hardware_adc
 *
 * Period of samples will be (1 + div) cycles on average. Note it takes 96 cycles to perform a conversion,
 * so any period less than that will be clamped to 96.
 *
 * \param clkdiv If non-zero, conversion will be started at intervals rather than back to back.
 */
static inline void adc_set_clkdiv(float clkdiv) {
    invalid_params_if(HARDWARE_ADC, clkdiv >= 1 << REG_FIELD_WIDTH(ADC_DIV_INT));
    const int frac_bit_count = REG_FIELD_WIDTH(ADC_DIV_FRAC);
#if PICO_ADC_CLKDIV_ROUND_NEAREST
    clkdiv += 0.5f / (1 << frac_bit_count); // round to the nearest fraction
#endif
    adc_hw->div = (uint32_t)(clkdiv * (float) (1 << frac_bit_count));
}

/*! \brief Setup the ADC FIFO
 *  \ingroup hardware_adc
 *
 * \if rp2040_specific
 * On RP2040 the FIFO is 4 samples long.
 * \endif
 *
 * \if rp2350_specific
 * On RP2350 the FIFO is 8 samples long.
 * \endif
 * 
 * If a conversion is completed and the FIFO is full, the result is dropped.
 *
 * \param en Enables write each conversion result to the FIFO
 * \param dreq_en Enable DMA requests when FIFO contains data
 * \param dreq_thresh Threshold for DMA requests/FIFO IRQ if enabled.
 * \param err_in_fifo If enabled, bit 15 of the FIFO contains error flag for each sample
 * \param byte_shift Shift FIFO contents to be one byte in size (for byte DMA) - enables DMA to byte buffers.
 */
 static inline void adc_fifo_setup(bool en, bool dreq_en, uint16_t dreq_thresh, bool err_in_fifo, bool byte_shift) {