Repository: dotnet/runtime
File: src/coreclr/jit/emit.h (C/C++)

Code before:
#define AM_DISP_MAX     (+((1 << (AM_DISP_BITS - 1)) - 1))

    struct emitAddrMode
    {
        regNumber       amBaseReg : REGNUM_BITS + 1;
        regNumber       amIndxReg : REGNUM_BITS + 1;
        emitter::opSize amScale : 2;
        int             amDisp : AM_DISP_BITS;
    };

#endif // TARGET_XARCH

    struct instrDescDebugInfo
    {
        unsigned          idNum;
        size_t            idSize;        // size of the instruction descriptor
        unsigned          idVarRefOffs;  // IL offset for LclVar reference
        unsigned          idVarRefOffs2; // IL offset for 2nd LclVar reference (in case this is a pair)
        size_t            idMemCookie;   // compile time handle (check idFlags)
        GenTreeFlags      idFlags;       // for determining type of handle in idMemCookie
        bool              idFinallyCall; // Branch instruction is a call to finally
        bool              idCatchRet;    // Instruction is for a catch 'return'
        CORINFO_SIG_INFO* idCallSig;     // Used to report native call site signatures to the EE
        BasicBlock*       idTargetBlock; // Target block for branches
#ifdef TARGET_WASM
        int lclOffset;
#endif
    };

#ifdef TARGET_ARM
    unsigned insEncodeSetFlags(insFlags sf);

    enum insSize : unsigned
    {
        ISZ_16BIT,
        ISZ_32BIT,
        ISZ_48BIT // pseudo-instruction for conditional branch with imm24 range,
                  // encoded as IT of condition followed by an unconditional branch
    };

    unsigned insEncodeShiftOpts(insOpts opt);
    unsigned insEncodePUW_G0(insOpts opt, int imm);
    unsigned insEncodePUW_H0(insOpts opt, int imm);

#endif // TARGET_ARM

    struct instrDescCns;

    struct instrDesc
    {
    private:

Review comment (suggestion):
```suggestion
        int lclOffset; // Base index of the WASM locals being declared
```

Code after:
#define AM_DISP_MAX     (+((1 << (AM_DISP_BITS - 1)) - 1))

    struct emitAddrMode
    {
        regNumber       amBaseReg : REGNUM_BITS + 1;
        regNumber       amIndxReg : REGNUM_BITS + 1;
        emitter::opSize amScale : 2;
        int             amDisp : AM_DISP_BITS;
    };

#endif // TARGET_XARCH

    struct instrDescDebugInfo
    {
        unsigned          idNum;
        size_t            idSize;        // size of the instruction descriptor
        unsigned          idVarRefOffs;  // IL offset for LclVar reference
        unsigned          idVarRefOffs2; // IL offset for 2nd LclVar reference (in case this is a pair)
        size_t            idMemCookie;   // compile time handle (check idFlags)
        GenTreeFlags      idFlags;       // for determining type of handle in idMemCookie
        bool              idFinallyCall; // Branch instruction is a call to finally
        bool              idCatchRet;    // Instruction is for a catch 'return'
        CORINFO_SIG_INFO* idCallSig;     // Used to report native call site signatures to the EE
        BasicBlock*       idTargetBlock; // Target block for branches
#ifdef TARGET_WASM
        int lclOffset; // Base index of the WASM locals being declared
#endif
    };

#ifdef TARGET_ARM
    unsigned insEncodeSetFlags(insFlags sf);

    enum insSize : unsigned
    {
        ISZ_16BIT,
        ISZ_32BIT,
        ISZ_48BIT // pseudo-instruction for conditional branch with imm24 range,
                  // encoded as IT of condition followed by an unconditional branch
    };

    unsigned insEncodeShiftOpts(insOpts opt);
    unsigned insEncodePUW_G0(insOpts opt, int imm);
    unsigned insEncodePUW_H0(insOpts opt, int imm);

#endif // TARGET_ARM

    struct instrDescCns;

    struct instrDesc
    {
    private: