Repository: llvm/llvm-project
File: llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp (C++)

Code before:
                                       raw_ostream &OS) {
  unsigned TypeOperand = 0;
  unsigned TableOperand = 1;
  switch (MI->getOpcode()) {
  case WebAssembly::CALL_INDIRECT: {
    unsigned NumDefs = MI->getOperand(0).getImm();
    TypeOperand = NumDefs + 1;
    TableOperand = NumDefs + 2;
    [[fallthrough]];
  }
  case WebAssembly::RET_CALL_INDIRECT:
  case WebAssembly::CALL_INDIRECT_S:
  case WebAssembly::RET_CALL_INDIRECT_S: {
    // A special case for call_indirect (and ret_call_indirect), if the table
    // operand is a symbol: the order of the type and table operands is inverted
    // in the text format relative to the binary format.  Otherwise if table the
    // operand isn't a symbol, then we have an MVP compilation unit, and the
    // table shouldn't appear in the output.
    OS << "\t";
    OS << getMnemonic(*MI).first;
    OS << " ";
    if (MI->getOperand(TableOperand).isExpr()) {
      if (STI.checkFeatures("+reference-types")) {
        printOperand(MI, TableOperand, OS);
        OS << ", ";
      }
    } else {
      assert(MI->getOperand(TableOperand).getImm() == 0);
    }
    printOperand(MI, TypeOperand, OS);
    if (MI->getOpcode() == WebAssembly::CALL_INDIRECT)
      OS << ", ";
    break;
  }
  default:
    // Print the instruction (this uses the AsmStrings from the .td files).
    printInstruction(MI, Address, OS);
    break;
  }

  // Print any additional variadic operands.
  const MCInstrDesc &Desc = MII.get(MI->getOpcode());
  if (Desc.isVariadic()) {
    if ((Desc.getNumOperands() == 0 && MI->getNumOperands() > 0) ||
        Desc.variadicOpsAreDefs())
      OS << "\t";
    unsigned Start = Desc.getNumOperands();
    unsigned NumVariadicDefs = 0;
    if (Desc.variadicOpsAreDefs()) {
      // The number of variadic defs is encoded in an immediate by MCInstLower
      NumVariadicDefs = MI->getOperand(0).getImm();

Review comment (suggestion):
```suggestion
      printOperand(MI, TableOperand, OS);
      OS << ", ";
```
You don't need this condition. If reference-types is not enabled, `TableOperand` won't be an expression.

Code after:
                                       raw_ostream &OS) {
  unsigned TypeOperand = 0;
  unsigned TableOperand = 1;
  switch (MI->getOpcode()) {
  case WebAssembly::CALL_INDIRECT: {
    unsigned NumDefs = MI->getOperand(0).getImm();
    TypeOperand = NumDefs + 1;
    TableOperand = NumDefs + 2;
    [[fallthrough]];
  }
  case WebAssembly::RET_CALL_INDIRECT:
  case WebAssembly::CALL_INDIRECT_S:
  case WebAssembly::RET_CALL_INDIRECT_S: {
    // A special case for call_indirect (and ret_call_indirect), if the table
    // operand is a symbol: the order of the type and table operands is inverted
    // in the text format relative to the binary format.  Otherwise if table the
    // operand isn't a symbol, then we have an MVP compilation unit, and the
    // table shouldn't appear in the output.
    OS << "\t";
    OS << getMnemonic(*MI).first;
    OS << " ";
    if (MI->getOperand(TableOperand).isExpr()) {
      printOperand(MI, TableOperand, OS);
      OS << ", ";
    } else {
      assert(MI->getOperand(TableOperand).getImm() == 0);
    }
    printOperand(MI, TypeOperand, OS);
    if (MI->getOpcode() == WebAssembly::CALL_INDIRECT)
      OS << ", ";
    break;
  }
  default:
    // Print the instruction (this uses the AsmStrings from the .td files).
    printInstruction(MI, Address, OS);
    break;
  }

  // Print any additional variadic operands.
  const MCInstrDesc &Desc = MII.get(MI->getOpcode());
  if (Desc.isVariadic()) {
    if ((Desc.getNumOperands() == 0 && MI->getNumOperands() > 0) ||
        Desc.variadicOpsAreDefs())
      OS << "\t";
    unsigned Start = Desc.getNumOperands();
    unsigned NumVariadicDefs = 0;
    if (Desc.variadicOpsAreDefs()) {
      // The number of variadic defs is encoded in an immediate by MCInstLower
      NumVariadicDefs = MI->getOperand(0).getImm();
      Start = 1;
    }