Repository: llvm/llvm-project
File: llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp (C++)

Code before:
    Register ResVReg, SPIRVTypeInst ResType, MachineInstr &I,
    std::vector<Register> SrcRegs, GL::GLSLExtInst GLInst) const {
  ExtInstList ExtInsts = {{SPIRV::InstructionSet::GLSL_std_450, GLInst}};
  return selectExtInstWithSrcs(ResVReg, ResType, I, SrcRegs, ExtInsts);
}

bool SPIRVInstructionSelector::selectExtInstWithSrcs(
    Register ResVReg, SPIRVTypeInst ResType, MachineInstr &I,
    std::vector<Register> SrcRegs, CL::OpenCLExtInst CLInst) const {
  ExtInstList ExtInsts = {{SPIRV::InstructionSet::OpenCL_std, CLInst}};
  return selectExtInstWithSrcs(ResVReg, ResType, I, SrcRegs, ExtInsts);
}

bool SPIRVInstructionSelector::selectExtInstWithSrcs(
    Register ResVReg, SPIRVTypeInst ResType, MachineInstr &I,
    std::vector<Register> SrcRegs, CL::OpenCLExtInst CLInst,
    GL::GLSLExtInst GLInst) const {
  ExtInstList ExtInsts = {{SPIRV::InstructionSet::OpenCL_std, CLInst},
                          {SPIRV::InstructionSet::GLSL_std_450, GLInst}};
  return selectExtInstWithSrcs(ResVReg, ResType, I, SrcRegs, ExtInsts);
}

bool SPIRVInstructionSelector::selectExtInstWithSrcs(
    Register ResVReg, SPIRVTypeInst ResType, MachineInstr &I,
    std::vector<Register> SrcRegs, const ExtInstList &Insts) const {
  for (const auto &Ex : Insts) {
    SPIRV::InstructionSet::InstructionSet Set = Ex.first;
    if (STI.canUseExtInstSet(Set)) {
      uint32_t Opcode = Ex.second;
      MachineBasicBlock &BB = *I.getParent();
      auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst))
                     .addDef(ResVReg)
                     .addUse(GR.getSPIRVTypeID(ResType))
                     .addImm(static_cast<uint32_t>(Set))
                     .addImm(Opcode)
                     .setMIFlags(I.getFlags());
      for (Register SReg : SrcRegs) {
        MIB.addUse(SReg);
      }
      MIB.constrainAllUses(TII, TRI, RBI);
      return true;
    }
  }
  return false;
}

bool SPIRVInstructionSelector::selectExtInstForLRound(
    Register ResVReg, SPIRVTypeInst ResType, MachineInstr &I,
    CL::OpenCLExtInst CLInst, GL::GLSLExtInst GLInst) const {
  ExtInstList ExtInsts = {{SPIRV::InstructionSet::OpenCL_std, CLInst},
                          {SPIRV::InstructionSet::GLSL_std_450, GLInst}};

Review comment (suggestion):
You could use:

```cpp
  for (const auto &[InstructionSet, Opcode] : Insts) {
```

Code after:
}

bool SPIRVInstructionSelector::selectFrexp(Register ResVReg,
                                           SPIRVTypeInst ResType,
                                           MachineInstr &I) const {
  ExtInstList ExtInsts = {{SPIRV::InstructionSet::OpenCL_std, CL::frexp},
                          {SPIRV::InstructionSet::GLSL_std_450, GL::Frexp}};
  for (const auto &Ex : ExtInsts) {
    SPIRV::InstructionSet::InstructionSet Set = Ex.first;
    uint32_t Opcode = Ex.second;
    if (!STI.canUseExtInstSet(Set))
      continue;

    MachineIRBuilder MIRBuilder(I);
    SPIRVTypeInst PointeeTy = GR.getSPIRVTypeForVReg(I.getOperand(1).getReg());
    const SPIRVTypeInst PointerType = GR.getOrCreateSPIRVPointerType(
        PointeeTy, MIRBuilder, SPIRV::StorageClass::Function);
    Register PointerVReg =
        createVirtualRegister(PointerType, &GR, MRI, MRI->getMF());

    auto It = getOpVariableMBBIt(I);
    BuildMI(*It->getParent(), It, It->getDebugLoc(), TII.get(SPIRV::OpVariable))
        .addDef(PointerVReg)
        .addUse(GR.getSPIRVTypeID(PointerType))
        .addImm(static_cast<uint32_t>(SPIRV::StorageClass::Function))
        .constrainAllUses(TII, TRI, RBI);

    BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst))
        .addDef(ResVReg)
        .addUse(GR.getSPIRVTypeID(ResType))
        .addImm(static_cast<uint32_t>(Ex.first))
        .addImm(Opcode)
        .add(I.getOperand(2))
        .addUse(PointerVReg)
        .constrainAllUses(TII, TRI, RBI);

    BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpLoad))
        .addDef(I.getOperand(1).getReg())
        .addUse(GR.getSPIRVTypeID(PointeeTy))
        .addUse(PointerVReg)
        .constrainAllUses(TII, TRI, RBI);
    return true;
  }
  return false;
}

bool SPIRVInstructionSelector::selectSincos(Register ResVReg,
                                            SPIRVTypeInst ResType,
                                            MachineInstr &I) const {
  Register CosResVReg = I.getOperand(1).getReg();
  unsigned SrcIdx = I.getNumExplicitDefs();