Repository: microsoft/onnxruntime
File: tools/ci_build/build_args.py (Python)

Code before:
    cuda_group.add_argument("--enable_cuda_nhwc_ops", action="store_true", help="[Deprecated] Default enabled.")
    cuda_group.add_argument("--disable_cuda_nhwc_ops", action="store_true", help="Disable CUDA NHWC layout ops.")
    cuda_group.add_argument("--enable_cuda_minimal_build", action="store_true", help="Enable CUDA minimal build.")
    cuda_group.add_argument(
        "--nvcc_threads",
        nargs="?",
        default=-1,  # -1 signifies auto-detect based on jobs/memory
        type=int,
        help="Max NVCC threads per parallel job (-1=auto).",
    )
    # CUDA-specific profiling
    cuda_group.add_argument(
        "--enable_nvtx_profile", action="store_true", help="Enable NVTX profile markers for CUDA EP."
    )
    cuda_group.add_argument(
        "--enable_cuda_profiling",
        action="store_true",
        help="Enable CUDA kernel profiling (requires CUPTI in PATH).",
    )

    # --- CPU ---
    cpu_group = parser.add_argument_group("CPU Execution Provider")
    cpu_group.add_argument("--no_sve", action="store_true", help="Disable building with SVE support.")
    # The following enables building ORT with NCHWc Neon ARM kernels.
    # At the time of writing, it is turned OFF by default because its performance relative to "regular" NCHW kernels
    # is not good at smaller thread counts. But its speed-up is non-negligible with higher thread counts on supporting
    # ARM platforms.
    # Once the gap is closed for smaller thread counts, it can be turned on by default.
    cpu_group.add_argument(
        "--enable_arm_neon_nchwc", action="store_true", help="Enables building with NCHWc ARM kernels."
    )

    # --- DNNL (formerly MKL-DNN / oneDNN) ---
    dnnl_group = parser.add_argument_group("DNNL Execution Provider")
    dnnl_group.add_argument("--use_dnnl", action="store_true", help="Enable DNNL EP.")
    dnnl_group.add_argument(
        "--dnnl_gpu_runtime",
        action="store",
        default="",
        type=str.lower,
        choices=["ocl", ""],
        help="DNNL GPU backend (e.g., ocl for OpenCL).",
    )
    dnnl_group.add_argument("--dnnl_opencl_root", action="store", default="", help="Path to OpenCL SDK (for DNNL GPU).")
    dnnl_group.add_argument(
        "--dnnl_aarch64_runtime",
        action="store",
        default="",
        type=str.lower,
        choices=["acl", ""],
        help="DNNL AArch64 backend (e.g., acl for Arm Compute Library).",

Review comment (suggestion):
maybe mention example "smaller" and "larger" thread count values (and the machine used to test those) so that the reader has a better idea of when it would be useful to enable these kernels.

Code after:
    cuda_group.add_argument("--enable_cuda_nhwc_ops", action="store_true", help="[Deprecated] Default enabled.")
    cuda_group.add_argument("--disable_cuda_nhwc_ops", action="store_true", help="Disable CUDA NHWC layout ops.")
    cuda_group.add_argument("--enable_cuda_minimal_build", action="store_true", help="Enable CUDA minimal build.")
    cuda_group.add_argument(
        "--nvcc_threads",
        nargs="?",
        default=-1,  # -1 signifies auto-detect based on jobs/memory
        type=int,
        help="Max NVCC threads per parallel job (-1=auto).",
    )
    # CUDA-specific profiling
    cuda_group.add_argument(
        "--enable_nvtx_profile", action="store_true", help="Enable NVTX profile markers for CUDA EP."
    )
    cuda_group.add_argument(
        "--enable_cuda_profiling",
        action="store_true",
        help="Enable CUDA kernel profiling (requires CUPTI in PATH).",
    )

    # --- CPU ---
    cpu_group = parser.add_argument_group("CPU Execution Provider")
    cpu_group.add_argument("--no_sve", action="store_true", help="Disable building with SVE support.")
    # The following enables building ORT with NCHWc Neon ARM kernels.
    # At the time of writing, it is turned OFF by default because its performance relative to "regular" NCHW kernels
    # is not good at smaller thread counts. But its speed-up is non-negligible with higher thread counts on supporting
    # ARM platforms.
    # Once the gap is closed for smaller thread counts, it can be turned on by default.
    # See https://github.com/microsoft/onnxruntime/pull/25580#issuecomment-3335056846 for benchmarking details.
    cpu_group.add_argument(
        "--enable_arm_neon_nchwc", action="store_true", help="Enables building with NCHWc ARM kernels."
    )

    # --- DNNL (formerly MKL-DNN / oneDNN) ---
    dnnl_group = parser.add_argument_group("DNNL Execution Provider")
    dnnl_group.add_argument("--use_dnnl", action="store_true", help="Enable DNNL EP.")
    dnnl_group.add_argument(
        "--dnnl_gpu_runtime",
        action="store",
        default="",
        type=str.lower,
        choices=["ocl", ""],
        help="DNNL GPU backend (e.g., ocl for OpenCL).",
    )
    dnnl_group.add_argument("--dnnl_opencl_root", action="store", default="", help="Path to OpenCL SDK (for DNNL GPU).")
    dnnl_group.add_argument(
        "--dnnl_aarch64_runtime",
        action="store",
        default="",
        type=str.lower,
        choices=["acl", ""],