Repository: raspberrypi/pico-sdk
File: src/rp2_common/hardware_dma/include/hardware/dma.h (C/C++)

Code before:
        DMA_ADDRESS_UPDATE_TYPE_TO_DMA_CH_CTRL_READ_BITS(update_type);
}

/*! \brief  Set DMA channel write address update type in a channel configuration object
 *  \ingroup channel_config
 *
 * \param c Pointer to channel configuration object
 * \param update_type The type of adjustment to make to the write address after each transfer.
 *             Usually set to DMA_ADDRESS_UPDATE_NONE for memory to peripheral transfers
 * \sa channel_config_set_write_increment
 */
static inline void channel_config_set_write_address_update_type(dma_channel_config_t *c, dma_address_update_type_t update_type) {
    c->ctrl = (c->ctrl & ~DMA_CH_CTRL_ALL_ADDRESS_UPDATE_WRITE_BITS) |
        DMA_ADDRESS_UPDATE_TYPE_TO_DMA_CH_CTRL_WRITE_BITS(update_type);
}

/*! \brief  Set DMA channel read increment in a channel configuration object
*  \ingroup channel_config
*
* \note this method is equivalent to
* \code
* channel_config_set_read_address_update_type(c, incr ? DMA_ADDRESS_UPDATE_INCREMENT : DMA_ADDRESS_UPDATE_NONE)
* \endcode
*
* \param c Pointer to channel configuration object
* \param incr True to enable read address increments, whereby the read address increments by the transfer size with each transfer, false to perform each read from the same address.
*             Usually disabled for peripheral to memory transfers
* \sa channel_config_set_read_address_update_type
*/
static inline void channel_config_set_read_increment(dma_channel_config_t *c, bool incr) {
    channel_config_set_read_address_update_type(c, incr ? DMA_ADDRESS_UPDATE_INCREMENT : DMA_ADDRESS_UPDATE_NONE);
}

/*! \brief  Set DMA channel write increment in a channel configuration object
 *  \ingroup channel_config
 *
 * \note this method is equivalent to
 * \code
 * channel_config_set_write_address_update_type(c, incr ? DMA_ADDRESS_UPDATE_INCREMENT : DMA_ADDRESS_UPDATE_NONE)
 * \endcode
 *
 * \param c Pointer to channel configuration object
 * \param incr True to enable write address increments, whereby the  address increments by the transfer size with each transfer, false to perform each write to the same address.
 *             Usually disabled for memory to peripheral transfers
 * \sa channel_config_set_write_address_update_type
 */
static inline void channel_config_set_write_increment(dma_channel_config_t *c, bool incr) {
    channel_config_set_write_address_update_type(c, incr ? DMA_ADDRESS_UPDATE_INCREMENT : DMA_ADDRESS_UPDATE_NONE);
}

/*! \brief  Select a transfer request signal in a channel configuration object

Review comment (suggestion):
Small nitpick, but this is probably more readable as
```suggestion
* \param incr True to enable read address increments, whereby the read address increments by the transfer size with each transfer; false to perform each read from the same address.
```
or
```suggestion
* \param incr True to enable read address increments, whereby the read address increments by the transfer size with each transfer. False to perform each read from the same address.
```

Code after:
        DMA_ADDRESS_UPDATE_TYPE_TO_DMA_CH_CTRL_READ_BITS(update_type);
}

/*! \brief  Set DMA channel write address update type in a channel configuration object
 *  \ingroup channel_config
 *
 * \param c Pointer to channel configuration object
 * \param update_type The type of adjustment to make to the write address after each transfer.
 *             Usually set to DMA_ADDRESS_UPDATE_NONE for memory to peripheral transfers
 * \sa channel_config_set_write_increment
 */
static inline void channel_config_set_write_address_update_type(dma_channel_config_t *c, dma_address_update_type_t update_type) {
    c->ctrl = (c->ctrl & ~DMA_CH_CTRL_ALL_ADDRESS_UPDATE_WRITE_BITS) |
        DMA_ADDRESS_UPDATE_TYPE_TO_DMA_CH_CTRL_WRITE_BITS(update_type);
}

/*! \brief  Set DMA channel read increment in a channel configuration object
*  \ingroup channel_config
*
* \note this method is equivalent to
* \code
* channel_config_set_read_address_update_type(c, incr ? DMA_ADDRESS_UPDATE_INCREMENT : DMA_ADDRESS_UPDATE_NONE)
* \endcode
*
* \param c Pointer to channel configuration object
* \param incr True to enable read address increments, whereby the read address increments by the transfer size with each transfer. False to perform each read from the same address.
*             Usually disabled for peripheral to memory transfers
* \sa channel_config_set_read_address_update_type
*/
static inline void channel_config_set_read_increment(dma_channel_config_t *c, bool incr) {
    channel_config_set_read_address_update_type(c, incr ? DMA_ADDRESS_UPDATE_INCREMENT : DMA_ADDRESS_UPDATE_NONE);
}

/*! \brief  Set DMA channel write increment in a channel configuration object
 *  \ingroup channel_config
 *
 * \note this method is equivalent to
 * \code
 * channel_config_set_write_address_update_type(c, incr ? DMA_ADDRESS_UPDATE_INCREMENT : DMA_ADDRESS_UPDATE_NONE)
 * \endcode
 *
 * \param c Pointer to channel configuration object
 * \param incr True to enable write address increments, whereby the write address increments by the transfer size with each transfer. False to perform each write to the same address.
 *             Usually disabled for memory to peripheral transfers
 * \sa channel_config_set_write_address_update_type
 */
static inline void channel_config_set_write_increment(dma_channel_config_t *c, bool incr) {
    channel_config_set_write_address_update_type(c, incr ? DMA_ADDRESS_UPDATE_INCREMENT : DMA_ADDRESS_UPDATE_NONE);
}

/*! \brief  Select a transfer request signal in a channel configuration object