Repository: microsoft/onnxruntime
File: onnxruntime/core/providers/cuda/nn/conv_transpose.cc (C++)

Code before:
                             " W: ", w_shape.ToString().c_str());
    }

    if (w_shape[0] != num_input_channels) {
      return ORT_MAKE_STATUS(ONNXRUNTIME, INVALID_ARGUMENT, "filter number not equal to input channel number.",
                             " filter_number: ", w_shape[0],
                             " num_input_channels: ", num_input_channels);
    }

    // it looks like num_output_channels is really k*group similar to how in the conv case
    // num_input_channels is k*group. hence removing the check for num_output_channels here.

    if (num_input_channels % conv_transpose_attrs_.group != 0) {
      return ORT_MAKE_STATUS(ONNXRUNTIME, INVALID_ARGUMENT, "Input channels is not divisible by group.",
                             " num_input_channels: ", num_input_channels,
                             " group: ", conv_transpose_attrs_.group);
    }

    // Bias shape validation (It should be a 1D tensor with size M)
    // See https://github.com/microsoft/onnxruntime/issues/26144
    if (B != nullptr) {
      if (B->Shape().NumDimensions() != 1 || B->Shape()[0] != num_output_channels) {
        return ORT_MAKE_STATUS(ONNXRUNTIME, INVALID_ARGUMENT,
                               "Bias shape is not compatible with number of output channels."
                               " It should be a 1-D tensor with size num_output_channels(M).",
                               " Bias: ", B->Shape().ToString().c_str(),
                               " num_output_channels: ", num_output_channels);
      }
    }

    TensorShapeVector kernel_shape;
    ORT_RETURN_IF_ERROR(conv_transpose_attrs_.ComputeKernelShape(w_shape, kernel_shape, w_in_nhwc));

    const size_t kernel_rank = kernel_shape.size();

    TensorShapeVector local_output_padding(conv_transpose_attrs_.output_padding);
    if (local_output_padding.empty()) {
      local_output_padding.resize(kernel_shape.size(), 0);
    }
    ConvPadVector pads;
    pads.reserve(2 * (input_shape.NumDimensions()));
    if (dynamic_padding) {
      for (int64_t i = 0; i < Pads->Shape().SizeFromDimension(0); ++i) {
        pads.push_back(Pads->Data<int64_t>()[i]);
      }
    } else {
      pads.assign(conv_transpose_attrs_.pads.begin(), conv_transpose_attrs_.pads.end());
    }
    if (pads.empty()) {
      pads.resize(kernel_shape.size() * 2, 0);
    }

Review comment (suggestion):
```suggestion
                               " Bias: ", B->Shape(),
```

Code after:
                             " W: ", w_shape.ToString().c_str());
    }

    if (w_shape[0] != num_input_channels) {
      return ORT_MAKE_STATUS(ONNXRUNTIME, INVALID_ARGUMENT, "filter number not equal to input channel number.",
                             " filter_number: ", w_shape[0],
                             " num_input_channels: ", num_input_channels);
    }

    // it looks like num_output_channels is really k*group similar to how in the conv case
    // num_input_channels is k*group. hence removing the check for num_output_channels here.

    if (num_input_channels % conv_transpose_attrs_.group != 0) {
      return ORT_MAKE_STATUS(ONNXRUNTIME, INVALID_ARGUMENT, "Input channels is not divisible by group.",
                             " num_input_channels: ", num_input_channels,
                             " group: ", conv_transpose_attrs_.group);
    }

    // Bias shape validation (It should be a 1D tensor with size M)
    // See https://github.com/microsoft/onnxruntime/issues/26144
    if (B != nullptr) {
      if (B->Shape().NumDimensions() != 1 || B->Shape()[0] != num_output_channels) {
        return ORT_MAKE_STATUS(ONNXRUNTIME, INVALID_ARGUMENT,
                               "Bias shape is not compatible with number of output channels."
                               " It should be a 1-D tensor with size num_output_channels(M).",
                               " Bias: ", B->Shape(),
                               " num_output_channels: ", num_output_channels);
      }
    }

    TensorShapeVector kernel_shape;
    ORT_RETURN_IF_ERROR(conv_transpose_attrs_.ComputeKernelShape(w_shape, kernel_shape, w_in_nhwc));

    const size_t kernel_rank = kernel_shape.size();

    TensorShapeVector local_output_padding(conv_transpose_attrs_.output_padding);
    if (local_output_padding.empty()) {
      local_output_padding.resize(kernel_shape.size(), 0);
    }
    ConvPadVector pads;
    pads.reserve(2 * (input_shape.NumDimensions()));
    if (dynamic_padding) {
      for (int64_t i = 0; i < Pads->Shape().SizeFromDimension(0); ++i) {
        pads.push_back(Pads->Data<int64_t>()[i]);
      }
    } else {
      pads.assign(conv_transpose_attrs_.pads.begin(), conv_transpose_attrs_.pads.end());
    }
    if (pads.empty()) {
      pads.resize(kernel_shape.size() * 2, 0);
    }