Repository: ggerganov/llama.cpp
File: ggml/src/ggml-cpu/arch/arm/repack.cpp (C++)

Code before:
        constexpr int    q8_k_blocklen = 4;
        const svuint8_t m4b_1          = svdup_n_u8(0x0f);
        // 8 accumulators: 2 row pairs × 4 col pairs
        svfloat32_t acc_f32_01, acc_f32_23, acc_f32_45, acc_f32_67;
        uint32_t idx_arr[8] = { 0, 2, 4, 6,  1, 3, 5, 7 };
        svbool_t pg = svptrue_pat_b32(SV_VL8);
        svuint32_t idx = svld1(pg, idx_arr);

        static const uint32_t idx_data[8] = {0, 4, 2, 6, 1, 5, 3, 7};
        svuint32_t idx1 = svld1_u32(svptrue_b32(), idx_data);

        for (int y = 0; y < nr / q8_k_blocklen; y++) {
            const block_q8_Kx4 * GGML_RESTRICT q8_ptr = (const block_q8_Kx4 *) vy + (y * nb);
            const block_q8_Kx4 * GGML_RESTRICT q8_ptr_1 = (const block_q8_Kx4 *) vy + (y * nb);

            for (int x = 0; x < nc / ncols_interleaved; x++) {
                const block_q4_Kx8 * GGML_RESTRICT q4_ptr = (const block_q4_Kx8 *) vx + (x * nb);
                const block_q4_Kx8 * GGML_RESTRICT q4_ptr_1 = (const block_q4_Kx8 *) vx + (x * nb);

                acc_f32_01 = svdup_n_f32(0);
                acc_f32_23 = svdup_n_f32(0);
                acc_f32_45 = svdup_n_f32(0);
                acc_f32_67 = svdup_n_f32(0);

                for (int b = 0; b < nb; b++) {
                    // bsums pairs belongs to the same q8_k subblock   // 64 elemnts loaded and made sum of 0-7 and 8-15 sum || 16-23 and 24 - 31 sum
                    const int16x8_t bsums[4]{
                        vpaddq_s16(vld1q_s16(q8_ptr[b].bsums + 16 * 0), vld1q_s16(q8_ptr[b].bsums + 16 * 0 + 8)),
                        vpaddq_s16(vld1q_s16(q8_ptr[b].bsums + 16 * 1), vld1q_s16(q8_ptr[b].bsums + 16 * 1 + 8)),
                        vpaddq_s16(vld1q_s16(q8_ptr[b].bsums + 16 * 2), vld1q_s16(q8_ptr[b].bsums + 16 * 2 + 8)),
                        vpaddq_s16(vld1q_s16(q8_ptr[b].bsums + 16 * 3), vld1q_s16(q8_ptr[b].bsums + 16 * 3 + 8)),
                    };

                    int32_t bsums_arr32[4][8];

                    for (int q8_row = 0; q8_row < 4; q8_row++) {
                        int16x8_t v16 = bsums[q8_row];

                        // low 4
                        int32x4_t v32_lo = vmovl_s16(vget_low_s16(v16));
                        vst1q_s32(&bsums_arr32[q8_row][0], v32_lo);

                        // high 4
                        int32x4_t v32_hi = vmovl_s16(vget_high_s16(v16));
                        vst1q_s32(&bsums_arr32[q8_row][4], v32_hi);
                    }

                    svint32_t sb_acc_0 = svdup_n_s32(0);
                    svint32_t sb_acc_2 = svdup_n_s32(0);

                    svint32_t acc_00 = svdup_n_s32(0);

Review comment (suggestion):
```suggestion
                    // bsums pairs belongs to the same q8_k subblock   
                    // 64 elements loaded and made sum of 0-7 and 8-15 sum || 16-23 and 24 - 31 sum
```

Code after:
        "subs x21, x21, #0x1\n"
        "add x25, x25, #0x88\n"
        "fcvtl v17.4s, v17.4h\n"
        "add x24, x24, #0x48\n"
        ".inst 0x4e93a568  // smmla v8.4s, v11.16b, v19.16b\n"
        ".inst 0x4e92a57b  // smmla v27.4s, v11.16b, v18.16b\n"
        ".inst 0x4e93a6e0  // smmla v0.4s, v23.16b, v19.16b\n"
        ".inst 0x4e92a6fd  // smmla v29.4s, v23.16b, v18.16b\n"
        "fcvtl v16.4s, v16.4h\n"
        ".inst 0x4e86a688  // smmla v8.4s, v20.16b, v6.16b\n"
        ".inst 0x4e85a69b  // smmla v27.4s, v20.16b, v5.16b\n"
        "fmul v23.4s, v16.4s, v17.s[0]\n"
        "fmul v21.4s, v16.4s, v17.s[1]\n"
        "fmul v1.4s, v16.4s, v17.s[2]\n"
        "fmul v20.4s, v16.4s, v17.s[3]\n"
        ".inst 0x4e86a740  // smmla v0.4s, v26.16b, v6.16b\n"
        ".inst 0x4e85a75d  // smmla v29.4s, v26.16b, v5.16b\n"
        ".inst 0x4e9fa728  // smmla v8.4s, v25.16b, v31.16b\n"
        ".inst 0x4e8ea73b  // smmla v27.4s, v25.16b, v14.16b\n"
        ".inst 0x4e9fa460  // smmla v0.4s, v3.16b, v31.16b\n"
        ".inst 0x4e8ea47d  // smmla v29.4s, v3.16b, v14.16b\n"
        "uzp1 v19.2d, v8.2d, v27.2d\n"
        "uzp2 v18.2d, v8.2d, v27.2d\n"
        "scvtf v19.4s, v19.4s, #0x4\n"
        "uzp1 v17.2d, v0.2d, v29.2d\n"
        "uzp2 v16.2d, v0.2d, v29.2d\n"
        "scvtf v18.4s, v18.4s, #0x4\n"
        "fmla v2.4s, v19.4s, v23.4s\n"
        "scvtf v17.4s, v17.4s, #0x4\n"
        "scvtf v16.4s, v16.4s, #0x4\n"
        "fmla v10.4s, v18.4s, v21.4s\n"
        "fmla v12.4s, v17.4s, v1.4s\n"
        "fmla v28.4s, v16.4s, v20.4s\n"
        "bgt 7b\n"
        "mov x20, %x[res_ptr]\n"
        "cmp x10, #0x1\n"
        "str q2, [x20, #0x0]\n"
        "add x20, x20, %x[res_stride]\n"
        "ble 8f\n"
        "cmp x10, #0x2\n"
        "str q10, [x20, #0x0]\n"
        "add x20, x20, %x[res_stride]\n"
        "ble 8f\n"
        "cmp x10, #0x3\n"
        "str q12, [x20, #0x0]\n"
        "add x20, x20, %x[res_stride]\n"
        "ble 8f\n"
        "str q28, [x20, #0x0]\n"
        "8:"  // Row tail: Accumulator store skip
        "subs x23, x23, #0x4\n"
        "add %x[res_ptr], %x[res_ptr], #0x10\n"