I just recently started trying out on electronics engineering, and have built a OR gate, NOT gate and a AND gate using NPN transistors. When building the XOR gate, this is my design:



However, SW2 will not activate the LED due to the current at the base of Q4 (activated by SW2) activates Q5 to bypass the LED. Thus, the Q3 &amp; Q4's AND gate does not work. Is there any way I can get the between Q4 and Q5 to not flow unless both Q3 and Q4 have been activated?

Thanks in advance! I'm such a newbie.

P.S. The simulation lets the current flow from the positive side to the negative side.


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