A few days ago it was just fine. I haven't made any change to the IDE or anything else in the preferences.

Looks like random instability, but I hope I'm wrong, I don't want to go through the IDE setup again.......

Here are two screenshots to tell the story:

Before Ctrl+Shift+F (format):


After (format results):


What can I do about it?

I've tried comparing settings in another Eclipse setup that I have which has XML formatting working properly. (Window -> Preferences -> XML -> XML Files -> Editor). Also (Structured Text Editors).


Question: Combined ADC scaling and offset with variable input voltage ranges
Answer: The offset voltage is increasing as you have increased the gain and you have the non inverting input set above "mid point".   

With the top circuit there is actually attenuation, so the opamp doesn't have to drive it's output very hard to keep the inverting input at 2.5V.  

When you increase Rf to 10Meg, the output has to drive it's output to the necessary voltage to  match the input current and keep the inverting input at 2.5V.
For example, with 0V on the input, then the output must swing to 5V to keep the inverting input at 2.5V. Basically if you have Rin the same as Rf, and you know the input voltage (0V) the midpoint voltage at -IN (2.5V) then it's easy to work out what the top of the voltage divider (opamp OUT) should be (5V)
If your signal is swinging around a different point (0v) than the opamp midpoint (2.5V) then when you change the gain you will also alter the effect the DC offset (e.g. 2.5V) has.

EDIT - If you are happy to use as many opamps as necessary, then the easiest way would be to have a fixed input voltage divider followed by a non inverting unity gain buffer and then a few opamps with different gains. You can also use a few "taps" on the input voltage divider then use e.g. a couple of OptoMOS to route the signal appropriately (these are useful for AC/DC setting to bypass the capacitor too)
As Olin mentions any parasitic capacitance will create a low pass filter which may have quite a low cutoff, so you have to be aware of this when designing for your highest frequencies a couple of pF will make a big difference with 10 Megaohms (I would stick to &lt;= 1 Megaohm) The input impedance will also need to be very high (>100 Megaohm) to prevent attenuation so a FET input opamp would be best.
As far as dual rails go they can make life easier here if you need DC coupling, a charge pump can be used (the rails don't need to be symmetrical) followed by some filtering, or of course a switching regulator. You have the signal swinging round 0V up to the (opamp before the) ADC then level shift.

I would look at a a few input stages for oscilloscopes, as this seems to have much the same requirements. There are plenty out there, check some of the service manuals for commercial scopes out, and also stuff like Bitscope and DSO Nano/Quad. 

Probably wouldn't hurt to pick up a good book on opamps too if you haven't got one - a decent freely available one is Opamps for Everyone.
IIRC it goes into great detail on the simultaneous equations involved in calculating the straight line equation constants (as Olin goes into a little with the resistor divider) so if you want to keep a single supply Olin's advice combined with the first couple of chapters would be good reading.
Personally I would go with the dual rail as it makes things like maintaining a constant DC -> AC input impedance easier and prevents issues with midpoint bias when you switch from 1x to 10x probe setting, effectively altering R1 in Olin's example.

The goal of 500kHz should make things a bit easier as you don't have to worry as much about high speed problems. You may want to have a filter rolling off a fair bit before 500kHz though for anti-aliasing purposes - I'd say around 350kHz to keep filtering reasonably easy.
I assume you'll want quite a few division settings, (down to say 100mV/div) and also you want to divide the screen into 10. I'll also assume you will be using a probe with a 10x setting.
So on the maximum division setting: 
500/10x probe = 50V, divided by 1:10 input voltage divider = 5V. 
For a typical scope input impedance of 1 Megaohm, this would equate to 900k and 100k for the divider.
For the lowest range of 100mV/div, you would need a gain of 50 from input to ADC. 1V input divided by 10 = 100mV, times 50 equals 5V.
Splitting the gain over a couple of opamps will make the other gain settings easier, and maintain a decent bandwidth (higher gain = lower opamp bandwidth)
Say one opamp with e.g. selectable gains of (something like) 1, 2 and 5 feeding another with gains of 1, 2 and 10 (using standard CMOS multiplexers like 74HC4051/2) gives you a few options from 1 to 50.
Then a final level shifting ADC buffer opamp, and you can do it all with a quad (FET input) opamp package.