Source: {"pile_set_name": "USPTO Backgrounds"}

1. Technical Field
The present invention relates to a test apparatus and an electronic device. More specifically, the present invention relates to a test apparatus and an electronic device enabling low-speed and high-speed devices or a device having both low-speed and high-speed sections to be tested with a single test apparatus.
2. Related Art
A test apparatuses for testing a device under test (DUT) receive output signals from the output terminals of the DUT in response to test signals inputted to the input terminals. Then, the test apparatus compares the output signals with an expected value that is expected when the test signals are inputted to the DUT, so that the functions of DUT are tested. Here, the timings for inputting the test signals to each terminal of the DUT are designated by timing signals generated by a timing generator. Also, the timings for acquiring the output signals from the DUT are designated by strobe signals generated by the timing generator.
The timing and strobe signals are generated by a variable delay circuit based on timing data recorded in a timing memory of the timing generator. Japanese Patent Application Publication No. 61-47573, for example, discloses that upper data of the delay data set by a delay setting device are inputted to a coarse delay device so as to delay pulses from a period generator. Then, the pulses delayed by the coarse delay device along with lower data of the delay data are inputted to a fine delay circuit so as to output pulses delayed based on the delay data.