Source: {"pile_set_name": "USPTO Backgrounds"}

1. Field of the Invention
The present invention relates to a method for driving a plasma display panel (PDP) used as a flat plasma display device such as a television, computer or a like, its driving circuit and a plasma display device having the driving circuit and more particularly to the method for an alternating current (AC) driving surface-discharge type plasma display, its driving circuit and the plasma display device provided with the driving circuit of such plasma display.
The present application claims priority of Japanese Patent Application No. 2000-372118 filed on Dec. 6,2000, which is hereby incorporated by reference.
2. Description of the Related Art
FIG. 14 is a schematic exploded perspective view showing configurations of a conventional AC driving surface-discharge type PDP 1 disclosed in, for examples Japanese Patent No. 3036496 or Japanese Laid-open Patent Application No. Hei 11-202831. FIG. 15 is an enlarged cross-sectional view showing one display cell of the conventional PDP 1. The display cell is a minimum unit making up a display screen. It should be noted that FIG. 15 shows a view obtained by cutting the PDP 1 illustrated in FIG. 14 in a longitudinal direction with its components being not resolved and obtained by viewing its right cross section.
In the PDP 1 shown in FIGS. 14 and 15, a plurality of stripe-shaped scanning electrodes 3 (31-3n) (may hereinafter referred to as the scanning electrode 3 (31-3n)) and stripe-shaped sustaining electrodes 41-4n may hereinafter referred to as the sustaining electrode 4 (41-4n)) each being constructed of a transparent conductive thin film made of Indium Tin Oxide (ITO), tin oxide or a like, is formed at established intervals alternately on an under surface of a front insulating substrate 2 made of glass in a row direction (in a right to left direction in FIG. 14) and, in order to decrease a resistance value of the scanning electrode 3 (31-3n) and sustaining electrode 4 (41-4n) each having low conductivity, a plurality of trace electrodes 5 and 6 each being made up of a metal film such as a silver thick film or a like is formed on end side of an under surface of the scanning electrode 3 (31-3n) and the sustaining electrode 4 (41-4n) The under surface of the scanning electrode 3 (31-3n) and the sustaining electrode 4 (41-4n) and an under surface of the front insulating substrate 2 on which the scanning electrodes 3 and the sustaining electrode 4 (41-4n) are not formed, is coated with a transparent dielectric layer 7 and an under surface of the dielectric layer 7 is coated with a protection layer 8 made from magnesium oxide which is used to protect the dielectric layer 7 from ion bombardment at a time of discharging.
On the other hand, a plurality of stripe-formed data electrodes 101-10m(may hereinafter referred to as the data electrode 10 (101-10m)) made up of silver films or a like is formed on an upper surface of a rear insulating substrate 9 made from glass in a column direction (in a left to right direction in FIG. 14), that is, in a direction orthogonal to a direction in which the scanning electrode 3 (31-3n) and the sustaining electrode 4 (41-4n) are formed and an upper surface of the data electrode 10 (101-10m) and the upper surface of the rear insulating substrate 9 on which the data electrode 10 (101-10m) are not formed is coated with a dielectric layer 11. Moreover, stripe-shaped ribs (partitioning walls) 12 (hereinafter referred to as the rib 12) used to partition the display cell are formed on an upper surface of the dielectric layer 11 except an upper portion of the data electrode 10 (101-10m) and three kinds of fluorescent layers 13R, 13G, and 13B each converting ultra-violet rays produced by discharge of discharging gas into visible light having three primary colors including a red (R) color, green (G) color, and blue (B) color are formed on the upper surface of the di electric layer 11 existing in an upper portion of the data electrode 10 (101-10m) and on sides of the rib 12. The fluorescent layers 13R, 13G, and 13B are formed in order of the fluorescent layer 13R, fluorescent layer 13G and fluorescent layer 13, in a row direction sequentially and repeatedly, and fluorescent layers 13R, 13G, and 13B used to convert ultra-violet rays into visible light having a same color are formed successively in a column direction. A discharging gas space 14 is secured which is formed by an under surface of the protection layer 8, by an upper surface of each of the fluorescent layers 13R, 13G, and 13B, and by side walls of two ribs 12 being adjacent to each other. The discharging gas space 14 is filled with a discharging gas containing helium, neon or xenon or its mixed gas. A region made up of the scanning electrode 3 (31-3n), the sustaining electrode 4 (41-4n), the trace electrodes 5 and 6, the data electrode 10 (101-10m), the fluorescent layer 13R, 13G, and 13B, and the discharging gas space 14 serves as the display cell described above.
FIG. 16 is a schematic block diagram showing an example of configurations of a driving circuit of the conventional AC driving surface-discharge type PDP 1 of FIG. 14. In the PDP 1 shown in FIG. 16, n pieces (xe2x80x9cnxe2x80x9d is a natural number) of the scanning electrodes 31 to 3n and n pieces (xe2x80x9cnxe2x80x9d is a natural number) of the sustaining electrodes 41 to 4n are formed at established intervals in a row direction and m pieces (xe2x80x9cmxe2x80x9d is a natural number) of the data electrodes 101 to 10m are formed at established intervals in a column direction and the number of the display cells on an entire display screen is (nxc3x97m) pieces.
The driving circuit of the PDP 1, as shown in FIG. 16, chiefly includes a driving power source 21, a controller 22, a scanning driver 23, a scanning pulse driver 24, a sustaining driver 25, and a data driver 26. The driving power source 21 produces a logic voltage Vdd of 5 Volts and, at a same time, a data voltage Vd of about 70 Volts, and a sustaining voltage Vs of about 180 Volts and also generates, based on the sustaining voltage Vs, a priming voltage VP of about 400 Volts, a scanning base voltage VbW of about 100 Volts and a bias voltage Vsw of about 195 Volts, and feeds the logic voltage Vdd to the controller 22, the data voltage Vd to the data driver 26, the sustaining voltage Vs to the scanning driver 23 and the sustaining driver 25, the priming voltage VP and scanning base voltage Vbw to the scanning driver 23 and the bias voltage Vsw to the sustaining driver 25.
The controller 22 produces, based on a video signal Sv fed from an outside, scanning driver control signals SSCD1 to SSCD6, scanning pulse driver control signals SSPD11 to SSPDin and SSPD21 to SSPD2n, sustaining driver control signals SSUD1 to SSUD3, data driver control signals SDD11 to SDD1m and SDD21 to SDD2m and then feeds the scanning driver control signals SSCD1 to SSCD6 to the scanning driver 23, the scanning pulse driver control signals SSPD11 to SSPD1n and SSPD21 to SSPD2 to the scanning pulse driver 24, the sustaining driver control signals SSUD1, to SSUD3 to the sustaining driver 25, the data driver control signals SDD11 to SDD1m and SDD21 to SDD2m to the data driver 26.
The scanning driver 23, as shown in FIG. 17, includes switches 231 to 236. One terminal of the switch 231 is supplied with the priming voltage Vp and the other terminal of the switch 231 is connected to a positive line 27. One terminal of the switch 232 is supplied with the sustaining voltage Vs and the other terminal of the switch 232 is connected to the positive line 27. One terminal of the switch 233 is connected to a negative line 28 and the other terminal of the switch 233 is connected to a ground. One terminal of the switch 234 is supplied with the scanning base voltage VbW and the other terminal of the switch 234 is connected to the negative line 28. One terminal of the switch 235 is connected to the positive line 27 and the other terminal of the switch 235 is connected to a ground. One terminal of the switch 236 is connected to the negative line 28 and the other terminal of the switch 236 is connected to a ground. Each of the switches 231 to 236 is turned ON/OFF, based on the scanning driver control signals SSCD1 to SSCD6, and applies voltages each having a predetermined waveform through the positive line 27 and negative line 28 to the scanning pulse driver 24.
The scanning pulse driver 24, as shown in FIG. 17, includes n pieces of switches 2411 to 241n, n pieces of switches 2421 to 242n, n pieces of diodes 2431 to 243n and n pieces of diodes 2441 to 244n. Each of the diodes 2431 to 243n is connected in parallel to both ends of each of corresponding switches 2411 to 241n. Each of the diodes 2441 to 244n is connected in parallel to both ends of each of corresponding switches 2421 to 242n. The switch 2411 is