Source: {"pile_set_name": "USPTO Backgrounds"}

An important point of attention in design and test of semiconductor devices is given to the timing behaviour of the semiconductor device and its components. A semiconductor device typically has a functional circuit formed from a plurality of functional components which are connected to form a plurality of signal paths. A plurality of appropriately designed buffers and other timing components is usually required on these signal paths to hold, delay or otherwise synchronize the signals on these signal paths, and thereby improve the performance of the functional circuit. Design and test hereto involves iterations of design cycles and test cycles, involving device simulation and testing of a manufactured semiconductor device. Different methods exist to identify the critical timing paths, but these methods run into their limits, especially with increasing operating frequencies of functional circuits on semiconductor devices and with modern semiconductor device designs wherein it may be difficult to access some of the components of the functional circuit. Analysis of the performance limiting factors of the functional circuit and especially the critical paths thereon, and/or the design of an improved functional circuit may thereby be hampered when using known methods.