(** or it wasn't and the operation denoted by the event implies the permission*)
(** *** Properties about permission decay and events *)

Lemma data_permission_increase_execution:
forall U tr tpi mi U' tr' tpj mj
b ofs tidn
(cnti: containsThread tpi tidn)
(cntj: containsThread tpj tidn)
(Hexec: multi_step (U, tr, tpi) mi (U', tr ++ tr', tpj) mj)
(Hperm': Mem.perm_order'' ((getThreadR cntj).1 !! b ofs) (Some Readable))
(Hperm: ~ Mem.perm_order'' ((getThreadR cnti).1 !! b ofs) (Some Readable))
(Hvalid: Mem.valid_block mi b),
exists tr_pre evu U'' U''' tp_pre m_pre tp_inc m_inc,
multi_step (U, tr, tpi) mi (U'', tr ++ tr_pre, tp_pre) m_pre /\
MachStep (U'', tr ++ tr_pre, tp_pre) m_pre
(U''', tr ++ tr_pre ++ [:: evu], tp_inc) m_inc /\
multi_step (U''', tr ++ tr_pre ++ [:: evu], tp_inc) m_inc
(U', tr ++ tr',tpj) mj /\
((action evu = Spawn) \/
(action evu = Freelock /\ thread_id evu = tidn /\
match location evu with
| Some (addr, sz) =>
b = addr.1 /\
Intv.In ofs (addr.2, addr.2 + (Z.of_nat sz))%Z
| None =>
False
end) \/
(action evu = Acquire /\ thread_id evu = tidn /\
exists rmap, match location evu with
| Some (laddr, sz) =>
sz = lksize.LKSIZE_nat /\
lockRes tp_pre laddr = Some rmap /\
Mem.perm_order'' (rmap.1 !! b ofs) (Some Readable)
| None => False
end)).